2023 - 2024 Academic Year, Fall Semester
EEM 328 ELECTRONICS LABORATORY
Lecture Notes about Experiment 3
Operational Amplifiers (part 2)
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OPERATIONAL AMPLIFIERS
Part1 Objectives of Part 1
• Amplification Learning
• Definition and History the ‘amplification’ concept
equivalent circuit representation of an op amp
• Terminals of an op-amp
the working principles of an operational amplifier (op amp)
• Equivalent circuit representation (ideal vs. realistic) open loop transfer characteristics of an op amp
• Open loop transfer characteristics and saturation how to implement circuits by using 741 chip.
Part2 Objectives of Part 2
Closed loop applications of operational amplifiers Learning the following closed loop applications of op amp:
Voltage follower voltage follower
Inverting Amplifier inverting amplifier
noninverting amplifier
Noninverting Amplifier
summing amplifier
Summing Amplifier
Part3
Closed loop applications of operational amplifiers (continued)
Differentiator
Integrator 2
Open Loop Configuration Closed Loop Configuration
Example circuits:
Vout Vin
R2
Vout .Vin
R1
Assume that Vos = 0 V → Vout = Aol . (Vp -Vn) R1 R2
Vout .Vin
R1
R3 R3
Vout .Vin1 .Vin2
R1 R2
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Closed loop applications of an ideal op-amp
Closed loop transfer characteristics of ideal op-amps will be studied through various
circuit models:
Voltage follower
Inverting Amplifier
Noninverting Amplifier
Summing amplifier
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Closed loop applications of an ideal op-amp
In the closed loop applications of ideal op-amps, use the following assumptions
(unless otherwise stated) :
• Current: in = ip = 0 A
• Voltage: Vn = Vp (virtual short)
(For Aol ≈ ∞ and Vout is a finite output)
Vout
Vp Vn 0
Aol
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Voltage Follower
i i
Current: n = p = 0 A
Voltage: Vp= Vin
Vn = Vp = Vin
Figure 1
Vout
Vout Vn Vin Closed Loop Gain: Acl 1 V/V
Vin 6
Why do we need a Voltage Follower ?
Connecting a low impedance load to a source with high impedance:
Rs: internal resistance of the source, Rs = 10 KΩ
RL: internal resistance of the load, RL = 1 KΩ
Output Voltage: Vout = (Vin x RL) / (RL + Rs) = Vin / 11
Vn = Vp = Vin
Output Voltage: Vout ≈ Vin
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Voltage Follower (circuit implementation)
Function Generator Settings:
Signal Type : Sinusoidal Wave
Amplitude : Vpp = 4 Volts
Figure 2
Frequency : 1 kHz
DC Offset : 0 Volts
Oscilloscope Settings:
Monitored Channel: Both
Seconds/division: 0.1 ms
CH1 Coupling Mode: DC
CH1 Volts/division: 1 V
CH2 Coupling Mode: DC
CH2 Volts/division: 2 V
DC Power: VCC = 15 V, VEE = - 15 V
Assume that Vup = 12 V and Vlow = -12 V
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Voltage Follower (scope screen view)
In Figure 3, the time axis indicates the GND level for both channels of the oscilloscope.
Oscilloscope Settings
Monitored Channel: Both
Seconds/division: 0.1 ms
CH1 Coupling Mode: DC
CH1 Volts/division: 1 V (for Vin)
CH2 Coupling Mode: DC
CH2 Volts/division: 2 V (for Vout)
Figure 3
Vin(t) = 2 sin (2000πt) Volts Phase shift between Vin and Vout = 0 °
Vout(t) = 2 sin (2000πt) Volts Closed Loop Gain : Vout / Vin = 1 V/V
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Inverting Amplifier
Figure 4
i i 0 A,
Current: n = p =
iR1= iR2 + in = iR2
Voltage: Vn =Vp = 0 V
(virtual ground) 10
Inverting Amplifier (analysis)
i i
Current: n = p = 0 A,
iR1= iR2 + in = iR2
Voltage: Vn =Vp = 0 V
(virtual ground)
(Vin – Vn) (Vn – Vout)
i R1
R1
, i R2
R2
Vin – Vout – R2
Vout .Vin
R1 R2 R1
Vout R2
Closed Loop Gain: Acl – 11
Vin R1
Inverting Amplifier (implementation)
Figure 5 Function Generator Settings:
Resistors: Signal Type : Sinusoidal Wave
Amplitude : Vpp = 2 Volts
R1 = 1 K Ω
Frequency : 1 kHz
R2 = 10 K Ω DC Offset : 0 Volts
Oscilloscope Settings
Monitored Channel: Both
Seconds/division: 0.1 ms
CH1 Coupling Mode: DC
CH1 Volts/division: 1 V
CH2 Coupling Mode: DC
CH2 Volts/division: 5 V
DC Power: VCC = 15 V, VEE = - 15 V
Assume that Vup = 12 V and Vlow = -12 V
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Inverting Amplifier (scope screen view)
In Figure 6, the time axis indicates the GND level for both channels of the oscilloscope.
Oscilloscope Settings
Monitored Channel: Both
Seconds/division: 0.1 ms
CH1 Coupling Mode: DC
CH1 Volts/division: 1 V (for Vin)
CH2 Coupling Mode: DC
CH2 Volts/division: 5 V (for Vout)
Figure 6
Vin(t) = sin (2000πt) Volts Phase shift between Vin and Vout = 180 °
Vout(t) = -10 sin (2000πt) Volts Closed Loop Gain : Vout / Vin = - 10 V/V
Acl = - R2 / R1 = -10 V/V is satisfied!
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Noninverting Amplifier
i = ip = 0 A,
Current: n
Figure 7
iR1 = iR2
Voltage: Vn =Vp = Vin
14
Noninverting Amplifier (analysis)
i = ip = 0 A,
Current: n
iR1 = iR2
Voltage: Vn =Vp = Vin
(0 – Vin) (Vin – Vout)
i R1
R1
, i R2
R2
– Vin Vin – Vout R1 R2
Vout .Vin
R1 R2 R1
Vout R1 R2
Closed Loop Gain: Acl 15
Vin R1
Noninverting Amplifier (implementation)
Figure 8 Function Generator Settings:
Resistors: Signal Type : Sinusoidal Wave
Amplitude : Vpp = 2 Volts
R1 = 1 K Ω
Frequency : 1 kHz
R2 = 10 K Ω DC Offset : 0 Volts
Oscilloscope Settings
Monitored Channel: Both
Seconds/division: 0.1 ms
CH1 Coupling Mode: DC
CH1 Volts/division: 1 V
CH2 Coupling Mode: DC
CH2 Volts/division: 5 V
DC Power: VCC = 15 V, VEE = - 15 V
Assume that Vup = 12 V and Vlow = -12 V
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Noninverting Amplifier (scope screen view)
In Figure 9, the time axis indicates the GND level for both channels of the oscilloscope.
Oscilloscope Settings
Monitored Channel: Both
Seconds/division: 0.1 ms
CH1 Coupling Mode: DC
CH1 Volts/division: 1 V (for Vin)
CH2 Coupling Mode: DC
CH2 Volts/division: 5 V (for Vout)
Figure 9
Vin(t) = sin (2000πt) Volts Phase shift between Vin and Vout = 0 °
Vout(t) = 11 sin (2000πt) Volts Closed Loop Gain : Vout / Vin = 11 V/V
Acl = (R1+R2) / R1 = 11 V/V is satisfied!
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Summing Amplifier
Figure 10
i i
Current: n = p = 0 A, iR1 + iR2 = iR3 Voltage: Vn =Vp = 0 V
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Summing Amplifier (analysis)
i i
Current: n = p = 0 A, iR1 + iR2 = iR3 Voltage: Vn =Vp = 0 V
Vin1 Vin2 – Vout
i R1
R1
, i R2
R2
, i R3
R3
Vin1 Vin2 – Vout – R3 – R3
Vout .Vin1 .Vin2
R1 R2 R3 R1 R2 19
Summing Amplifier (implementation)
Figure 11
Function Generator Settings:
R1 = 1 K Ω Signal Type : Sinusoidal Wave
R2 = 5 K Ω
Amplitude : Vpp = 2 Volts
R3 = 5 K Ω
Frequency : 1 kHz
Vin1 is a sinusoidal input.
DC Offset : 0 Volts
Vin2 is a DC signal of 5 V.
Oscilloscope Settings
Monitored Channel: Both
Seconds/division: 0.1 ms
CH1 Coupling Mode: DC
CH1 Volts/division: 1 V
CH2 Coupling Mode: DC
CH2 Volts/division: 5 V
DC Power: VCC = 15 V, VEE = - 15 V
Assume that Vup = 12 V and Vlow = -12 V
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Summing Amplifier (scope screen view)
In Figure 12, the time axis indicates the GND level for both channels of the oscilloscope.
Oscilloscope Settings
Monitored Channel: Both
Seconds/division: 0.1 ms
CH1 Coupling Mode: DC
CH1 Volts/division: 1 V (for Vin1)
CH2 Coupling Mode: DC
CH2 Volts/division: 5 V (for Vout)
Figure 12
Vin1(t) = sin (2000πt) Volts
Vout(t) = – 5 – 5 sin (2000πt) V (EQN 1) Phase shift between Vin1 and Vout = 180 °
Vout = – 5xVin1 – 1xVin2 = – R3/R1 x Vin1 – R3/R2 x Vin2 is satisfied!
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Could an op-amp, which is in a closed loop configuration, go into
saturation?
22
Saturation in an Inverting Amplifier (implementation)
Figure 13 Function Generator Settings:
Resistors: Signal Type : Sinusoidal Wave
Amplitude : Vpp = 2 Volts
R1 = 1 K Ω
Frequency : 1 kHz
R2 = 15 K Ω DC Offset : 0 Volts
Oscilloscope Settings
Monitored Channel: Both
Seconds/division: 0.1 ms
CH1 Coupling Mode: DC
CH1 Volts/division: 1 V
CH2 Coupling Mode: DC
CH2 Volts/division: 5 V
DC Power: VCC = 15 V, VEE = - 15 V
Assume that Vup = 12 V and Vlow = -12 V
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Saturation in an Inverting Amplifier (scope screen view)
In Figure 14, the time axis indicates the GND level for both channels of the oscilloscope.
Oscilloscope Settings
Monitored Channel: Both
Seconds/division: 0.1 ms
CH1 Coupling Mode: DC
CH1 Volts/division: 1 V (for Vin)
CH2 Coupling Mode: DC
CH2 Volts/division: 5 V (for Vout)
Figure 14
Vin(t) = sin (2000πt) V
+ 12 V , if – 15 sin (2000 πt) > 12 V
Vout(t) = – 12 V , if – 15 sin (2000 πt) < – 12 V
– 15 sin (2000πt) V , if – 12 V ≤ – 15 sin (2000 πt) ≤ 12 V
+ 12 V , if 15 sin (2000 πt) < – 12 V
(EXPRESSION 1) Vout(t) = – 12 V , if 15 sin (2000 πt) > 12 V
– 15 sin (2000πt) V , if – 12 V ≤ 15 sin (2000 πt) ≤ 12 V
(EQN 2) Vout(t) = min { 12, max { – 12, – 15 sin (2000 πt) } }
where min{a,b} returns the minimum element of the set {a,b} and max{a,b} returns the maximum element of the set {a,b}
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References and Suggested Readings
1. Neaman, D. A., ‘Electronic Circuit Analysis and Design’, Second edition, McGraw-Hill, Singapore, 2001.
2. Sedra, A. S., Smith, K. C., ‘Microelectronic circuits’, Fourth edition, Oxford University Press, USA, 1998.
3. Nilsson, J. W., Riedel, S. A., ‘Electric circuits’, Sixth edition, Prentice-Hall, USA, 2001.
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