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CMOS Static Logic Design Principles

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0% found this document useful (0 votes)
30 views14 pages

CMOS Static Logic Design Principles

Uploaded by

thasleemkamila
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

ECE 441/530

Digital Integrated Circuit Design

Module 6: CMOS Static Logic


Construction of PDN
 NMOS devices in series implement a NAND function

A•B
A

 NMOS devices in parallel implement a NOR function

A+B
A B
Dual PUN and PDN

 PUN and PDN are dual networks


 DeMorgan’s theorems

A+B=A•B [!(A + B) = !A • !B or !(A | B) = !A & !B]

A•B=A+B [!(A • B) = !A + !B or !(A & B) = !A | !B]

 a parallel connection of transistors in the PUN corresponds to a


series connection of the PDN

 Complementary gate is naturally inverting (NAND,


NOR, AOI, OAI)
 Number of transistors for an N-input logic gate is 2N
CMOS NAND

A B F
0 0 1
A B
0 1 1
1 0 1
A•B
1 1 0
A

A
B
CMOS NOR

A B F
B
0 0 1
A 0 1 0
1 0 0
A+B
1 1 0
A B

A
B
Complex CMOS Gate

B
A
C

D
OUT = !(D + A • (B + C))
A
D
B C
Standard Cell Layout Methodology

Routing
channel
VDD

signals

GND

What logic function is this?


Logic Graph: Example 1

X PUN
A
j C
B C

X i VDD
X = !(C • (A + B))
C
i B j A

A B
PDN
A GND
B
C
Two Stick Layouts of !(C· (A + B))

crossover requiring vias

A C B A B C

VDD VDD

X X

GND GND

uninterrupted diffusion strip


Consistent Euler Path
 An uninterrupted diffusion strip is possible only if there
exists a Euler path in the logic graph
 Euler path: a path through all nodes in the graph such that
each edge is visited once and only once.
X

X i VDD

B j A

GND A B C

 For a single poly strip for every input signal, the Euler
paths in the PUN and PDN must be consistent (the same)
Logic Graph: Example 2

X PUN
A C

B D D C

X VDD
X = !((A+B)•(C+D))

C D
B A

A B PDN
A GND
B
C
D
Sticks Diagram
A B D C

VDD

GND

 Some functions have no consistent Euler path like


x = !(a + bc + de) (but x = !(bc + a + de) does!)
XNOR/XOR Implementation
XNOR XOR

A A
A⊕B A⊕B
B B

A ⊕ B = A•!B+!A•B
A A
B B
A⊕B A⊕B

A ⊕ B = A•B+!A•!B
 How many transistors in each?
 Can you create the stick transistor
layout for the lower left circuit?
Static CMOS Full Adder Circuit
!Cout = !Cin & (!A | !B) | (!A & !B) !Sum = Cout & (!A | !B | !Cin) | (!A & !B & !Cin)

B
A B B A B Cin
A

A Cin
!Cout !Sum
Cin
A Cin

A
A B B A B Cin
B

Cout = Cin & (A | B) | (A & B) Sum = !Cout & (A | B | Cin) | (A & B & Cin)

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