IRFP21N60L, SiHFP21N60L

Vishay Siliconix

Power MOSFET

FEATURES
PRODUCT SUMMARY
• Superfast Body Diode Eliminates the Need for
VDS (V) 600
External Diodes in ZVS Applications Available
RDS(on) () VGS = 10 V 0.27
• Lower Gate Charge Results in Simple Drive RoHS*
Qg (Max.) (nC) 150 COMPLIANT
Requirements
Qgs (nC) 46
• Enhanced dV/dt Capabilities Offer Improved Ruggedness
Qgd (nC) 64
• Higher Gate Voltage Threshold Offers Improved Noise
Configuration Single
Immunity
D
• Compliant to RoHS Directive 2002/95/EC
TO-247AC
APPLICATIONS
• Zero Voltage Switching SMPS
G • Telecom and Server Power Supplies
• Uninterruptible Power Supplies
S • Motor Control Applications
D
G S

N-Channel MOSFET

ORDERING INFORMATION
Package TO-247AC
IRFP21N60LPbF
Lead (Pb)-free
SiHFP21N60L-E3
IRFP21N60L
SnPb
SiHFP21N60L

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage VDS 600
V
Gate-Source Voltage VGS ± 30
TC = 25 °C 21
Continuous Drain Current VGS at 10 V ID
TC = 100 °C 13 A
Pulsed Drain Currenta IDM 84
Linear Derating Factor 2.6 W/°C
Single Pulse Avalanche Energyb EAS 420 mJ
Repetitive Avalanche Currenta IAR 21 A
Repetitive Avalanche Energya EAR 33 mJ
Maximum Power Dissipation TC = 25 °C PD 330 W
Peak Diode Recovery dV/dtc dV/dt 16 V/ns
Operating Junction and Storage Temperature Range TJ, Tstg - 55 to + 150
°C
Soldering Recommendations (Peak Temperature) for 10 s 300d
10 lbf · in
Mounting Torque 6-32 or M3 screw
1.1 N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 °C, L = 1.9 mH, Rg = 25 , IAS = 21 A, dV/dt = 11 V/ns (see fig. 12a).
c. ISD  21 A, dI/dt  530 A/μs, VDD  VDS, TJ  150 °C.
d. 1.6 mm from case.

* Pb containing terminations are not RoHS compliant, exemptions may apply

Document Number: 91206 www.vishay.com
S11-0446-Rev. C, 14-Mar-11 1
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFP21N60L, SiHFP21N60L
Vishay Siliconix

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT
Maximum Junction-to-Ambient RthJA - 40
Case-to-Sink, Flat, Greased Surface RthCS 0.24 - °C/W
Maximum Junction-to-Case (Drain) RthJC - 0.38

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 μA 600 - - V
VDS Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA - 420 - mV/°C
Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 μA 3.0 - 5.0 V
Gate-Source Leakage IGSS VGS = ± 30 V - - ± 100 nA
VDS = 600 V, VGS = 0 V - - 50 μA
Zero Gate Voltage Drain Current IDSS
VDS = 480 V, VGS = 0 V, TJ = 125 °C - - 2.0 mA
Drain-Source On-State Resistance RDS(on) VGS = 10 V ID = 13 Ab - 0.27 0.32 
Forward Transconductance gfs VDS = 50 V, ID = 13 A 11 - - S
Dynamic
Input Capacitance Ciss VGS = 0 V, - 4000 -
Output Capacitance Coss VDS = 25 V, - 340 -
Reverse Transfer Capacitance Crss f = 1.0 MHz, see fig. 5 - 29 -
pF
Effective Output Capacitance Coss eff. - 170 -
VGS = 0 V,
Effective Output Capacitance VDS = 0 V to 480 Vc
Coss eff. (ER) - 130 -
(Energy Related)
Total Gate Charge Qg - - 150
ID = 21 A, VDS = 480 V
Gate-Source Charge Qgs VGS = 10 V - - 46 nC
see fig. 7 and 15b
Gate-Drain Charge Qgd - - 64
Gate Resistance Rg f = 1 MHz, open drain - 0.63 - 
Turn-On Delay Time td(on) - 20 -
VDD = 300 V, ID = 21 A,
Rise Time tr - 58 -
Rg = 1.3 , VGS = 10 V, ns
Turn-Off Delay Time td(off) - 33 -
Fall Time tf see fig. 11a and 11bb - 10 -
Drain-Source Body Diode Characteristics
MOSFET symbol
Continuous Source-Drain Diode Current IS D
- - 21
showing the
A
integral reverse G

Pulsed Diode Forward Currenta ISM p - n junction diode S

- - 84

Body Diode Voltage VSD TJ = 25 °C, IS = 21 A, VGS = 0 Vb - - 1.5 V

TJ = 25 °C, IF = 21 A - 160 240
Body Diode Reverse Recovery Time trr ns
TJ = 125 °C, dI/dt = 100 A/μsb - 400 610
TJ = 25 °C, IF = 21 A, VGS = 0 Vb - 480 730
Body Diode Reverse Recovery Charge Qrr nC
TJ = 125 °C, dI/dt = 100 A/μsb - 1540 2310
Reverse Recovery Time IRRM TJ = 25 °C - 5.3 7.9 A
Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 μs; duty cycle  2 %.
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising form 0 % to 80 % VDS.
Coss eff. (ER) is a fixed capacitance that stores the same energy as Coss while VDS is rising from 0 % to 80 % VDS.

www.vishay.com Document Number: 91206

2 S11-0446-Rev. C, 14-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
 IRFP21N60L, SiHFP21N60L
Vishay Siliconix

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

1000 1000
VGS
TOP 15V
12V
100

ID, Drain-to-Source Current (Α )

10V
ID, Drain-to-Source Current (A)

8.0V 100
7.0V
6.5V
10 6.0V T J = 150°C
BOTTOM 5.5V
10

1
0.1 T J = 25°C

5.5V 0.1
0.01
VDS = 50V
20µs PULSE WIDTH
Tj = 25°C 20µs PULSE WIDTH
0.001 0.01
0.1 1 10 100 1000 4 6 8 10 12 14 16
VDS, Drain-to-Source Voltage (V) VGS , Gate-to-Source Voltage (V)

Fig. 1 - Typical Output Characteristics Fig. 3 - Typical Transfer Characteristics

100 3.0
VGS ID = 21A
RDS(on) , Drain-to-Source On Resistance

TOP 15V
12V VGS = 10V
10V 2.5
ID, Drain-to-Source Current (A)

8.0V
10 7.0V
6.5V
6.0V 2.0
BOTTOM 5.5V
(Normalized)

5.5V
1 1.5

1.0
0.1
0.5
20µs PULSE WIDTH
Tj = 150°C
0.01 0.0
0.1 1 10 100 -60 -40 -20 0 20 40 60 80 100 120 140 160
VDS, Drain-to-Source Voltage (V) T J , Junction Temperature (°C)

Fig. 2 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature

Document Number: 91206 www.vishay.com

S11-0446-Rev. C, 14-Mar-11 3
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFP21N60L, SiHFP21N60L
Vishay Siliconix

100000 12.0
VGS = 0V, f = 1 MHZ
ID= 21A
Ciss = C gs + Cgd, C ds SHORTED VDS= 480V
Crss = Cgd 10.0

VGS , Gate-to-Source Voltage (V)

VDS= 300V
10000 Coss = Cds + Cgd
VDS= 120V
C, Capacitance(pF)

Ciss 8.0

1000 6.0
Coss

4.0
100 Crss
2.0

10 0.0
1 10 100 1000 0 20 40 60 80 100 120
VDS, Drain-to-Source Voltage (V) Q G Total Gate Charge (nC)

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Gate Charge vs. Gate-to-Source
Voltage

25 100.00

20 T J = 150°C
ISD, Reverse Drain Current (A)

10.00
15
Energy (µJ)

10
T J = 25°C
1.00

VGS = 0V
0 0.10
0 100 200 300 400 500 600 700 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6

VDS, Drain-to-Source Voltage (V) VSD, Source-to-Drain Voltage (V)

Fig. 6 - Typical Output Capacitance Stored Energy vs. VDS Fig. 8 - Typical Source-Drain Diode Forward Voltage

www.vishay.com Document Number: 91206

4 S11-0446-Rev. C, 14-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
 IRFP21N60L, SiHFP21N60L
Vishay Siliconix

1000

OPERATION IN THIS AREA RD

LIMITED BY R DS(on) VDS
ID, Drain-to-Source Current (A)

100 VGS
D.U.T.
RG
+
- VDD
10
100µsec 10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
1msec
1
Tc = 25°C
Tj = 150°C 10msec Fig. 11a - Switching Time Test Circuit
Single Pulse
0.1
1 10 100 1000 10000
VDS, Drain-to-Source Voltage (V)
Fig. 9 - Maximum Safe Operating Area

25 VDS
90 %

20
ID, Drain Current (A)

10 %
15 VGS
td(on) tr td(off) tf

10
Fig. 11b - Switching Time Waveforms

0
25 50 75 100 125 150
T C , Case Temperature (°C)
Fig. 10 - Maximum Drain Current vs. Case Temperature

D = 0.50
Thermal Response ( Z thJC )

0.1 0.20
0.10
0.05
0.01 0.02
0.01
P DM

t1
0.001
t2
SINGLE PULSE Notes:
( THERMAL RESPONSE ) 1. Duty factor D = t1/ t 2
2. Peak T J = P DM x Z thJC +T C
0.0001
1E-006 1E-005 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)
Fig. 12 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

Document Number: 91206 www.vishay.com

S11-0446-Rev. C, 14-Mar-11 5
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFP21N60L, SiHFP21N60L
Vishay Siliconix

5.0
VDS
tp
VGS(th) Gate threshold Voltage (V)

4.0

ID = 250µA
3.0
IAS

Fig. 14c - Unclamped Inductive Waveforms

2.0

Current regulator
Same type as D.U.T.
1.0
-75 -50 -25 0 25 50 75 100 125 150 50 kΩ
12 V 0.2 µF
T J , Temperature ( °C ) 0.3 µF

Fig. 13 - Threshold Voltage vs. Temperature +

VDS
D.U.T. -

800 VGS
ID
EAS , Single Pulse Avalanche Energy (mJ)

700 3 mA
TOP 9.4A
13A
600 BOTTOM 21A IG ID
Current sampling resistors
500
Fig. 15a - Gate Charge Test Circuit
400

300

200
QG
100 VGS

0 QGS QGD
25 50 75 100 125 150
Starting T J , Junction Temperature (°C) VG

Fig. 14a - Maximum Avalanche Energy vs. Drain Current

Charge

Fig. 15b - Basic Gate Charge Waveform

15 V

L Driver
VDS

RG D.U.T +
- VDD
A
IAS A
20 V
tp 0.01 Ω

Fig. 14b - Unclamped Inductive Test Circuit

www.vishay.com Document Number: 91206

6 S11-0446-Rev. C, 14-Mar-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
 IRFP21N60L, SiHFP21N60L
Vishay Siliconix

Peak Diode Recovery dV/dt Test Circuit

+ Circuit layout considerations

D.U.T.
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
-

- +
-

Rg • dV/dt controlled by Rg +
• Driver same type as D.U.T. VDD
-
• ISD controlled by duty factor “D”
• D.U.T. - device under test

Driver gate drive

Period P.W.
D=
P.W. Period

VGS = 10 Va

D.U.T. lSD waveform

Reverse
recovery Body diode forward
current current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
VDD

Re-applied
voltage
Body diode forward drop
Inductor current

Ripple ≤ 5 % ISD

Note
a. VGS = 5 V for logic level devices

Fig. 16 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91206.

Document Number: 91206 www.vishay.com

S11-0446-Rev. C, 14-Mar-11 7
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DATASHEET ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
 Package Information
www.vishay.com
Vishay Siliconix
TO-247AC (High Voltage)
A A
4
E 7 ØP (Datum B)
B
E/2 S A2 Ø k M DBM
3 R/2 ØP1
A
D2
Q

4 4
2xR
D D1
(2)

1 2 3 D 4
Thermal pad
5 L1

C L 4
E1
See view B A
0.01 M D B M
2 x b2 C View A - A
2x e
3xb
b4 A1
0.10 M C A M
(b1, b3, b5)
Planting Base metal
Lead Assignments
1. Gate D DE E
2. Drain
3. Source (c) c1
C C
4. Drain
(b, b2, b4)
(4)
Section C - C, D - D, E - E
View B
MILLIMETERS INCHES MILLIMETERS INCHES
DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.
A 4.58 5.31 0.180 0.209 D2 0.51 1.30 0.020 0.051
A1 2.21 2.59 0.087 0.102 E 15.29 15.87 0.602 0.625
A2 1.17 2.49 0.046 0.098 E1 13.72 - 0.540 -
b 0.99 1.40 0.039 0.055 e 5.46 BSC 0.215 BSC
b1 0.99 1.35 0.039 0.053 Øk 0.254 0.010
b2 1.53 2.39 0.060 0.094 L 14.20 16.25 0.559 0.640
b3 1.65 2.37 0.065 0.093 L1 3.71 4.29 0.146 0.169
b4 2.42 3.43 0.095 0.135 N 7.62 BSC 0.300 BSC
b5 2.59 3.38 0.102 0.133 ØP 3.51 3.66 0.138 0.144
c 0.38 0.86 0.015 0.034 Ø P1 - 7.39 - 0.291
c1 0.38 0.76 0.015 0.030 Q 5.31 5.69 0.209 0.224
D 19.71 20.82 0.776 0.820 R 4.52 5.49 0.178 0.216
D1 13.08 - 0.515 - S 5.51 BSC 0.217 BSC
ECN: X13-0103-Rev. D, 01-Jul-13
DWG: 5971
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Contour of slot optional.
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body.
4. Thermal pad contour optional with dimensions D1 and E1.
5. Lead finish uncontrolled in L1.
6. Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154").
7. Outline conforms to JEDEC outline TO-247 with exception of dimension c.
8. Xian and Mingxin actually photo.

Revision: 01-Jul-13 1 Document Number: 91360

For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
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Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
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requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
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Revision: 02-Oct-12 1 Document Number: 91000