Micro-processor Instructions

Mnemonics Hex code Instruction Comment

Load register A0 of A0 = LSB of A
0000_0000 width size [15:0] register
LDA A
00 Load content from
memory
Load register A1 of A1 = MSB of A
0000_0001
LDA A_1 width size [31 :16] register
01
of A
0000_0010 Load register B of B0 = LSB of B
LDA B width size [15:0] register
02
Load register B1 of B1 = MSB of B
0000_0011
LDA B_1 width size [31 :16] register
03
of B
0000_0100 Load register C of C0 = LSB of C
LDA C width size [15:0] register
04
Load register C1 of C1 = MSB of C
0000_0101
LDA C_1 width size [31:16] register
05
of C
0000_0110 Load register D of D0 = LSB of D
LDA D width size [15:0] register
06
Load register D1 of D1 = MSB of D
0000_0111
LDA D_1 width size [31:16] register
07
of D

Move LSB of MSB means

0000_1001
MOV A_1, A register A content register A width
09
to MSB of register A size [31:16]
Move LSB of LSB means register
0000_1010
MOV B, A register A content A width size [15:0]
0a
to LSB of register B
Move LSB of Move the content
register A content of register A width
0000_1011
MOV C, A to LSB of register C size [15:0] to
0b
register C width
size [15:0]
Move LSB of
0000_1100
MOV D, A register A content
0c
to LSB of register D

0000_1101 Move LSB of Move the content

MOV B_1, B register B content of register B width
0d
 to MSB of register B [15:0] to register B
width [31:16]
Move LSB of
0000_1110
MOV A, B register B content
0e
to LSB of register A
Move LSB of
0000_1111
MOV C, B register B content
0f
to LSB of register C

Move LSB of
0001_0001
MOV D, B register B content
11
to LSB of register D
Move LSB of
0001_0010
MOV C_1, C register C content
12
to MSB of register C
Move LSB of Move the content
register C content of register C width
0001_0011
MOV A, C to LSB of register A size [15:0] to
13
register A width
size [15:0]
Move LSB of
0001_0100
MOV B, C register C content
14
to LSB of register A
Move LSB of
0001_0101
MOV D, C register C content
15
to LSB of register A

Move MSB of
0001_0110
MOV A, A_1 register A content
16
to LSB of register A
Move MSB of Move the content
register B content of register B width
0001_0111
MOV B, B_1 to LSB of register B size [31:16] to
17
register B width
size [15:0]
Move MSB of
0001_1000
MOV C, C_1 register C content
18
to LSB of register C
Move MSB of
0001_1001
MOV D, D_1 register D content
19
to LSB of register D

Exchange the
0001_1010
XCHG A, B value(content) of A
20
with B
Exchange the
0001_1011
XCHG A, C value(content) of A
21
with C
 0001_1100 Exchange the value
XCHG A, D of A with D
22

0001_1101 Exchange the value

XCHG B, C of B with C
23

0001_1110 Exchange the value

XCHG B, D of B with D
24

0001_1111 Exchange the value

XCHG C, D of C with D
25
Store the value of Mnemonics
register A into address
0011_0000 memory address 30
STA A
30 76
Store A to memory
address 76
Store the value of
0011_0001
STA B register B into
31
memory address
Store the value of Mnemonics
register C into address
0011_0010 memory address 32
STA C
32 88
Store C to memory
address 88
Store the value of
0011_0011
STA D register D into
33
memory address

0011_0100 Copy the content of

CPY A, B A to B
34

0011_0101 Copy the content of

CPY A, C A to C
35

0011_0110 Copy the content of

CPY A, D A to D
36

1111_0000 Stop the program

HLT
f0
Arithmetic
Logical Unit
Instruction
1000_0000 Add the value of A+B
ADD A, B register A and B
80

1000_0001 Add the value of A+C

ADD A, C register A and C
81
 1000_0010 Add the value of A+D
ADD A, D register A and D
82

1000_0011 Add the value of B+C

ADD B, C register B and C
83

1000_0100 Add the value of B+D

ADD B, D register B and D
84

1000_0101 Add the value of C+D

ADD C, D register C and D
85

1000_1000 Subtract the value A-B

SUB A, B of register B from A
88

1000_1001 Subtract the value A-C

SUB A, C of register C from A
89

1000_1010 Subtract the value A-D

SUB A, D of register D from A
8a

1000_1011 Subtract the value B-C

SUB B, C of register C from B
8b

1000_1100 Subtract the value B-D

SUB B, D of register D from B
8c

1000_1101 Subtract the value C-D

SUB C, D of register D from C
8d

1001_0000 Multiply the value AxB

MUL A, B of register A with B
90

1001_0001 Multiply the value AxC

MUL A, C of register A with C
91

1001_0010 Multiply the value AxD

MUL A, D of register A with D
92

1001_0011 Multiply the value BxC

MUL B, C of register B with C
93

1001_0100 Multiply the value BxD

MUL B, D of register B with D
94

1001_0101 Multiply the value CxD

MUL C, D of register C with D
95

1001_1000 Divide the value of A/B

DIV A, B register A from B
98

1001_1001 Divide the value of A/C

DIV A, C register A from C
99

1001_1010 Divide the value of A/D

DIV A, D register A from D
9a
 1001_1011 Divide the value of B/C
DIV B, C register B from C
9b

1001_1100 Divide the value of B/D

DIV B, D register B from D
9c

1001_1101 Divide the value of C/D

DIV C, D register C from D
9d

1010_0000 Bitwise AND of A A&B

ANDBIT A, B and B
a0

1010_0001 Bitwise AND of A A&C

ANDBIT A, C and C
a1

1010_0010 Bitwise AND of A A&D

ANDBIT A, D and D
a2

1010_0100 Bitwise OR of A and A|B

ORBIT A, B B
a4

1010_0101 Bitwise OR of A and A|C

ORBIT A, C C
a5

1010_0110 Bitwise OR of A and A|D

ORBIT A, D D
a6

1010_1000 Bitwise NAND of ~ (A & B)

NANDBIT A, B A and B
a8

1010_1001 Bitwise NAND of ~ (A & C)

NANDBIT A, C A and C
a9

1010_1010 Bitwise NAND of ~ (A & D)

NANDBIT A, D A and D
aa

1010_1100 Bitwise NOR of ~ (A | B)

NORBIT A, B A and B
ac

1010_1101 Bitwise NOR of ~ (A | C)

NORBIT A, C A and C
ad

1010_1110 Bitwise NOR of ~ (A | D)

NORBIT A, D A and D
ae

1011_0000 Bitwise XOR of A A^B

XORBIT A, B and B
b0

1011_0001 Bitwise XOR of A A^C

XORBIT A, C and C
b1
 1011_0010 Bitwise XOR of A A^D
XORBIT A, D and D
b2

1011_0100 Bitwise XNOR of ~ (A ^ B)

XNORBIT A, B A and B
b4

1011_0101 Bitwise XNOR of ~ (A ^ C)

XNORBIT A, C A and C
b5

1011_0110 Bitwise XNOR of ~ (A ^ D)

XNORBIT A, D A and D
b6

1100_0000 Bitwise negation of !A

NEG A A
c0

1100_0001 Bitwise negation of !B

NEG B B
c1

1100_0010 Bitwise negation of !C

NEG C C
c2

1100_0011 Bitwise negation of !D

NEG D D
c3

1011_1000 Logical AND of A A && B

LAND A, B and B
b8

1011_1001 Logical AND of A A && C

LAND A, C and C
b9

1011_1010 Logical AND of A A && D

LAND A, D and D
ba

1011_1100 Logical OR of A and A || B

LOR A, B B
bc

1011_1101 Logical OR of A and A || C

LOR A, C C
bd

1011_1110 Logical OR of A and A || D

LOR A, D D
be

1100_0100 Shift left of A E.g.: - A = 1010 to

SHFL A bitwise 0100
c4

1100_0101 Shift left of B E.g.: - B = 1010 to

SHFL B bitwise 0100
c5

1100_0110 Shift left of C

SHFL C bitwise
c6

1100_0111 Shift left of D

SHFL D bitwise
c7
 1100_1000 Shift right of A E.g.: - A = 1010 to
SHFR A bitwise 0101
c8

1100_1001 Shift right of B E.g.: - B = 1010 to

SHFR B bitwise 0101
c9

1100_1010 Shift right of C

SHFR C bitwise
ca

1100_1011 Shift right of D

SHFR D bitwise
cb

Special
Instruction
JMP 0100_1111 JUMP current Mnemonics
4f address to different address
Not mention in address 40
your design 56
E.g.: - 40 address
to 56
JMP_iF A > B 0100_0000 JUMP current Mnemonics
40 address to different address
address if condition 40
is not met then 56
simple increment E.g.: - 40 address
the address to 56
If condition not,
then
40
41
JMP_iF A > C 0100_0001 JUMP current Mnemonics
41 address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
46
47
JMP_iF A > D 0100_0010 JUMP current Mnemonics
 42 address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
46
47
JMP_iF B > C 0100_0011 JUMP current Mnemonics
43 address to different address
address if condition 50
is not met then 62
simple increment E.g.: - 50 address
the address to 62
If condition not,
then
50
51
JMP_iF B > D 0100_0100 JUMP current Mnemonics
44 address to different address
address if condition 55
is not met then 65
simple increment E.g.: - 55 address
the address to 65
If condition not,
then
55
56
JMP_iF C > D 0100_0101 JUMP current Mnemonics
45 address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
46
47

JMP_iF A < B 0100_1000 JUMP current Mnemonics

48 address to different address
address if condition 40
is not met then 56
simple increment E.g.: - 40 address
the address to 56
If condition not,
then
40
41
JMP_iF A < C 0100_1001 JUMP current Mnemonics
49 address to different address
 address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
46
47
JMP_iF A < D 0100_1010 JUMP current Mnemonics
4a address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
46
47
JMP_iF B < C 0100_1011 JUMP current Mnemonics
4b address to different address
address if condition 50
is not met then 62
simple increment E.g.: - 50 address
the address to 62
If condition not,
then
50
51
JMP_iF B < D 0100_1100 JUMP current Mnemonics
4c address to different address
address if condition 55
is not met then 65
simple increment E.g.: - 55 address
the address to 65
If condition not,
then
55
56
JMP_iF C < D 0100_1101 JUMP current Mnemonics
4d address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
46
47

JMP_iF A >= B 0101_0000 JUMP current Mnemonics

50 address to different address
address if condition 40
 is not met then 56
simple increment E.g.: - 40 address
the address to 56
If condition not,
then
40
41
JMP_iF A >= C 0101_0001 JUMP current Mnemonics
51 address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
46
47
JMP_iF A >= D 0101_0010 JUMP current Mnemonics
52 address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
46
47
JMP_iF B >= C 0101_0011 JUMP current Mnemonics
53 address to different address
address if condition 50
is not met then 62
simple increment E.g.: - 50 address
the address to 62
If condition not,
then
50
51
JMP_iF B >= D 0101_0100 JUMP current Mnemonics
54 address to different address
address if condition 55
is not met then 65
simple increment E.g.: - 55 address
the address to 65
If condition not,
then
55
56
JMP_iF C >= D 0101_0101 JUMP current Mnemonics
55 address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
 then
46
47

JMP_iF A <= B 0101_1000 JUMP current Mnemonics

58 address to different address
address if condition 40
is not met then 56
simple increment E.g.: - 40 address
the address to 56
If condition not,
then
40
41
JMP_iF A <= C 0101_1001 JUMP current Mnemonics
59 address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
46
47
JMP_iF A <= D 0101_1010 JUMP current Mnemonics
5a address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
46
47
JMP_iF B <= C 0101_1011 JUMP current Mnemonics
5b address to different address
address if condition 50
is not met then 62
simple increment E.g.: - 50 address
the address to 62
If condition not,
then
50
51
JMP_iF B <= D 0101_1100 JUMP current Mnemonics
5c address to different address
address if condition 55
is not met then 65
simple increment E.g.: - 55 address
the address to 65
If condition not,
then
 55
56
JMP_iF C <= D 0101_1101 JUMP current Mnemonics
5d address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
46
47

JMP_iF A == B 0110_0000 JUMP current Mnemonics

60 address to different address
address if condition 40
is not met then 56
simple increment E.g.: - 40 address
the address to 56
If condition not,
then
40
41
JMP_iF A == C 0110_0001 JUMP current Mnemonics
61 address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
46
47
JMP_iF A == D 0110_0010 JUMP current Mnemonics
62 address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
46
47
JMP_iF B == C 0110_0011 JUMP current Mnemonics
63 address to different address
address if condition 50
is not met then 62
simple increment E.g.: - 50 address
the address to 62
If condition not,
 then
50
51
JMP_iF B == D 0110_0100 JUMP current Mnemonics
64 address to different address
address if condition 55
is not met then 65
simple increment E.g.: - 55 address
the address to 65
If condition not,
then
55
56
JMP_iF C == D 0110_0101 JUMP current Mnemonics
65 address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
46
47

JMP_iF A != B 0110_1000 JUMP current Mnemonics

68 address to different address
address if condition 40
is not met then 56
simple increment E.g.: - 40 address
the address to 56
If condition not,
then
40
41
JMP_iF A != C 0110_1001 JUMP current Mnemonics
69 address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
46
47
JMP_iF A != D 0110_1010 JUMP current Mnemonics
6a address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
 46
47
JMP_iF B != C 0110_1011 JUMP current Mnemonics
6b address to different address
address if condition 50
is not met then 62
simple increment E.g.: - 50 address
the address to 62
If condition not,
then
50
51
JMP_iF B != D 0110_1100 JUMP current Mnemonics
6c address to different address
address if condition 55
is not met then 65
simple increment E.g.: - 55 address
the address to 65
If condition not,
then
55
56
JMP_iF C != D 0110_1101 JUMP current Mnemonics
6d address to different address
address if condition 46
is not met then 59
simple increment E.g.: - 46 address
the address to 59
If condition not,
then
46
47

1. Load instructions (LDA): 8

2. Move instructions (MOV): 16
3. Exchange instructions (XCHG): 6
4. Store instructions (STA): 4
5. Arithmetic Logical Unit instructions: 60
6. Special instructions (JMP, JMP_iF): 37
7. Halt the Program (HLT): 1

Adding them up:

8 (LDA) + 16 (MOV) + 6 (EXCH) + 4 (STA) + 60 (Arithmetic Logical Unit) + 37 (Special

Instructions) + 1 (Halt Program) = 132