A Tutorial Introduction

to Switching Converters
Christophe Basso
Business Development Manager
IEEE Senior Member

February 2022 – Rev 0.32

 Agenda
 Power Conversion Mechanisms
 Switching Cells and Control Schemes
 The Buck
 The Boost
 The Buck-Boost
 Introduction to Control Loop Design
 EMI Filter Interaction
 Introduction to Simulation
 The Goal of a Converter is to Deliver Power
 A converter transforms the energy from a source into a physical work
 The conversion mechanism generates losses and heat which must be evacuated

“Only way to
feel the noise
Pin Noise source Pout

It’s when it’s

good and loud”
Electrical Dc-dc
source Power amplifier Transducer Work
conversion
 Energy efficiency is about minimizing the losses in the conversion chain
 A highly-efficient converter implies lower-size heatsink and improved reliability
 No Loss in a Perfect World
 In an ideal system, all the energy coming from the source converts into work
 By the ratio between the delivered power and the input power is efficiency
 The Greek letter “eta” designates a unitless number less than 1 or 100%
Pout

Pin
Pout 1 
Ploss  Pin  Pout   Pout  Pout   1
  
A 50% efficiency means Ploss = Pout

 e.g. Pout = 100 W  Ploss = 100 W

Pin = 150 W, Pout = 100 W   = 66%
 Efficiency is not constant and often peaks at a level different than nominal power
 Challenge is to keep losses low across a wide load range
 Efficiency Across the Load Range
 Computers are rarely used at their full power capability
 Depending on the active program, computational burden affects consumption
 The 80+ standard established in 2004 defines efficiency at different load conditions

115 V Internal Non-

80 PLUS Test Type 230 V Internal Redundant
Redundant
Power supply usage 20 % 50 % 100 % 10 % 20 % 50 % 100 %
80 PLUS 80 % 80 % 80 % Not defined
80 PLUS Bronze 82 % 85 % 82 % --- 81 % 85 % 81 %

80 PLUS Silver 85 % 88 % 85 % --- 85 % 89 % 85 %

80 PLUS Gold 87 % 90 % 87 % --- 88 % 92 % 88 %
80 PLUS Platinum 90 % 92 % 89 % --- 90 % 94 % 91 %

80 PLUS Titanium Inexistant 90 % 94 % 96 % 91 %

 Performing Power Conversion
 Power conversion can be done in two ways, linear or switched
 The linear approach relies on a controlled resistance to regulate the flow
 The switching approach uses a power switch either open or closed
control The linear approach:
Vin Vout o efficiency is poor
o good noise performance
o acceptable when (Vout-Vin) is small MC7805
Linear regulator
R from 0 to ∞ o can only decrease the input level
control The switching approach:
o efficiency is high
control
Vin o noise performance is poor
Vout o works with large (Vout-Vin)
R is 0 MC34063
or o increase/decrease/invert the input level Switching regulator
R is ∞
o requires energy-storing elements
 Associating Resistors to Lower the Voltage
 Associating resistors together is a way to reduce the voltage
 It is however difficult to keep a stable value when operating conditions change

R2
3.30
3.3 V 52 3.32
132 Rload2 3V3 Pout    468 mW
50
DSP 100 50
DSP
R1 122 122
12.0 140 Pin    1.39 W
5.00
100  140 50  132
Vin 5V
5V
Rload1
12V 100 logic
logic Pout 0.468
  100  33.6%
Pin 1.39

 Efficiency is poor and power dissipation can be high

 Not suited for highly-variable output currents
 A Controlled Resistance
 The series resistance can be replaced by a controlled element such as a transistor
 An error amplifier monitors the output voltage and adjusts the driving bias
Vout
I FB

>
I in Feedback I out  If the feedback current is
R1
I bias network neglected:
>

Conversion
Ib ratio
C1 R3 Pout Vout I out Vout
Vin    M
Pin Vin I in Vin
U2
Vref R2

 The efficiency depends on the difference between input and output voltages
 Linear Regulators can be Efficient
 A small difference V between Vin and Vout brings good efficiency
 Efficiency betters if the V drop is reduced compared to Vout

6V 5 V/1 A

Vout 5
   83%
Vin 6

V << Vout
13 V 12 V/1 A

Vout 12
   92.3%
Vin 13
Vout = 5 V
 Modeling a Linear Regulator
 Any linear system can be reduced to its equivalent Thévenin generator
 A voltage source Vth is affected by an output resistance Rth

Q1
Z out ,OL
R4 Small-signal
model
R3
Vin C1 Vth Vin , Vbe , VZ  Vout
D1

Thévenin generator

 The output voltage is made of three contributors: Vin, Iout , Vbe and VZ
 Description by Block Diagrams
 It is possible to represent the linear regulator with blocks
 The H stage describes the bipolar transistor power stage transfer function
I out  s  Z out ,OL  s 
As ,OL  s  Vin  s 
-
+
Vref  s  H s Vout  s 
Power stage
 We can easily write the equation describing the output voltage expression

Vout  s   Vref  s  H  s   I out  s  Z out ,OL  s   As ,OL  s Vin  s 

Power stage Open-loop output Open-loop

impedance input voltage
contribution contribution
 Benefits of closing the Loop
 The deviation between the reference and the output generates an error 
 The error is then amplified and shaped by the compensator
Error amplifier I out  s  Z out ,OL  s 
As ,OL  s  Vin  s 
-
+  +
Vref  s  Error
G s Control
H s Vout  s 
voltage voltage
-
Power stage

Vout  s   Vref  s   Vout  s   T  s   I out  s  Z out ,OL  s   As ,OL  s Vin  s 

Loop gain
T s Z out ,OL  s  As ,OL  s 
Vout  s   Vref  s   I out  s   Vin  s 
1 T s 1 T s 1 T  s
T  s  G  s H s
Theoretical output Closed-loop Closed-loop
output impedance input rejection ratio
 Sensitivity Function
 A converter robustness qualifies its ability to reject perturbations
 The input voltage, the output current or temperatures are perturbations
 A high loop gain guarantees efficient perturbation rejection and improves robustness
T s
Vout  s   Vref  s   I out  s  Z out ,CL  s   Vin  s  As ,CL  s 
1 T s
Static error
 0
T s T0  
Vout  s   Vref  s  Vout  s   Vref  s  No static error
1 T s
Output impedance T0  
1
Z out ,CL  s   Z out ,OL R0,CL  0  No output drop
1 T s
PSRR T0  
1
Asc ,CL  s   Asc ,OL Asc ,CL  0 Infinite input rejection
1 T s
Sensitivity function
 Small-Signal Parameters
 The output impedance and the rejection ratio are all small-signal parameters
 The static values can be measured in a two-step approach
Dc
Vin1 Vout1 I PSRR
out Vout
As ,OL 
Vin 2 Vout 2 I out
Vin

Vout1 I R0
out 1 Vout
Vin R0,CL 
Vout 2 I out 2
I out

 Keep the input voltage or output current variations small for a linear behavior
dVout
 A small variation means a differentiation: R0,CL  Vout 2  Vout1 R0,CL 
I out 2  I out1 dI out
 Small-signal representation only I out 2  I out1  0 I out
 No Gain, no Feedback!
 We know the loop gain must drop to force crossover at a given frequency
 Crossover determines the dynamic behavior of the converter: speed, reaction time
 As long as the perturbation frequency is before crossover, correction occurs
 When perturbation frequency is beyond crossover, ac feedback is gone: open loop!

° dB Loop gain transfer function

80 180 Tf
Vin Vout(s)
40 90
H1(s) H2(s)
T  f 
0 0
T(s) f0
d(s)
-40 -90
fc dc Loose coupling
Open f < fc in ac, no signal
Ac closed-loop transmission >> fc
-80 -180 loop G(s)
ac
10 100 1k 10k 100k
f0 >> fc
 Agenda
 Power Conversion Mechanisms
 Switching Cells and Control Schemes
 The Buck
 The Boost
 The Buck-Boost
 Introduction to Control Loop Design
 EMI Filter Interaction
 Introduction to Simulation
 Core Switching Cells
 The basic switching cells consist of three different converters
 The buck converter – it reduces the input voltage
 The boost converter – it increases the input voltage
 The buck-boost converter – it can increase or decrease the input voltage

Vout Vout Vout

control

Vin control Vin Vin control

Vout  Vin Vout  Vin Vout  or  Vin

Buck Boost Buck-boost
 A Two-Switch Model
 Each basic structure shares a common switch + diode arrangement
 The switching cell is actually a single-pole double-throw power switch

Switching cell Switching cell

a L Vout L c p Vout
SW c + +
D
D C R SW C R
Vin Vin
p - -
a
Buck converter Boost converter
Switching cell
a p Vout PWM switch
c
- model a c a: active
SW D
L C R c: common
Vin p: passive
+ d
PWM switch VM p
Buck-boost converter
 Frequency and Duty Ratio
 The duty ratio D defines the on-time duration divided by the switching period Tsw
vDRV  t 

On-time ton  toff  Tsw

on-time off-time t
D  on  ton  DTsw
Tsw
ton toff Tsw  DTsw  D ' Tsw
toff
D'   toff  D ' Tsw D '  1 D
t Tsw Off-time
Tsw

 There are two events in the switch activation: one switch is off while the other is off
 This is typical of a converter operated in continuous conduction mode or CCM
 A third event with all switches off occur in discontinuous conduction mode or DCM

For all basic cells, the duty ratio D controls the output voltage
 Inductive Current
 The current in an inductor ramps up and down during the switching period
V A
 The current slope S in A/s depends on the voltage applied across the inductor: S 
L s 
 The inductor energizes (stores energy) during the on-time
 The inductor de-energizes (releases energy) during the off-time
iL  t 
d̂
Operating The distance between Ipeak and Ivalley
I peak transient
S 'off defines the ripple current IL
iL  t  Current starts from Ivalley and returns to
I valley
Son Soff the same level within the switching cycle
clock I L clock  If current keeps increasing: saturation
t

If valley current is the same within one cycle: steady-state operation

 Conduction Mode
 The peak and valley currents determine the amount of processed energy
 Their levels depend on operating conditions set by input and output values
iL  t 

I peak
I out1 CCM: continuous
CCM
I valley
Pout conduction mode
I out 2

CCM I out 3 DCM: discontinuous

DT
I out 4
conduction mode
DCM
ton toff Tsw Core is demagnetized

 The converter operates in heavy CCM then goes into lighter CCM as Pout decreases
 In light-load conditions, the valley current disappears and DCM is entered
 Borderline Conduction Mode
 A deadtime appears in DCM where both switches are blocked
 A specific control scheme restarts the main switch when the valley is 0 A
DCM DCM
High loss

vDS  t 
vDS  t  low loss
BCM
clock clock I peak clock I peak clock

DCM iL  t  DCM
iL  t 

t t
deadtime deadtime

 Inserting a smaller deadtime in BCM leads to reducing the turn-on losses

 A BCM-operated converter offers a highly variable switching frequency

BCM: borderline conduction mode

 Control Techniques
 A switching converter can be controlled in different ways
 The most classical solutions are fixed-frequency voltage- and current-mode control
Voltage mode VCC
Current mode clock VCC

clock

S DRV
driver
Q
S DRV
R
Error voltage Q Error voltage
CMP verr  t  R CMP

FB FB

+
-
CS
-
+ LEB kdiv LEB
vCS  t  CS verr  t  vCS  t 
+
- VCS ,max
Vref Vp Vref
VCS ,max
vsaw  t 
Protection only
PWM block

 In VM control, the error voltage directly determines the duty ratio

 In CM control, the error voltage controls the peak current and indirectly the duty ratio
 Voltage- and Current-Mode Control
 Each control technique presents advantages and drawbacks
Voltage-mode control: Current-mode control:

 Ease of implementation: no need to  Natural input feedforward brings

sense inductor current excellent input voltage rejection
 Can operate down to very low duty ratio  Inherent cycle-by-cycle overcurrent
 Large-amplitude artificial voltage brings protection
good noise immunity  First-order response eases feedback loop
 Inherently-low output impedance design
 Poor input rejection: any perturbation  Inherently-high output impedance
must first propagate before correction requires high loop gain
 Second-order response complicates  Sub-harmonic instability in CCM needs
compensation slope compensation
 Difficult to operate at very low duty ratio
many controllers operate
in voltage-mode control
Mostly current-mode control
 Voltage-Mode Control – Duty Ratio Generator
 The duty ratio is obtained by comparing a sawtooth and the error voltage
 When the two signals intersect, the comparator toggles

verr  t  Vp t
vsaw  t   V p
Tsw
verr  t   V p d  t 
vsaw  t 

PWM 100%

verr  t 
d t  0% d t   Discrete value!
Vp
 This is a naturally sampled modulator
1
 The small-signal gain of this PWM block is GPWM 
Vp
 Current-Mode Control – Subharmonic Oscillations
 Current-mode-controlled converters can be become instable in CCM
 When the duty ratio approaches 50% subharmonic oscillations can appear
iL  t  clock Control-to-output
Vc
Peaking
I peak
Ri at Fsw/2
0

I vallley
IL 0 (dB)
D  50% -20
t Vout  f 
iL  t  Asymptotically stable
 d1Tsw
Tsw
d 2Tsw  d3Tsw d 4Tsw
Vc  f 
I peak Vc
Ri -40

-45

IL 0
D  50% (°) -90

t -135
Asymptotically unstable
Vout  f 
 The inner current loop can bring instability -180

-225
Vc  f 
 Slope compensation helps stabilizing the loop 10 20 40 100 200 400 1k 2k 4k 10k 20k 40k 100k
 Leading-Edge Blanking
 For reliable operations it is important to sense the switch current cycle by cycle
 Regardless of the control mode, the inductor current needs to be cleaned up
Vbulk

2 PWM .
reset . Can potentially
vsense  t 
700m
false-trip the
controller
500m
DRV
300m
Clean
edges LEB
100m
S2 CS 1
2

-100m
vsense  t 
Rsense 3.122m 3.126m 3.131m 3.135m 3.139m
S1

 The LEB cleans the signal up  The voltage image of the

DRV
and ensures reliable operation current is polluted by spikes

t LEB
 Skip Cycle and Frequency Reduction
 For efficient light-load operations, frequency foldback can be implemented
 In no-load conditions the part can enter skip cycle to further improve standby
Typical drain current in skip mode
Fsw
Fixed High
100 kHz frequency power

Nominal Skip cycle

power

No load
20 kHz Light-load
operation Low power
skip
Pout iD  t 
 Frequency linearly reduces as power decreases
 Hysteretic Converters
 A comparator affected by a hysteresis band trips a constant-on-time circuit
 The circuit is intrinsically instable and does not require compensation
(A) (V)
L1 7.00 7.00
rC iL  t 
ton is constant
Vin D1 Rload vDRV  t 
Cout 5.00 5.00

R1
3.00 3.00
Q

-
S
R

+
1.00 1.00
On-time

Vref R2
5A
A hysteretic -1.00 -1.00
50 mA
min toff comparator
494u 520u 545u 571u 596u

 The frequency adapts to the input and output conditions

 The circuit naturally enters a low-frequency mode in light-load conditions
 Hysteretic Converters with an Op-Amp
 The hysteretic constant-on-time converter can be supplemented with an op-amp
 The converter operates in current-mode control with a valley setpoint adjustment
L1
iL  t  (V)
rC
Vin
520m
vsense  t 
D1 Rload R1
Cout
260m
C2
verr  t 
C1
0

verr  t  R2
Q

+ -260m The error voltage sets

R

iL  t  the valley current

On-time -
Vref Rlower -520m
Rsense
vsense  t 
1.03m 1.14m 1.26m 1.37m 1.48m

 Immune to sub-harmonic oscillations

 Naturally goes in standby mode in light-load
 Agenda
 Power Conversion Mechanisms
 Switching Cells and Control Schemes
 The Buck
 The Boost
 The Buck-Boost
 Introduction to Control Loop Design
 EMI Filter Interaction
 Introduction to Simulation
 The Buck Converter
 The buck converter reduces the input voltage and operates up to 100% duty ratio
 The common SW-D node swings between Vin and 0 V
SW Vin 0V
Vout Vout Low-impedance square generator
L1 SW L1 Vin

0V

Vin C2 RL Vin C2 RL LC filter

ton
D1 D1 L1 Vout
IL toff
IL IL D
Vin C2 RL
During DTsw During 1  D  Tsw
I peak

ton iL toff iL
2nd-order system
I valley
Vin  Vout Vout
Son  Tsw  DTsw  1  D  Tsw Soff  
L1 L1
 Transfer Characteristic of the CCM Buck
 Consider the average inductor voltage to determine the dc transfer characteristic
 Express the volt-seconds of the inductor during the on- and off-times
iL a vL  t 
V-s balance
iL L Vout
Vin  Vout
c iC + vL  t  Tsw
0V
p vL  t 
Vin Aon
vL  ton   Vin  Vout
C R 0 Aoff
t

iR Vout
iL -

During ton or DTsw

Vin  Vout  DTsw  Vout 1  D  Tsw
iL  t 
a
iL L Vout I peak
c + iL  t 
p vL  t  iC
Son Soff
I out Vout  DVin
Vin iL vL  toff   Vout
C R I valley
ton toff
iL iR -
t

During toff or 1  D  Tsw 0 DTsw Tsw Vout

M  D
Vin
 Transfer Characteristic of the DCM Buck
 When the load current decreases, the valley current goes to 0 A and deadtime appears
 The condition at which DCM occurs is determined by the critical input or load value
vL  t 
a

p L Vout Vin  Vout

c +
iC
Vin C R
0 t

Vout 2
iC - M 
8LFsw
iL  t  1 1
During D3Tsw RD12
D1Tsw D2Tsw D3Tsw
R  Rcritical  CCM  Depends on Fsw
2 LFsw
Rcritical  R  Rcritical  BCM I peak
1 D  Depends on R
R  Rcritical  DCM Son Soff
iL  t  I out
t

0 ton Tsw

C. Basso, SMPS SPICE Simulations, McGraw-Hill, 2014

 Input and Output Currents
 It is important to know the nature of the circulating input and output currents
 The inductance located in the output naturally smooths current which is non-pulsating
 The input current is pulsating and highly discontinuous: high ac component

 The output capacitor is non-

iC  t  pulsating and is of low rms value

iIN  t   The input current is highly

discontinuous and contributes a
high rms value
iL  t   The inductor current is a smooth
triangular waveform

 The buck converter is quiet on the output and noisy on the input: difficult EMI
 Peak Current and Inductor Value
 From the output current and the acceptable ripple you can pick the right switcher
 The sweet spot of the inductor ripple current is around 40% with modern core
 How to select the switcher maximum peak current?
I peak  Assume Vin = 12 V, Vout = 5 V, Iout = 1 A
I L
 Select a ripple of 40%
iL  t   I out
I L
I peak  I out 
iL  t  2
I valley 40% I out  0.4  1 
I peak  I out   I out 1  
Vout 2  2 
I L  40% I out  1  D  Tsw
L
Vout 1  D   0.4  1 
L L  73 µH I peak  1 1    1.2  I out  1.2 A
I out Fsw  0.4  2 
100 kHz Choose a switcher with at least this peak
 Simulation Gives Immediate Results
 It is interesting to run a quick SIMPLIS simulation to verify the calculated values
 The buck can be operated at its nominal conditions 5 V/1 A from the 12-V input
Vsw
S2
72u IC=0 IL VOUT VOUT
Iin R1
rL L1 50m
1u F1 I1
R3
{Ri}
D1 IC 5
{Vin}
Vin Ideal_Diode + C13
680u IC=0

U3 V4
DRV AC 1 0
S
R
Q Can be replaced
QN by a switch
FB
U2 OPIN
{kr}
{C2} IC=0

U4
1K C3 R8
{R2} {C1} IC=0 {Rupper}
R4
Vclock maxDC G1 R6
100p IC=0 R2 C5
C2 1
Vsaw
FB
iL  t 
330m R5 X1
IC=1 OPSIMP
FB 1 U1
R7 DRV
V1 R11
{Rlower}
{Vref1}
G2
VCS

Vin  12V Vout  5V Iout  1A Fsw  100kHz I r  40%

Vout Vout  ( 1  D)
D   41.667% L1   72.917H
Vin Fsw  Iout  I r
 High-Side Buck
 The control section can be ground-referenced or floating for high-voltage switchers
 The output voltage is rectified and referenced to the source of the switcher

Vcc
Vout
D S 5V

ground

230 V rms Control Vout

HV switcher

 Any low- or high-voltage switcher can be used in a floating configuration

 Watch for feedback polarity which should allow duty ratio reduction with bias increase
 Buck-Derived Topologies
 The tapped-buck converter can be used for large differences between Vout and Vin
 It brings a higher duty ratio despite a low output voltage
N1 N2
SW L2 SW L2

N2 N1

Vin D Vin D
C1 Rload C1 Rload
D1 D1
N N2
n 2 n
N1 N1

D
 The transfer characteristic of the tapped buck is M 
1 D
D
n
 Typical Tapped Buck Application
 A tapped buck lends itself well to high-voltage non-isolated converters
 The duty ratio is increased owing to the tap in the inductor

Vout 12
D   3.6%
Vin 330
With a tapped
inductor

M 12 330
D   10%
M  n 1  M  1 12 
12 330  1  
3  330 
https://www.onsemi.com/pub/Collateral/AND8318-D.PDF
 The Forward Converter
 A transformer provides the necessary galvanic isolation for safe operations
 The transformer features 3 windings and one of them performs core reset
D1 L1
1:N NVin  V f1
. V f2
V f1 D2 C2 Rload L1
. .
Vin
NVin  V f1 D2 C2 Rload

Isolated
buck converter

 Well suited for low output voltage with strong output currents
 Very popular in multi-output coupled-inductors silver boxes for computers
 Agenda
 Power Conversion Mechanisms
 Switching Cells and Control Schemes
 The Buck
 The Boost
 The Buck-Boost
 Introduction to Control Loop Design
 EMI Filter Interaction
 Introduction to Simulation
 The Boost Converter
 The boost converter increases the input voltage up to a certain limit
 The common SW-D node swings between 0 V and Vout
VOUT
L1 0V
Vout D1 Vout
D1 L1 IL
IL IL IL

Vin C2 RL Vin C2 RL
SW SW
IL IL IL

During DTsw During 1  D  Tsw

I peak

ton iL toff iL

I valley
Vin Vout  Vin
Son  Tsw  DTsw  1  D  Tsw Soff  
L1 L1
 Transfer Characteristic of the CCM Boost
 Consider the average inductor voltage to determine the dc transfer characteristic
 Express the volt-seconds of the inductor during the on- and off-times
p Vout vL  t 
L V-s balance
iC Vin
c
vL  t 
i L
a
iC + vL  t  Tsw
0V
vL  ton   Vin Aon
Vin iL C R 0 Aoff
-  Vout  Vin   Vout  Vin 
iL iC
During ton or DTsw iL  t  Vin DTsw  Vout  Vin 1  D  Tsw
p Vout
L
iL iC I peak
iL c +
vL  t  a iL  t  Vin
vL  toff    Vout  Vin  Son Soff
C R I out Vout 
Vin 1 D
ton toff I valley
-
iL iR
0 DTsw Tsw
During toff or 1  D  Tsw 1
iL  t  Tsw
 I out 1  D  M 
1 D
 A Finite Conversion Ratio
 The conversion ratio is limited by ohmic losses in the circuit
 The output can fall if duty ratio keeps increasing past a limit: this is the latch-up effect
rL L
4
1
1 V
1D
M  out 1 D
Vin
M .2( D 0.1)
rDS  on 
Vin M .2( D 0.2)
3

iL  t  Latch-up M .2( D 0.3)

effect M .2( D 0.4)

M .2( D 0.5) 2
iL  t  Current is limited M .2( D 0.6)

I max M .2( D 0.7)

M .2( D 0.8)
1
M .2( D 0.9)
t
id  t  DTsw
I max rL   
0.524
0
I out 0 0.2 0.4 0.6 0.8 1
t 0.1 0.1 D 0.9 0.9
Tsw Duty ratio
 Transfer Characteristic of the DCM Boost
 As the load current decreases, the converter enters discontinuous conduction mode
 The catch diode spontaneously blocks when the inductor current reaches 0 A

p
Vout vL  t 
a iC Vin
+ -
iC
L c +
0 t
Vin C R
 Vout  Vin  2 D12
1 1
- L
iC M 
iL  t  2
During DT or D3Tsw
D1Tsw D2Tsw D3Tsw
 Depends on Fsw
R  Rcritical  CCM I peak  Depends on R
2 LFsw
Rcritical  2 R  Rcritical  BCM iL  t 
D 1  D  Son Soff
R  Rcritical  DCM I out
t

0 ton Tsw L
L 
RTsw
 Input and Output Currents
 It is important to know the nature of the circulating input and output currents
 The inductance located in the input naturally smooths current which is non-pulsating
 The output current is pulsating and highly discontinuous: high rms component

iC  t   The output capacitor is highly

pulsating and is of strong rms value
capacitive current
id  t   The input current is very smooth
and presents a good EMI signature
diode current iL  t   iIN  t   The inductor current is a smooth
triangular waveform

input current

 The boost converter is quiet on the input and noisy on the output
 Rms Current in the Output Capacitor
 The output current is highly discontinuous and stresses the output capacitor
 It is important to determine the worst-case rms current in this capacitor
 Make sure the selected type accepts this stress at the highest operating temperature

id  t  ac iC  t 
iC  t  iR  t   I dc
dc
C R 0V
id  t 

I rms  I ac 2  I dc 2 iR  t 

I C , rms  I d 2  I dc 2
iC , rms  1.452  1.0212  1.03 A
 Multiphase to Reduce Ripple Currents
 High-power types of boost converters impose a heavy rms burden to the capacitor
 Adding extra switching phases reduces the input and output ripple currents
IL2

F2

iC  t 
7m

CS2

IL1

7m
F1 3.3u 3.3u
L1 L2

iin  t 
Iin CS1

Input current
FB VOUT
IN OUT
=OUT/IN
R1 R2
800u 800u
6
Vin

Vout Vout
D1

D2
C2
Ideal_Diode

Ideal_Diode
Q1 6m Q2
S2

S1
R4 R3
800m 2m

Isw1 IC
Isw2

Clk1
S
R
Q

QN
Clk2
S
R
U2
Q

QN
iL1  t  iL2  t 
X1
U5
50m 50m

U6 U7
G2 G3

U4 VdcMax1 U3 VdcMax2
Ramp1 CS1 Ramp2 CS2
Vclock1 Se2
Se1

Clk2
VFB
G1

1 1
Vclock2 AC 1 0
R12 R9 FB
R5
1 R7
IC=1 50m V3
V1
2.9
I C , rms  15 A I C , rms  2.65 A
1 phase 2 phases
 Synchronous Rectification
 Efficiency depends on the difference between output and input voltages
 Synchronous rectification further helps improving performance at low Vout

Q
Q

 A second switch is added to short the catch diode Typical curve for the ISL91133

 Some dead-time is inserted between transitions to avoid shoot-through

 Full-Wave Rectification
 A resistor supplied by the mains absorbs a sinusoidal current in phase with the voltage
 A full-wave rectifier connected to the mains absorbs a non-sinusoidal current
 International standards impose regulatory limits for a power greater than 75 W
Vbulk

iin  t 
D1 D2
mur840 mur840
Ibulk

C1 IC=1 Input current

180u R1
vbulk  t 
D3 D4 R2
mur840 mur840 3.4

VA Rectified voltage

 The capacitor refueling occurs only at the voltage peak PF  1
W
PF: power factor
 Power Factor Correction
 A power factor corrector forces the absorption of a sinusoidal current
 The boost structure is the most popular converter for this application
 Low-power PFCs operate in BCM while high-power pre-converters run in CCM
Downstream
Pre-converter converter

Variable frequency

iin  t 
Sinusoidal
current
Constant-on-time PFC

vout  t 
 Output ripple limits crossover frequency
 Agenda
 Power Conversion Mechanisms
 Switching Cells and Control Schemes
 The Buck
 The Boost
 The Buck-Boost
 Introduction to Control Loop Design
 EMI Filter Interaction
 Introduction to Simulation
 The Buck-Boost Converter
 The buck-boost converter increases or decreases the output voltage
 The converter inverts the input and the delivered voltage is negative
Vin VOUT
SW Vout D1 Vout
D1 SW
IL IL IL
+ - - -
Vin L1 C2 RL Vin L1 C2 RL
- + + +
IL IL
IL IL

During DTsw During 1  D  Tsw

I peak

ton iL toff iL

I valley
Vin Vout
Son  Tsw  DTsw  1  D  Tsw Soff 
L1 L1
Vout is negative
 Transfer Characteristic of the CCM Buck-Boost
 Consider the average inductor voltage to determine the dc transfer characteristic
 Express the volt-seconds of the inductor during the on- and off-times
Vout
iL a p iC vL  t  V-s balance
Vout is a

c - Vin negative value

vL  t  Tsw
0V
iL C R
Aon
Vin Aoff
+ Vout
L vL  t  iC
vL  ton   Vin
iL iC Vin DTsw  Vout 1  D  Tsw
During ton or DTsw Vout
iL  t 
a p iL iR
I peak
D
c -
Son Soff
iL  t  Vout  Vin
iL C R
I out 1 D
Vin ton toff I valley
+
L vL  t  iC
vL  toff   Vout 0 DTsw Tsw
iL D
iL  t   I out 1  D 
Tsw M 
During toff or 1  D  Tsw 1 D
 A Finite Conversion Ratio
 Resistances in series limit the maximum peak current in the inductor
 The conversion ratio is thus limited as in the boost converter case
rDS  on 
4
Vout D
D M 1 D
1 D Vin
Vf Latch-up
M .1( D 0.1)

rL rL M .1( D 0.2)
3

effect M .1( D 0.3)

-
M .1( D 0.4)

Vin M .1( D 0.5) 2

+ R Vout
- M .1( D 0.6)

+ M .1( D 0.7)
L VL ,on VL , off L M .1( D 0.8)
1

I out 1  D  - + I out 1  D 
M .1( D 0.9)

rL   
0.092
During DTsw During 1  D  Tsw 0
0 0.2 0.4 0.6 0.8 1
0.1 D 0.9
0.1 0.9
Duty ratio
 Transfer Characteristic of the DCM Buck-Boost
 The converter enters the discontinuous conduction mode in light-load conditions
 Both switches are blocked and the capacitor alone feeds the load
Vout
vL  t 
a p iC Vout is a
Vin negative value
deadtime

c -
0 t

Vin Vout
C R
+ 1
+ M   D1
L iC iL  t  2 L
-
iC
D1Tsw D2Tsw D3Tsw

During DT or D3Tsw  Depends on Fsw

I peak
R  Rcritical  CCM  Depends on R
2 LFsw iL  t 
Rcritical  2 R  Rcritical  BCM Son Soff
I out
1  D  t
R  Rcritical  DCM ton Tsw
0
 Input and Output Currents
 The buck-boost is the worst of all basic switching cells
 The inductor is ground referenced and connects alternatively to the input or the output
 Input and output current are pulsating and highly discontinuous: high rms component
iC  t 
 The output capacitor is highly
capacitive current
pulsating and is of strong rms value

iin  t   The input current is also pulsating

input current implying a poor EMI signature

iL  t   The inductor current is a smooth

triangular waveform

 The buck-boost converter is noisy on the input and noisy on the output
 Simulation of a Buck-Boost Converter
 The negative output requires an inversion for proper regulation
 This is a current-mode-controlled application featuring slope compensation
Inverter
Vsw
Iin S2 -1
Iout VOUT VOUT

R1
50m
I1 E1
R3
{Vin} F1 8
Vin {Ri}

L2 C13
680u IC=10
+

250u IC=0

Qdrv FB VOUT
IN OUT
X1
U3 =OUT/IN V4
DRV AC 1 0
S Q
R OPIN FB
QN IN OUT
=OUT/IN

{kr} Ramp
Vclock VCS OPIN
U4
1K {C2} IC=0

R4 C3
G1
100p IC=0 R2
1 {R2} {C1} IC=0 R8
C2
Vsaw {Rupper}
R7
R6 C5
IC=1

R5 330m
1

FB

OPSIMP

VSET
G2
Compensation U1
V1 R11
{Rlower}
network {Vref1}

Output voltage
 Four-Switch Buck-Boost Version
 A 4-switch version operates in buck or boost and no longer inverts the output
 The control requires a more complicated control logic
S1 L S3 L S3
 S1 and S2 are
S1 acting in buck
Vin S2 S4 Vin S2 mode
C C  S3 and S4 are
S4
respectively on
Buck mode and off.

L S3
 S1 and S2 are
S1 respectively on
Vin S2 C and off.
S4  S3 and S4 are
actuated in boost
Boost mode
mode.
 The Flyback Converter
 Adding a transformer brings galvanic isolation: flyback converter
 The converter can now deliver positive or negative levels, increase or decrease Vin
1:N

+
Vout P1 S1 Vout
0V
Vin Vin Vin

Vout
ND
M 
Buck-boost Buck-boost Buck-boost
1 D
ground-referenced input-referenced isolated

 The flyback converter can be identified with its winding dots located in opposite ends
 A clamping network is necessary to protect the power switch
C. Basso, The Dark Side of the Flyback Converter, APEC Professional Seminar 2011, Fort Worth (TX) 2011
 Agenda
 Power Conversion Mechanisms
 Switching Cells and Control Schemes
 The Buck
 The Boost
 The Buck-Boost
 Introduction to Control Loop Design
 EMI Filter Interaction
 Introduction to Simulation
 What is a Control System?
 An open-loop system links an output with a control variable

H s
control output
U s Y s  U s H s
Plant

 A control system observes the output and minimizes the error by closing the loop
Compensator

 s Verr  s 
+
U s Y  s   Verr  s  H  s 
-
Plant
G s
U  s   Y  s   G  s 
H s
Return path input output
 What is Loop Gain?
 The error amplifier and the power stage define the system loop gain
 Its value affects the stability and robustness or susceptibility of the circuit
Forward path
Error amplifier

Reference +  G s H s Output

voltage Error Control voltage
voltage voltage
-
Power stage
Return path

 The loop gain designated as T is defined as T  s   G  s  H  s 

Vout  s  H sG s T s
  If T >> 1 Vout  s   Vref  s 
Vref  s  1  H  s  G  s  1  T  s 

T  s   1 or 0 dB
1 T s  0  Nyquist stability criterion
T  s   180
 Shaping the Loop with the Compensator
 The compensator builds the error variable and ensures stability
 Insert poles and zeros to create the compensation strategy
 Choose how to cross over at fc with phase and gain margins
Compensator dynamic response
G s G  f 
  s Error
Vref Verr  s 
0 processing

k  Vout  s  Verr  s 
Scaling factor
G  s  G f 
Vout  s 
1 10 100 1k 10k 100k

 The block amplifies and shapes the error  between Vref and Vout
 Minimize the error between the setpoint and the output
 Building the Compensator – the Analogue Way
 Associate active and passive components to form the compensation chain

  s Verr  s  D s

Vref  s  G s Fm  s  H s Vout  s 
 compensator modulator plant
scaling factor
kD

1. Select poles/zeroes placement

2. Calculate components values
3. Solder resistors and capacitors  s

Change in strategy requires

new components values G s
 How do you Build an Analogue Compensator?
 A compensator can be a passive or active filter shaped for a specific response
Vout Vout Vout

verr
verr 

Op amp TL431 OTA

 Passive components suffer drawbacks:  Active components are not perfect!

1. Tolerance, aging 1. Open-loop gain, bias requirements
2. Sensitivity to temperature, humidity 2. Limited in bandwidth, slew-rate
3. Temperature drift

67
OTA: operational transconductance amplifier
 Building the Compensator – the Digital Way
 A digitally-controlled system mixes sampled and continuous-time data
Digital comparator
  Vc D
Vref  Vout
 Digital controller Digital modulator plant

000
N bits 001 N-bit scaling factor
010
011 quantizer
kD
100

Quantization Sampling
(ADC)
v  n
0010110 v  n  1 v  n  1 v t 
011
10111 Ts
t t
 n  1 Ts nTs  n  1 Ts
Binary values Discrete time Continuous time
M. Jovanović, Introduction to Digital Control of
* designates a discrete variable Switch-Mode Converters, in-house course, PHX 2014
 How do you Build a Digital Compensator?
 You can start from a continuous-time transfer function expressed in s
R C f Im  z 
f

Map into unstable

Difference
Ri region

Vout  s  the z-domain equation

Verr  s  1
b0Verr  z   b1 z 1Verr  z 
Vref stable Re  z 
region
 a0Vout  z   a1 z 1Verr  z 
Rf 1
sVerr  s    s Vout  s   Vout  s 
Ri Ri C f

 Code the filter equation with a micro-controller or hard-wire it in a FPGA

001011
0011
 No tolerance or age issues Learning
10111
 Flexibility and optimization curve
 On-the-fly poles-zeroes changes
 More complex to analyze
 Warping occurs during mapping
Digital control  Lower crossover systems
69
 Why do we need to Close the Loop?
 You need to compensate the power stage deficiencies to obtain:

 Speed  High bandwidth

 Precision  Large dc gain
 Robustness  High gain below fc
overshoot precision
2.5 V 5V

vout  t 
0V vref  t  0V
speed
Stimulus Response
What compensation strategy?
 Power Stage Transfer Function
 The control-to-output transfer function is the starting point:
 Use a frequency-response analyzer (FRA) to extract it
 Run a simulation with an averaged model to obtain a Bode plot
 Determine the transfer function analytically with small-signal analysis
Vsw
output
Magnitude
S2
VOUT
Read magnitude
100u IC=0 IL VOUT

rL
1u
L1
F1
R1
50m I1 (response)
{Vin}
Vin
D1
Ideal_Diode
{Ri}

+ C13
R3
1
at crossover
680u IC=0

Vout  f 
Qdrv

U3
X1
V4
VFB  f 
DRV AC 1 0
S Q
R
QN

U2
{kr}
FB
OPIN Phase
{C2} IC=0

U4
1K
{R2}
C3
{C1} IC=0
R8
{Rupper}
Read phase
at crossover
R4
Vclock maxDC G1 R6
100p IC=0 R2 C5
C2 1
Vsaw
FB

control 330m R5 Vout  f 

FB 1
IC=1
R7
OPSIMP
U1 
(stimulus) FB
IN OUT VOUT V1
{Vref1}
R11
{Rlower} VFB  f 
G2 =OUT/IN
VCS
OPIN FB
IN OUT
=OUT/IN

C. Basso, Transfer Functions of Switching Converters, Faraday Press, 2021

 Compensator Types
 Poles, zeroes and gain are your tools to shape the compensator response
 Phase margin depends on the wanted transient response
 Crossover depends on the expected reaction speed
fc fc
Type 1 Type 2 Type 3
G f  G f  G f 

0 to 90 0 to 180

G  f  G  f  G  f 
0° phase boost Up to 90° phase boost Up to 180° phase boost
1 pole at the origin only 1 pole at the origin 1 pole at the origin
1 zero and 1 pole 2 zeroes and 2 poles
 Isolated Feedback
 An optocoupler brings the isolated output voltage image to the primary side
 This component degrades the compensator response and must be characterized
Vdd
Vout
R pullup RLED R1 O  s 

VFB

Rbias
O s

C2 C1 -3 dB

TL431 Rlower 4k

 The optocoupler features a low-frequency pole

Non-isolated Isolated
primary side secondary side
 Characterize it carefully
 Compensated Converter
 Check the loop gain and make sure phase and gain margins are within safe limits
 A transient step will tell you if the undershoot meets the specs
Loop gain Current is stepped from 3 to 5 A in 1 A/µs

Tf
vFB  t 
Crossover frequency fc
|T(fc)| = 1
Loop phase iL  t 
T  f 
m
vout  t 
 Agenda
 Power Conversion Mechanisms
 Switching Cells and Control Schemes
 The Buck
 The Boost
 The Buck-Boost
 Introduction to Control Loop Design
 EMI Filter Interaction
 Introduction to Simulation
 A Noise Source
 A switching converter is a noise generator in essence
 Abrupt voltage changes impose circulating currents in parasitic capacitors
 Rapid current changes excite parasitic networks and generate ringing
1 1

vDS  t  id  t 

High-current loops are naturally radiating noise and must be treated

 Radiated or Conducted?
 Noise can be injected in the supply cables and return to the source
 This is so-called conducted parasitic noise
 Noise is coupled in the air through various mechanisms and disturb equipment
 In this case, we talk about radiated noise

Coupling in the air

i t 

CM DM

Conducted noise Radiated noise

150 kHz – 30 MHz 30 MHz – 1 GHz
 The Importance of the Loops
Bulk

. Identify the high-current switching

Cbulk Keep area small small Vout
Rsense . paths and keep connections short
off
Q1 Reduce the area enclosed by the
on
Aux. ground circulating currents to minimize
iG,off iG,on
on radiated noise
Caux small
* .
* Pay attention to the routing and how
off
GND DRV Vcc Daux you select your return grounds
Decoupling components must be
CS FB
PWM located closely to the controller
Controller

Route FB and
 Star-cabling around the bulk
* *
return along capacitor is recommended for surge
*
CFB performance
Low-power optocoupler
ground
Cy
* Close to IC CFB
Common mode currents This ground must be quiet
Surge current - go to the IC GND
 Filtering the Conducted Noise
 A LC filter is selected to block high-frequency emissions back to the source
 The attenuation is calculated depending on the current to be filtered signature
I out

L
C
I in
source

2
Assume a 50-dB I in  0 
attenuation at 100 kHz  
I out   
f0  Afilter  f SW  3m  100k  17 kHz
 Watch for the Interaction with the Filter
 The incremental input resistance of a switching converter is negative
 When loading an LC filter, deleterious interaction is likely to occur
 Filter damping is an absolute necessity to stay away from troubles

Pout  Pin 1
P 
d  out 
dI in Vin  V P
0.8
  in    out2
dVin dVin Vin
I inVin  I outVout I in  A  0.6

The incremental input Vin 2

0.4 Rin  
resistance is negative Pout
Pout
I in Vin   0.2
10 15 20 25 30
Vin
Vin  V 

Negative incremental resistance occurs because of closed-loop operation

 A Negative Resistance Oscillator
 A negative load for the LC filter can compensate insertion losses
 Damped or sustained oscillations occur depending on resulting damping
1  s z 1
H  s  H0 Q
s2
s 2 If ohmic losses are gone, the
2
 1 damping ratio is zero, Q is infinite.
0 0Q
 The poles can jump in the right half-plane and instability occurs!

150
Input voltage
rL L Vout
rC 130 Output voltage
(V)
Vin I 110

C 90.0

P (constant) 70.0  0  0  0
I  out Negative resistance
Vout Infinite bandwidth 3.64m 10.9m 18.2m 25.5m 32.7m
 The Filter Affects the Transfer Function
 Inserting a front-end filter can potentially bring instability to the converter
 Power stage response and output impedance can be altered by the LC network
0
40 Z out ,CL  f  With filter
 20

20

Vout  f   40
(dB)  (dBΩ)
 0 Without
 D f 
 60 filter
 20
 80

 40
 100
3 4 5 3 4 5
10 100 110 110 110 10 100 110 110 110
fk
Control-to-output transfer function Closed-loop output impedance

 Magnitude distortion and severe output impedance peaking are observed

 Keep the Filter Output Impedance Low
1. Plot the input impedance of the compensated converter
2. Add the output impedance of the EMI filter
 Any overlap represents a possible condition for instabilities
60

(dBΩ) Z in ,CL  5.5 kHz   Z th  5.5 kHz 

40

 Z th  i 2  f k   Z in ,CL  f 
20 log 
 1  20
10 dB
 Z inCL i 2  f k  
20 log  10 dBΩ Target
 1 
0

3.3 Ω

 20
Z th  f 

3 4 5
10 100 110 110 110
f
 Losses in the Filter Participate to Damping
 Damping consists of adding extra losses to dissipate power
 The series connection of a capacitor and a resistor offers a simple solution
 The resistor and the capacitor can be optimally determined

 2 
Lf R0  R0  R0 2  4  Z out mm  
R0 
L1 Cf n  2
  3.5
Rdamp  out mm 
Z
Z out mm
2 2  n target
C3  2
R0 n
Cdamp
 4  3n  2  n  Rdamp  R0 Qopt
Qopt 
2n 2  4  n 
Cdamp  nC f

 An electrolytic capacitor with its ESR can do the job

C. Basso, Input Filter Interactions, APEC Professional Seminar, Tampa (FL) 2017
 Testing the Transient Response
 It is important to check the response to a load step once damping is done
 Two different damping combinations bring different responses in this case

5.32 Non-optimal design In one case, the filter has

Rdamp  1.8  been studied together with
5.16
Cdamp  20 µF the converter for an optimal
combination
In the second case, filter
(V) 5.00
was damped after
compensation strategy was
Rdamp  0.487 
4.84 designed
Cdamp  141µF
Optimal design
4.68
vout  t 
10.5m 11.5m 12.5m 13.5m 14.5m
 Agenda
 Power Conversion Mechanisms
 Switching Cells and Control Schemes
 The Buck
 The Boost
 The Buck-Boost
 Introduction to Control Loop Design
 EMI Filter Interaction
 Introduction to Simulation
 Why Simulating Switching Power Converters?
 Check if the converter works on the computer before a prototype is built
 Are operating voltages and currents within expected safe limits before power on?
 Power libraries do not blow and let you explore many What If? scenarios
 Easily check impacts of parameters variations such as load, input voltage, ESRs etc.
 Work a compensation strategy easily with the ability to draw Bode plots
 Stabilize the converter with the simulator and confirms margins on the bench
Simulations do NOT replace experiments: always build a hardware prototype
Duty ratio
IN Duty Cycle IC=1
DRV VOUT VOUT
Iout
FB VOUT
IN OUT
TX1 R9 R4
=OUT/IN IL 20m
V1 R1
P1 S1
OPIN FB 120 5
IN OUT Frequency
+ C13
IN Frequency L1
=OUT/IN 250u IC=0 5m IC=0

R2 VOUT

22k
IC=1
R3 C1 P2
22p
Vmod
AC 1 0

OPIN
X1
VDS R8 R5
{RLED} {Rupper}

U2 U35 Optocoupler
S1 U7
D Q S Q DRV IC=1 C8 FB FB
R R31 47p IC=0
QN QN
U3 SET
DRV RST
R7
{C1a} IC=0
{Rpullup}

I1 + C2
V2 10u {Ccol} IC=0 C3
U1 U6
45m
TL431_CB

FB Ct
+
V4
3 R6
{Rlower}
Jim Williams - LT
S2

38p IC=0
 Switching Models
 A cycle-by-cycle model represents the entire switching power converter
 Include parasitic terms and obtain excellent correlation with bench results
 Simulation time can be long and prone to convergence issues
 No access to ac response for loop stabilization
X1
Isec
Vsec
Iout Simulated waveforms Measured waveforms
XFMR D1 L1 R16
RATIO = -0.08 MBR140P 2.2uH 10m vout

12 4 31 17 Vout
R3 1
200m
R4 R17
100m 300m
6
Iprim Rload
Iripple1 9 32 13.4
L2
3.5mH C1
Istartup 470uF C2
IC = 5.5 10uF
16
L5

vDS t
Vdrain
X5
NCP1200
80uH
100 V/div
100V/div
Vdrain
R15 0
Vadj 8
1 8 470
IDrain
Vinput
126
2 7 19 vout vDS  t 
10
Drv
3 6 5
Vcc
X4
X2 MOC8101
4
NCP1200
5 13 MTD1N60E
C3
150p
15
R2
iD  t 
14k
C5

R5
100nF
IC = 2.5

Vsense
iD t
500mV/div
100m 500 mV/div
X3
14
Vsense TL431

505.00U 515.00U 525.00U 535.00U 545.00U

18

Rsense
23 2.8 R7
Cvcc 10k
10uF
IC = 11.99

VFB Simulation really works!

 Averaged Models
 Modeling the small-signal response of a switching converter is a difficult exercise
 The problem comes from time-discontinuous waveforms
linear Control-to-output transfer function
Singularity How do
we get this? H  f 
Cannot
differentiate Hf
DTsw 1  D  Tsw
linear linear
vDRV  t  on time off time

 The PWM switch introduced in the 90’s by Dr. Vorpérian offers an elegant solution
 Switching waveforms are averaged and described by a time-continuous expression
vcp  t 
dTsw Small-signal
dTsw
Vin 1 vˆcp  Dvˆap  Vap dˆ
vcp  t   Vcp   vcp  t  dt  D vap  t   DVap
vcp  t  Tsw Tsw 0
Tsw Vcp  DVap
t Dc equation
Tsw
 Ac Analyses with Averaged Models
 Averaged models are free of switching component and simulate fast
 They work in transient and ac analyses: small-signal response is immediate
 There is no averaged model for the LLC converter

90.0V 458mV Power stage response of a CCM flyback

5 2

X1 Vout  f 
PWM switch VM
d
a

PWMVM
L = 600u
response D f 
Fs = 65k X2 Vout
XFMR
RATIO = -250m
-76.1V
1 4
p

19.0V
c

Vin
90 0V 3
rC Vout  f 
30m 
Rload D f 
19.0V 5
Lp
6
600u
V1
C1
458m
Dc operating 680u
AC = 1
stimulus point
1 10 100 1k 10k 100k
 Simulation Results you can Trust
 Simulation matches with hardware when parasitics are well extracted from components
 Run and test the compensation strategy and confirm bench measurements are ok

SPICE
FRA
SPICE

FRA

 When the computed model is validated you can run in-depth analyses with Monte Carlo
 Piece-Wise Linear Simulation Engine
 Piece-wise linear simulators can extract the ac response from a switching converter
 Build the circuit using classical switching components and run an ac analysis
 It works with any converter structure and there is no need for average model
Vin

VAL VAR
IC=1 IC=1
A S3 R3 B S2 R9

IMUL HBL IMUR L1

{9.5}
V3 100u IC=0 RPrim Ip N:1:1 OUT
385 OUT
HBL 20m Is1
HBR

IMLL IMLR HBR Im

TX1
VBL VBR 10m
RLK=100Meg
A P1 S1
LP ESR=300u 3.6
500u IC=0 C2 R10
B S4 IC=1 S1 IC=1 RSecondary
R2 R1
2m Ic
C1
S2
Ires
36n IC=190
Is2
TX2
230
OUT
R11
R6
50k CMP OUT
U1 1n IN OUT
V1 NCP4390_SIMPLE
AC 1 =OUT/IN
SROUT1 A C4
FB
OPIN SROUT2 B
CMP COMP
R4 Christophe Basso - Future Electronics
{Rupper} COMP ICS
VCS NCP4390 controlle
R5 GND
C7 {R2} October 2021 - Rev. 0.1
{C2}
R8 C3 C6 Duty ratio
{Rlower} 100p {C1} IN
VTRANS Duty Cycle

1
HBL

HBR
Frequency
OUT E1 IN
OPIN IN OUT OPIN IN OUT CMP Frequency
=OUT/IN =OUT/IN

A full-bridge LLC with NCP4390

Operating point
 Ac Analyses from a Switching Circuit
 The engine ac-sweeps the converter and delivers the control-to-output transfer function
 Determine the compensation strategy and automate components calculations
.VAR Gfc=-10 * magnitude at crossover * *
.VAR PS=-90 * phase lag at crossover * * Do not edit the below lines *
Selected * .VAR boost=PM-PS-90
crossover * Enter Design Goals Information Here *
*
.VAR G=10^(-Gfc/20)
.VAR k=tan((boost/2+45)*pi/180)
Vout  f  .VAR fc=1k * targetted crossover * .VAR fp=fc*k
.VAR PM=70 * choose phase margin at crossover * .VAR fz=fc/k
Verr  f  * .VAR a=sqrt((fc^2/fp^2)+1)
* Enter the Values for Vout and Bridge Bias Current * .VAR b=sqrt((fz^2/fc^2)+1)
* *
.VAR Vout=36 * Simpler approach if C2 << C1 *
.VAR Ibias=1m *
.VAR Vref=2.4 * .VAR R2=G*(Rlower+Rupper)/(Rlower*gm)
.VAR Rlower={Vref/Ibias} * .VAR C1=1/(2*pi*R2*fz)
Plug these .VAR Rupper={(Vout-Vref)/Ibias} * .VAR C2=1/(2*pi*R2*fp)
Vout  f  * *
 values in the macro * Choose OTA characteristics *
Verr  f  *
.VAR gm=300u * transconductance in Siemens *
*
*
.VAR R2=(a/b)*(fp*G)*(Rlower+Rupper)/((fp-fz)*Rlower*gm)
.VAR C1=1/(2*pi*R2*fz)
.VAR C2=(Rlower*gm/(2*pi*fp*G*(Rlower+Rupper)))(b/a)
*

Power stage response Components calculations are automated

 Check Compensated Response
 The compensated loop gain is immediate and you can check the transient response
 Run various analyses for robustness verifications once model is validated by hardware

Tf
fc

T  f  m

vout  t 
Response to a 5 to 10-A step, 1 A/µs
 Books on Power Electronics

Switch-Mode Power Supplies: SPICE Transfer Functions of Switching Converters

Simulations and Practical Designs, 2nd edition Christophe Basso – Faraday Press 2021
Christophe Basso – Mcgraw-Hill 2014

Fundamentals of Power Electronics, 3rd edition

Robert Erickson, Dragan Maksimovic –
How2Power, a free power electronics newsletter
Springer 2020

My personal webpage with all my APEC seminars and

lot of power electronics documents to download
Designing Control Loops for Linear and https://cbasso.pagesperso-orange.fr/Spice.htm
Switching Power Supplies
Christophe Basso – Artech House 2012 All the former Unitrode (now TI) seminars
are available from this landing page
 Conclusion
 Compared to linear regulators, switching converters excel in efficiency
 Switching converters are noisy in essence
 There are 3 basic switching cells made of a controlled switch and a diode
 Some of these cells can be extended to versions featuring isolation
 Different input/output characteristics are observed and must be understood
 Input/output currents can be smooth or pulsating and impact capacitors
 Loop control is an essential part of the design and cannot be neglected
 EMI filter are necessary to keep noise within accepted limits
 Their insertion can severely affect the converter performance
 Simulation offers a great way to test the converter on the computer
 Use it extensively while always using engineering judgment on the results