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Seuneedhi SinghQ: How many chapters does Digital Electronics contain?
A: twelve
Q: How many chapters does Digital Electronics have?
A: twelve
Q: How many chapters does Digital Electronics contain?
A: twelve
Q: How many chapters does Digital Electronics have?
A: twelve
Q: How many chapters does Digital Electronics contain?
A: twelve
Q: How many chapters does Digital Electronics have?
A: twelve
Q: How many chapters does Digital Electronics contain?
A: twelve
Q: How many chapters does Digital Electronics have?
A: twelve
Q: How many chapters does Digital Electronics contain?
A: twelve
Q: How many chapters does Digital Electronics contain?
A: twelve
Q: Who is the lecturer in electronics at Dayanand College, Hisar?
A: Shri. Rajesh Kad
Q: Who is the lecturer in electronics, Dayanand College, Hisar?
A: Shri. Rajesh Kad
Q: Who is a lecturer in electronics at Dayanand College, Hisar?
A: Shri. Rajesh Kad
Q: Who was the lecturer in electronics at Dayanand College, Hisar?
A: Shri. Rajesh Kad
Q: Who is a lecturer in electronics, Dayanand College, Hisar?
A: Shri. Rajesh Kad
Q: Who was a lecturer in electronics at Dayanand College, Hisar?
A: Shri. Rajesh Kad
Q: Who was the lecturer in electronics at Dayanand College, Hisar?
A: Shri. Rajesh Kad
Q: Who is a lecturer in electronics at Dayanand College, Hisar?
A: Shri. Rajesh Kad
Q: Who is the lecturer in electronics at Dayanand College, Hisar?
A: Shri. Rajesh Kad
Q: Who is the lecturer in electronics at Dayanand College?
A: Shri. Rajesh Kad
Q: What is the material contained in the book as per class room lectures?
A: The material is
neither too large nor too short
Q: What is the material in the book as per class room lectures?
A: The material is
neither too large nor too short
Q: What is the material contained in the book as per class room lectures?
A: The material is
neither too large nor too short
Q: What is the material contained in the book as per class room lectures?
A: The material is
neither too large nor too short
Q: The material contained in the book is as per class room lectures. • Written in
the simple language
A: The material is
neither too large nor too short
Q: What is the material in the book as per class room lectures?
A: The material is
neither too large nor too short
Q: What is the material contained in the book as per class room lectures?
A: The material is
neither too large nor too short
Q: What is the material in the book as per class room lectures?
A: The material is
neither too large nor too short
Q: What is the material contained in the book as per class room lectures?
A: The material is
neither too large nor too short
Q: What is the material in the book as per class room lectures?
A: The material is
neither too large nor too short
Q: Logic Operations 3.2 Postulates of Boolean Algebra 3.3 Two
A: Cyclic Codes
Q: What is Chapter 3 Boolean Algebra and Logic Gates?
A: Logic Operations
Q: What is Chapter 3 Boolean Algebra and Logic Gates 3.1
A: Logic Operations
Q: Logic Operations 3.2 Postulates of Boolean Algebra 3.4 D
A: Cyclic Codes
Q: Logic Operations 3.2 Postulates of Boolean Algebra 3.3 D
A: Cyclic Codes
Q: What type of code is Chapter 3 Boolean Algebra and Logic Gates
A: Alphanumeric codes
Q: What is Chapter 3 Boolean Algebra and Logic Gates?
A: Logic Operations
Q: What is a Chapter 3 Boolean Algebra and Logic Gates?
A: Logic Operations
Q: What is a chapter of Boolean Algebra and Logic Gates?
A: Chapter 3
Q: What is Chapter 3 Boolean Algebra and Logic Gates?
A: Logic Operations
Q: Theorems of Boolean Algebra 3.6 Venn Diagram
A:
3.5
Q: What Principle 3.5 Theorems of Boolean Algebra 3.6
A: uality Principle
Q: What are theorems of Boolean Algebra 3.6 Venn
A: Diagram
Q: What is the uality Principle 3.5 Theorems of Boolean
A: Algebra
Q: What are theorems of Boolean Algebra?
A:
3.5
Q: What are theorems of Boolean Algebra?
A:
3.5
Q: How many Variable K – map?
A: Four
Q: What is the uality Principle?
A: Theorems of Boolean Algebra
Q: How many variables are on the Karnaugh map?
A: Two
Q: What is the uality Principle?
A: Theorems of Boolean Algebra
Q: What is FPLA?
A: Field Programmable Logic Array
Q: Logic Families 7.1 AND Gate 7.2 OR Gate 7.3 NOT (Inverter
A:
7.1
Q: What does FPLA stand for?
A: Field Programmable Logic Array
Q: What is FPLA?
A: Field Programmable Logic Array
Q: What is another name for Field Programmable Logic Array?
A: FPLA
Q: What is FPLA?
A: Field Programmable Logic Array
Q: What is another name for Field Programmable Logic Array (FPLA) 6.9.2
A: Programmable Logic Devices
Q: What does FPLA stand for?
A: Field Programmable Logic Array
Q: What is the name of the Field Programmable Logic Array?
A: FPLA
Q: What does FPLA stand for?
A: Field Programmable Logic Array
Q: What is the name of the Integrated Injection Logic?
A: Complementary MOS (CMOS) Logic
Q: What is the name of the Integrated Injection Logic (IIL or I 2L
A: 7.7
Q: What is Integrated Injection Logic (IIL or I 2L)?
A: 7.7
Q: What is DCTL?
A: Transistor Logic
Q: What is DCTL?
A: Transistor Logic
Q: What is DCTL?
A: Transistor Logic
Q: What is the acronym for Integrated Injection Logic?
A: IIL or I 2L
Q: What is another name for Integrated Injection Logic?
A: IIL or I 2L
Q: What does DCTL stand for?
A: Transistor Logic
Q: What does DCTL stand for?
A: Transistor Logic
Q: Asynchronous Inputs 8.6 Master Slave J K flip-flop 8.7 Ex
A:
Q: Asynchronous Inputs 8.6 Master Slave J K Flip-flop 8.7 Ex
A:
Q: What is an Edge Detector Circuit?
A: 8.3.1
Q: What is the name of the circuit that detects the D Flip-flop?
A: Edge Detector Circuit
Q: What is the name of the circuit in which the D Flip-flop is located?
A: Edge Detector Circuit
Q: Asynchronous Inputs 8.6 Master Slave J K flip-flop 8.7 E
A:
Q: What is an example of a flip-flop Parameters Chapter 9?
A: Shift Registers
Q: Asynchronous Inputs 8.6 Master Slave J K flip-flop 8.8 Con
A:
Q: What is the name of the circuit that detects the edge of a flip-flop?
A: Edge Detector Circuit
Q: Asynchronous Inputs 8.6 Master Slave J K flip-flop 8.7 A
A:
Q: Asynchronous Counters 10.2 Asynchronous Binary Counter 10.3 Asynchronous Down
Counters 10.4
A:
Q: Asynchronous Counters 10.2 Asynchronous Binary (Mod-16) Counter 10.3
Asynchronous Down
A:
Q: Asynchronous Counters 10.2 Asynchronous Binary Counters 10.3 Asynchronous Down
Counters 10.
A: Asynchronous Binary (Mod-16) Counter
Q: 10.1 Asynchronous Counters 10.2 Asynchronous Binary Counter 10.3 Asynchronous
Down Counters
A:
Q: 10.1 Asynchronous Counters 10.2 Asynchronous Binary (Mod-16) Counter 10.3 A
A: ter 10 Counters
Q: 10.1 Asynchronous Counters 10.2 Asynchronous Binary Counters 10.3 Asynchronous
Down Counter
A:
Q: Asynchronous Counters 10.2 Asynchronous Binary Counter 10.3 Asynchronous Down
Counter 10.4 A
A:
Q: How many Counters are there?
A:
10.1
Q: What is an example of asynchronous counters?
A: Asynchronous Binary (Mod-16) Counter
Q: How many Counters are there?
A:
10.1
Q: Memory Parameters 12.2 Semiconductor Memories 12.3 Read Only Memories 12.
A:
12.3
Q: What is PROM?
A: Programmable Read Only Memory
Q: What is EEPROM?
A: Electrically Erasable Programmable Read Onl y Memory
Q: What is PROM?
A: Programmable Read Only Memory
Q: What is EPROM?
A: Erasable Programmable Read Only Memory
Q: What is PROM?
A: Programmable Read Only Memory
Q: What is EEPROM?
A: Electrically Erasable Programmable Read Onl y Memory
Q: Memory Parameters 12.2 Semiconductor Memories 12.3 Read Only Memories 11.
A:
12.3
Q: What is EPROM?
A: Erasable Programmable Read Only Memory
Q: What is EPROM?
A: Erasable Programmable Read Only Memory
Q: How many distinct digits does decimal number system have?
A: 10
Q: How many distinct digits or symbols does the decimal number system have?
A: 10
Q: How many distinct digits does the decimal number system have?
A: 10
Q: How many distinct digits or symbols does decimal number system have?
A: 10
Q: How many distinct digits or symbols does the decimal number system have?
A: 10
Q: How many distinct digits does decimal number system have?
A: 10
Q: How many distinct digits or symbols does decimal number system have?
A: 10
Q: How many distinct digits or symbols does decimal number system have?
A: 10
Q: How many distinct digits or symbols does the decimal number system have?
A: 10
Q: How many distinct digits does decimal number system have?
A: 10
Q: What are the elements or digits in decimal numbers?
A: coefficients na to ma−
Q: What are the elements or digits in decimal numbers?
A: coefficients na to ma−
Q: What are the elements or digits in decimal numbers?
A: coefficients na to ma−
Q: What are the elements of decimal numbers called?
A: na to ma−
Q: What are the elements or digits in decimal numbers?
A: coefficients na to ma−
Q: What are the elements or digits in decimal numbers?
A: coefficients na to ma−
Q: What are the elements or digits in the decimal numbers?
A: coefficients na to ma−
Q: What is the radix or the base of the decimal number system?
A: r
Q: What are the elements or digits in the decimal numbers?
A: coefficients na to ma−
Q: What are the elements or digits in the decimal numbers?
A: coefficients na to ma−
Q: What is the st significant digit known as?
A: LSD
Q: What is the st significant digit?
A: LSD
Q: What is st significant digit?
A: LSD
Q: What is the st significant digit known as?
A: LSD
Q: What is a st significant digit?
A: LSD
Q: What is the st significant digit of a decimal number system?
A: LSD
Q: What is a st significant digit?
A: LSD
Q: What is the most significant digit?
A: LSD
Q: What is the most significant digit of a decimal number system?
A: na
Q: What is known as the most significant digit?
A: LSD) and na
Q: What is the decimal equivalent of a binary number?
A: 22
Q: What is pronounced as one 10?
A: zero
Q: What is the decimal equivalent of a binary number (say 1011 0)?
A: 22
Q: What is the decimal equivalent of a binary number?
A: 22
Q: What does the suffix to the numbers indicate?
A: the base of
the number system
Q: What indicates the base of the number system?
A: the suffix to the numb ers
Q: What is pronounced as one 10 is pronounced as one zero not ten 11 is
A: 10
Q: What is the decimal equivalent of a binary number?
A: 22
Q: What is pronounced as one 10?
A: zero
Q: What is the decimal equivalent of a binary number?
A: 22
Q: What is the decimal equivalent of the octal number 24?
A: 8 = 2 x 81 + 4 x 80
Q: What is the base of the octal number system?
A: 8
Q: What is the decimal equivalent of the octal number 24?
A: 8 = 2 x 81 + 4 x 80
Q: What is the decimal equivalent of the octal number 24?
A: 8 = 2 x 81 + 4 x 80
Q: What is the decimal equivalent of octal number 24?
A: 8 = 2 x 81 + 4 x 80
Q: What is the decimal equivalent of the octal number 24?
A: 8 = 2 x 81 + 4 x 80
Q: What is the radix of the hexadecimal number system?
A:
base
Q: What is the decimal equivalent of octal number 24?
A: 8 = 2 x 81 + 4 x 80
Q: What is the decimal equivalent of octal number 24?
A: 8 = 2 x 81 + 4 x 80
Q: What is the radix or base of the octal number system?
A: 8
Q: What is the decimal equivalent of the hexadecimal number (17) 16?
A:
(23) 10
Q: How many distinct eleme nts are given as: 0, 1, 2, 3, 4,
A: 16
Q: What is the decimal equivalent of the Hexadecimal n umber?
A: 3BC7.46
Q: The table 1.3 illustrates the counting in Hexadecim al number system with their
A: decimal equivalents
Q: What is the decimal equivalent of the hexadecimal n umber?
A: 3BC7.46
Q: What is the decimal equivalent of the Hexadecimal number (17) 16?
A:
(23) 10
Q: How many distinct eleme nts will be given as: 0, 1, 2, 3,
A: 16
Q: How many distinct eleme nts are given as: A, B, C
A: 16
Q: What can be verified that the decimal equivalent of the hexadecimal number (17
A:
(23) 10 .
Q: What can be verified that the decimal equivalent of the hexadecimal number is
A:
(23) 10 .
Q: What is necessary to know the techniques with which the con version of integer
decimal number is possible
A:
1.5 Conversion of Integer Decimal Number to Binary Number
Q: What is necessary to know the techniques with which the conversion of integer
decimal number is possible
A: It is
necessary
Q: What is required to know the techniques with which the con version of integer
decimal number is possible
A: It is
necessary
Q: What is required to know the techniques with which the conversion of integer
decimal number is possible
A: It is
necessary
Q: What is needed to know the techniques with which the con version of integer
decimal number is possible
A: It is
necessary
Q: How is the conversion of integer decimal number to binary number possible?
A: It is
necessary to know the techniques
Q: How can one convert an integer decimal number to a binary number?
A: by dividing the deci mal number by the radix
Q: How can one convert integer decimal numbers to binary numbers?
A: by dividing the deci mal number by the radix
Q: How can one convert an integer decimal number to a binary number?
A: by dividing the deci mal number by the radix
Q: How is the conversion of integer decimal number to binary number possible?
A: It is
necessary to know the techniques
Q: How many decimal numbers can be converted into binar y?
A: 35
Q: How many decimal numbers can be converted into hexad ecimal
A: 16 61
Q: How many decimal numbers can be converted into octal?
A: 16 61
Q: How many decimal numbers can you convert into binar y?
A: 35
Q: How many decimal numbers are there?
A: 16 61
Q: How many decimal numbers do you want to convert into binar y?
A: 35
Q: How many decimal numbers are there?
A: 16 61
Q: How many decimal numbers can be converted into binar y?
A: 35
Q: How many decimal numbers do you need to convert into binar y?
A: 35
Q: How many decimal numbers can be converted into binar y?
A: 35
Q: What is a fractional decimal number represented in its equivalent binary form?
A: f 1
Q: What is a fractional decimal number represented in its equivalent binary form
given by?
A: f 1
Q: What is the equivalent binary form of a fractional decimal number?
A: coefficient a – 1
Q: How is a fractional decimal number represented in its equivalent binary form?
A: the coefficient
Q: How is a fractional decimal number represented in its equivalent binary form?
A: the coefficient
Q: What is a fractional decimal number represented in its equivalent binary form?
A: f 1
Q: How is the fractional decimal number f represented in its equivalent binary
form?
A: the coefficient
Q: How is the fractional decimal number f represented in its equivalent binary
form?
A: the coefficient
Q: What is the fractional decimal number f represented in its equivalent binary
form?
A: 1
Q: What is the equivalent binary form of a fractional decimal number?
A: coefficient a – 1
Q: What may be used to convert the dec imal fraction into its equivalent other
number system?
A: successive multip lication
Q: What may be used to convert the dec imal fraction into its equivalent other
number system by
A: successive multip lication
Q: What may be used to convert a decimal fraction into its equivalent other number
system?
A: successive multip lication
Q: What may be used to convert a decimal fraction into its equivalent other number
system by successive
A: multip lication
Q: What may be used to convert the decimal fraction into its equivalent other
number system by successive multi
A: A similar procedure
Q: What may be used to convert the decimal fraction into its equivalent other
number system?
A: successive multip lication
Q: What is the decimal product integer part?
A: .625 x 2
Q: What may be used to convert the decimal fraction into its equivalent other
number system?
A: successive multip lication
Q: What may be used to convert a decimal fraction into an equivalent other number
system?
A: successive multip lication
Q: What happens if rt does not become zero?
A: the multiplication process is stopped
Q: How many symbols of octal numbers can be represented in to three bit binary
numbers?
A: eight
Q: How many symbols of octal numbers can be represented in to three bit binary
numbers as
A: eight
Q: Integer part 8 965 8 120 5 8 15 0 8 1 7
A:
Q: How many symbols can be represented in to three bit binary numbers as 2 3 = 8?
A: eight
Q: What can the eight symbols of octal numbers 0, 1, 2, ....7 be represented
A: in to three bit binary numbers
Q: How many symbols of octal numbers can be represented in three bit binary
numbers?
A: eight
Q: Where can the eight symbols of octal numbers 0, 1, 2, ....7 be represented
A: in to three bit binary numbers
Q: What can be represented in to three bit binary numbers as 2 3 = 8?
A: The eight symbols of octal
Q: How many symbols of octal numbers can be represented in three bit binary numbers
as 2
A: eight
Q: What can be represented in to three bit binary numbers as 2 3 = 8?
A: The eight symbols of octal
Q: How are the binary numbers converted to the octal numbe rs?
A: by making the groups of
three bits
Q: How are binary numbers converted to the octal numbe rs?
A: by making the groups of
three bits
Q: What are the successive three bits of the bina ry number arranged together in
the form
A: groups
Q: How are the successive three bits arranged together in the form of groups?
A:
octal equivalents
Q: What are the successive three bits of a bina ry number arranged together in the
A: groups
Q: What are the successive three bits arranged together in the form of?
A: groups
Q: How are the successive three bits of a bina ry number arranged together?
A: in the form of groups
Q: What are the successive three bits arranged together in the form of?
A: groups
Q: What are the successive three bits arranged together in the form of?
A: groups
Q: How are the successive three bits arranged together in the form of groups?
A:
octal equivalents
Q: What is the base 16 of the hexadecimal system?
A: 2 4 = 16
Q: What is the base number of the hexadecimal system?
A: 16
Q: What is the base 16 of the hexadecimal system?
A: 2 4 = 16
Q: What is the base number of the hexadecimal system?
A: 16
Q: What does the hexadecimal system have a base of?
A: 16
Q: What base does the hexadecimal system have?
A: 16
Q: What is the base 16 of the hexadecimal system?
A: 2 4 = 16
Q: What does the hexadecimal system have a base of?
A: 16
Q: What is the base 16 of the hexadecimal system?
A: 2 4 = 16
Q: What base does the hexadecimal system have?
A: 16
Q: What hexadecimal number is first converted to its eq ui
A: 4AC7.4B
Q: What is the given hexadecimal number first converted to?
A: octal number
Q: What is the hexadecimal number 110011010111110.101?
A: 335BE.A
Q: What is the hexadecimal number first converted to?
A: octal number
Q: What is the hexadecimal number 0011 0011 0101 10
A: Binary
Q: What is the given hexadecimal number converted to?
A: octal number
Q: What is the hexadecimal number?
A: 4AC7.4B
Q: What does the given hexadecimal number first converte d to?
A: binary number
Q: How is the given hexadecimal number converted?
A: octal number
Q: What is the hexadecimal number first converted to?
A: octal number
Q: The counting of numbers in any system is a form of addition since successive
numbers, while counting
A:
1.9 Binary Addition
Q: The counting of numbers in any system is a form of addition since successive
numbers are obtained by
A: adding 1
Q: When a number is added to the last digit of a number system, the sum
A: zero
Q: In decimal number system, the successive addition is obtained as foll ows:
A:
Q: What is a form of addition?
A: The counting of numbers in any system
Q: The counting of numbers in any system is a form of addition because successive
numbers, while counting
A: adding 1
Q: In decimal number system, the successive addition is obtained as foll ows: 4
A:
Q: What is the counting of numbers in any system a form of?
A: addition
Q: What is the counting of numbers in any system a form of?
A: addition
Q: How are successive numbers, while counting, obtained?
A: by adding 1
Q: What table gives the simple addition of two bits a and b?
A: Half adder table
Q: What is the name of the table that gives the simple addition of two bits a and
A: Half adder table
Q: What is half adder table?
A:
a and b
Q: What is half adder table known as?
A:
0
0
1
Q: What table gives the simple addition of two bits a and b?
A: Half adder table
Q: What is the table known as Half adder table?
A: Table 1.6
Q: What is half adder table?
A:
a and b
Q: What table gives the simple addition of two bits a and b?
A: Half adder table
Q: What is half adder table?
A:
a and b
Q: What is Half adder table?
A: Table 1.6
Q: What is used for subtraction similar to one used for addition?
A: Half – subtractor table
Q: What is used for subtraction similar to one used for addition?
A: Half – subtractor table
Q: What is used for subtraction similar to one used for addition?
A: Half – subtractor table
Q: What is used for subtraction similar to one used for addition?
A: Half – subtractor table
Q: What is used for subtraction similar to one used for addition?
A: Half – subtractor table
Q: What type of table is used for subtraction similar to one used for addition?
A: Half – subtractor table
Q: What is used for subtraction similar to one used for addition?
A: Half – subtractor table
Q: What is used for subtraction similar to one used for addition?
A: Half – subtractor table
Q: What is used for subtraction similar to one used for addition?
A: Half – subtractor table
Q: What is used for subtraction similar to one used for addition?
A: Half – subtractor table
Q: What are the positive numbers discussed so far in the p receding sections?
A:
1.11 Signed Numbers
Q: What was discussed so far in the p receding sections?
A: The positive numbers
Q: What are the positive numbers discussed in the p receding sections?
A:
1.11 Signed Numbers
Q: Where were the positive numbers discussed so far?
A: the p receding
sections
Q: What were discussed so far in the p receding sections?
A: The positive numbers
Q: The positive numbers were discussed so far in the p receding sections.
A:
1.11
Q: Where were the positive numbers discussed so far in the p receding sections?
A:
1.11
Q: Where were the positive numbers discussed so far in the p receding sections?
A:
1.11
Q: What are the positive numbers discussed in the p receding sections?
A:
1.11 Signed Numbers
Q: What are the positive numbers discussed so far in the p receding sections?
A:
1.11 Signed Numbers
Q: What is provided at the extreme left of the number?
A: an extr a bit
Q: What is provided at the extreme left of a number?
A: an extr a bit
Q: What is provided at the extreme left of a number to represent the sign of binary
numbers?
A: an extr a bit
Q: What is the most commonly used met hod for representing the signed binary
numbers?
A: 2’s complement method
Q: What is provided at the extreme left of the number to represent the sign of
binary numbers?
A: an extr a bit
Q: What is provided at the extreme left of a number?
A: an extr a bit
Q: What is provided at the extreme left of the number?
A: an extr a bit
Q: What is the extr a bit at the extreme left of a number known as
A: sign bit
Q: What is provided at the extreme left of the number?
A: an extr a bit
Q: What is the extr a bit at the extreme left of a number called?
A: sign bit
Q: The 1's complement of a binary number is obtained by converting each 0 bit
A:
Q: How is the 1's complement of a binary number obtained?
A: by converting each 0 bit of the binary num ber to a 1
Q: How is the 1's complement of a binary number obtained?
A: by converting each 0 bit of the binary num ber to a 1
Q: What is the 1's complement of a binary number obtained by converting each 0
A: 1
Q: How is the 1's complement of a binary number obtained?
A: by converting each 0 bit of the binary num ber to a 1
Q: What is obtained by converting each 0 bit of the binary num ber to
A: 1
Q: The 1's complement of binary number is obtained by converting each 0 bit of the
A: binary num ber
Q: How is the 1's complement of a binary number obtained?
A: by converting each 0 bit of the binary num ber to a 1
Q: How is the 1's complement of a binary number obtained?
A: by converting each 0 bit of the binary num ber to a 1
Q: What is the 1's complement of a binary number obtained by?
A: converting each 0 bit of the binary num ber to a 1
Q: Computer systems always process the words in a uniform fashion having a maximum
limit of N
A: 0 0 1 1 1
Q: Computer systems always process words in a uniform fashion having a maximum
limit of N bits
A:
Q: Computer systems always process the words (digital) in a uniform fashion having
a
A:
Q: Computer systems always process the words in a uniform fashion having a maximum
limit of N bits
A:
Q: Computer systems always process words in a uniform fashion having a maximum
limit of N bits.
A:
Q: Computer systems always process the words in a uniform fashion with a maximum
limit of N bits
A:
Q: Computer systems always process words in a uniform fashion with a maximum limit
of N bits.
A:
Q: Computer systems always process words (digital) in a uniform fashion having a
maximum
A: N bits
Q: Computer systems always process the words (digital) in a uniform fashion having
a maximum
A: N bits
Q: Computer systems always process the words (digital) in a uniform fashion have
ving
A: a maximum limit of N bits
Q: What is the largest negative number in an N – bit machine?
A: 2(N – 1)
Q: What is the largest negative number in an N-bit machine?
A: 2(N – 1)
Q: What is the largest negative number in an N - bit machine?
A: 2(N – 1)
Q: What is the largest positive number in an N – bit machine?
A: +(2(N – 1) – 1
Q: What is the largest negative number in a N – bit machine?
A: 2(N – 1)
Q: What is the largest negative number in an N- bit machine?
A: 2(N – 1)
Q: What is the largest negative number in an N bit machine?
A: 2(N – 1)
Q: What is the largest negative number in an N – bit machine?
A: 2(N – 1)
Q: Tab le 1.10 illustrates how the 4 bit machine represents the signed binary
numbers.
A:
Q: What is the largest negative number in an N – bit machine?
A: 2(N – 1)
Q: What is the range of unsigned and signed decimal numbers that can be represented
in a
A: 0000000000 2 to 1111111111 2
Q: What is the range of unsigned and signed decimal numbers in a 10 bit system?
A: 0000000000 2 to 1111111111 2
Q: What is the range of unsigned and signed decimal numbers as well as binary
numbers that can
A: Example 1.13
Q: What is the range of unsigned and signed decimal numbers in the 10 bit system?
A: 0000000000 2 to 1111111111 2
Q: What is the range of unsigned and signed decimal numbers and binary numbers that
can be represented
A: 0000000000 2 to 1111111111 2
Q: What is the range of unsigned decimal numbers that can be represented in a 10
bit
A: 0 to 1023
Q: What is the range of unsigned and signed decimal numbers?
A: – 512
Q: What is the range of unsigned decimal numbers in a 10 bit system?
A: 0000000000 2 to 1111111111 2
Q: What is the range of unsigned and signed decimal numbers as well as binary
numbers in
A: 10 bit system
Q: What is the range of unsigned and signed decimal numbers in 10 bit systems?
A: 0000000000 2 to 1111111111 2
Q: What does the addition and subtraction of binary numbers mean in the signed
numbers?
A: the same
Q: What is the difference between the addition and subtraction of binary numbers in
signed numbers?
A: the same
Q: In signed numbers the addition and subtraction of binary numbers are the same.
A: 2’s Complement
Representation :
Q: In the signed numbers the addition and subtraction of binary numbers are the
same.
A: 2’s Complement
Representation :
Q: What are the addition and subtraction of binary numbers in signed numbers the
same?
A:
numbers
Q: What does the addition and subtraction of binary numbers mean in the signed
numbers?
A: the same
Q: What is the difference between the addition and subtraction of binary numbers?
A: the same
Q: In signed numbers the addition and subtraction of binary numbers are the same.
A: 2’s Complement
Representation :
Q: What is the difference between the addition and subtraction of binary numbers in
signed numbers?
A: the same
Q: In the signed numbers the addition and subtraction of binary numbers are the
same.
A: 2’s Complement
Representation :
Q: What is the range of a 4 bit machine from – 8 to +7?
A:
+15 01111
Q: How can se numbers not be represented in a 4 bit signe d number?
A: 4 bit machine will have
the range from – 8 to +7
Q: What can not be represented in a 4 bit signe d number?
A: se numbers
Q: How can se numbers not be represented in 4 bit signe d number?
A: 4 bit machine will have
the range from – 8 to +7
Q: How can se numbers not be represented in 4 bit signe d numbers?
A: 4 bit machine will have
the range from – 8 to +7
Q: What is the range from – 8 to +7 in a 4 bit machine?
A:
Q: What can not be represented in 4 bit signe d number?
A: se numbers
Q: What can not be represented in a 4 bit signe d number as 4 bit machine
A: se numbers
Q: What can not be represented in 4 bit signe d numbers?
A: se numbers
Q: What is the correct answer in unsigned binary numbers?
A: 11000
Q: What is the maximum limit of 5 bit signed binary numbers?
A: –16 to +15
Q: What is the maximum limit of 5 bit signed binary numbers?
A: –16 to +15
Q: What is the maximum limit of 5 bit signed binary numbers?
A: –16 to +15
Q: What is the maximum limit of 5 bit signed binary numbers?
A: –16 to +15
Q: What is the maximum limit of 5 bit signed binary numbers?
A: –16 to +15
Q: What is the maximum limit of 5 bit signed binary numbers?
A: –16 to +15
Q: What is the maximum limit of 5 bit signed binary numbers?
A: –16 to +15
Q: What is the maximum limit of 5 bit signed binary numbers?
A: –16 to +15
Q: What is the maximum limit for 5 bit signed binary numbers?
A: –16 to +15
Q: What is the maximum limit of 5 bit signed binary numbers?
A: –16 to +15
Q: In computers a special circuit is provided to detect any overflow conditio
A: 67 – 39
Q: What is provided to detect any overflow conditio n and indicate the
A: a special
circuit
Q: In computers, a special circuit is provided to detect any overflow conditio
A: 67 – 39
Q: What is provided to detect any overflow and indicate the erroneous result?
A: a special
circuit
Q: What is provided to detect overflow conditio n and indicate the er
A: a special
circuit
Q: What is provided to detect any overflow conditio n in computers?
A: a special
circuit
Q: What is provided to detect any overflow conditio n and indicate the error
A: a special
circuit
Q: What is provided in computers to detect any overflow conditio n and indicate
A: a special
circuit
Q: In computers a special circuit is provided to detect any overflow and indicate
the err
A: 67 – 39
Q: What is provided to detect any overflow conditio n and indicate er
A: a special
circuit
Q: How is the 9's complement of a decimal number obtained?
A: by subtracting each di git from 9
Q: How is 9's complement of a decimal number obtained?
A: by subtracting each di git from 9
Q: What are 1's and 2's complement of binary numbers discussed to represent?
A: the
signed numbers
Q: How is the 9's complement of a decimal number obtained?
A: by subtracting each di git from 9
Q: What are 1's and 2's complement of binary numbers used to represent?
A: the
signed numbers
Q: How is 9's complement obtained?
A: subtracting each di git from 9
Q: How is the 9's complement of a decimal number obtained by subtracting each di
A: by subtracting each di git from 9
Q: How is 9's complement of a decimal number obtained?
A: by subtracting each di git from 9
Q: What is the answer to 1's and 2's complement of binary numbers discussed to
represent
A: 0 0011001 (+25).
Q: What are 1's and 2's complement of binary numbers discussed to represent?
A: the
signed numbers
Q: How many types of complements can one define in a number system of base r?
A: two
Q: How many types of complements can be defined in a number system of base r?
A: two
Q: How can one define two types of complements in a number system of base r?
A: In general
Q: Where can one define two types of complements in a number system of base r?
A: In general
Q: What is another method of g etting 10's complement of a decimal
A: to subtract that number from n10
Q: What can be used for the addition of signed decimal numbers as given in the
following example?
A: The 10’s complement
Q: What is the other method of g etting 10's complement of a deci
A: to subtract that number from n10
Q: What can be used for the addition o f signed decimal numbers as given in the
A: The 10’s complement
Q: What can be used for the addition o f signed decimal numbers?
A: The 10’s complement
Q: How many types of complements can one define in a number system of base r in
A: two
Q: What is the process of multiplication of binary numbers similar to?
A: decimal multiplication
Q: What is the process of multiplication of binary numbers similar to?
A: decimal multiplication
Q: What is the process of multiplication of binary numbers similar to that of
decimal multiplication?
A: Binary Multiplication
Q: How is the r's complement obtained?
A: adding 1 to it
Q: How is the r's complement of nonzero number obtained?
A: by getting the ( r –1)’s complement of that number
Q: What is the process of multiplication of binary numbers similar to?
A: decimal multiplication
Q: What is the process of multiplication of binary numbers similar to?
A: decimal multiplication
Q: How is the r's complement of a nonzero number obtained?
A: by getting the ( r –1)’s complement of that number
Q: What is the process of multiplication of binary numbers similar to?
A: decimal multiplication
Q: The process of multiplication of binary numbers is similar to that of decimal
multiplication .
A:
1.15
Q: If LSB is zero, then zeros are entered as the first partial product.
A:
zeros
Q: If LSB is 1 the multiplicand is copied as the first partial product.
A:
zeros
Q: How is the multiplier scanned from the right hand s ide?
A: Step 1
Q: If LSB is 1 the multiplicand is copied as the first partial product .
A:
zeros
Q: If LSB is zero, then zeros are entered as the first partial product .
A:
zeros
Q: What is the method of multiplication known as?
A: long hand multiplication
Q: How is the multiplier scanned from the right hand side?
A: Step 1
Q: What method of multiplication is generally done by using paper and pencil?
A: long hand multiplication
Q: What method of multiplication is known as long hand multiplication?
A: paper and pencil
Q: What method of multiplication is generally done by using paper and pencil?
A: long hand multiplication
Q: What is the process of division of binary numbers sim ilar to?
A: decimal division
Q: The process of division of binary numbers is sim ilar to that of decimal
division
A:
decimal division
Q: What is the process of division of binary numbers sim ilar to that of decimal
A: decimal division
Q: What is the process of division of binary numbers sim ilar to?
A: decimal division
Q: What is the process of division of binary numbers sim ilar to?
A: decimal division
Q: What is the process of division of binary numbers sim ilar to?
A: decimal division
Q: What is the process of division of binary numbers sim ilar to?
A: decimal division
Q: What is the process of division of binary numbers sim ilar to?
A: decimal division
Q: What is the process of division of binary numbers sim ilar to?
A: decimal division
Q: How many times the divisor goes into the dividend is seen in decimal division?
A: two possibilities
Q: How can very small and very large decimal numbers be expressed in scientific
notation?
A: Floating Point Representation of Binary Number s
Q: In digital machines in the division the subtraction is performed using the 2's
complement method.
A:
Q: How can very small and very large decimal numbers be expressed in scientific
notation?
A: Floating Point Representation of Binary Number s
Q: In digital machines in the division the subtraction is performed using the 2’s
complement method.
A:
Q: How can very small and very large decimal numbers be expressed?
A: scientific notation
Q: In digital machines in the division the subtraction is performed using the 2's
complement method
A:
Q: What method is used to divide 1101101 by 101?
A: 2’s complement method
Q: How are small and large decimal numbers expressed in scientific notation?
A: 2.48 x 10 -24 and 6.75 x 10 18
Q: How are small and large decimal numbers expressed in scientific notation?
A: 2.48 x 10 -24 and 6.75 x 10 18
Q: How can very small and very large decimal numbers be expressed?
A: scientific notation
Q: What will be different for different machines?
A: The format of such
representation
Q: What is a radix of binary numb ers?
A: ponent of 2
Q: What is a radix of binary numb ers?
A: ponent of 2
Q: What is a radix of binary numb ers?
A: ponent of 2
Q: What is a radix of binary numbers?
A: ponent of 2
Q: How many bit mantissa will a 16 bit machine have?
A: 10
Q: What is a radix of binary numbers?
A: ponent of 2
Q: What is a radix of binary numbers?
A: ponent of 2
Q: Where is the mantissa in 2's complement form?
A: the leftmos t bit is, therefore, used as
sign bit
Q: What is a radix of binary numb ers?
A: ponent of 2
Q: What is the floating point number given in the above format?
A: The mantissa part .110011010
Q: What floating point number do the following numb ers represent?
A:
0100101001101011
Q: What is the floating point number shown in the above format?
A: The mantissa part .110011010
Q: What is the floating point number given in the above format?
A: The mantissa part .110011010
Q: What is the floating point number for the mantissa part?
A: .110011010
Q: What is the floating point number given in the above format?
A: The mantissa part .110011010
Q: What is the floating point number in the above format?
A: 110011010
Q: What floating point number do the following numb ers represent?
A:
0100101001101011
Q: What floating point number do the following numb ers represent?
A:
0100101001101011
Q: What is the floating point number given in the above format?
A: The mantissa part .110011010
Q: The mantissa part .100101001 The exponent part 101011
A:
Q: The mantissa part 1.010010110 – .1011010
A:
Q: The mantissa part .100101001 The exponent part .100
A: 0100101001101011
Q: What is the binary equivalent of?
A: Example 1.19
Q: What is the binary equivalent of?
A: Example 1.19
Q: What is an example of a floating point number?
A: 1.19
Q: What is the binary equivalent of?
A: Example 1.19
Q: The mantissa part .100101001 The exponent part 1001011
A: 0100101001101011
Q: How many bi t floating point numbers can be expressed?
A: 16
Q: The mantissa part 1.010010110 – .10110101
A:
Q: In a number system of radix R, A and B are the successive digit
A: AB )R = (28) 10
Q: What are the successive digits in a number system of radix R?
A: A and B
Q: What is the radix R of the number system and the values of A and B?
A: AB )R = (28) 10
Q: What is the radix R of the number system?
A:
values of A and B
Q: How many digits are in a number system of radix R?
A: 28) 10
Q: What are the successive digits in a number system?
A: A and B
Q: How many digits are in a number system of radix R?
A: 28) 10
Q: What is the radix R of a number system?
A:
values of A and B
Q: What are the successive digits in a number system?
A: A and B
Q: What is the radix R of the number system and the values of A and B in
A: Find
Q: How are decimal integer numbers converted to binary numbers?
A:
5
Q: What can not be negative so the required resu lt is 4?
A: The radix
Q: How are decimal integer numbers converted to binary numbers?
A:
5
Q: How many decimal integer numbers are converted to binary numbers?
A:
5
Q: How many decimal numbers are converted to binary numbers?
A:
5. How the decimal fractional numbers
Q: How many decimal numbers can not be negative?
A: 4
Q: What can not be negative?
A: The radix
Q: How are decimal integer numbers converted to binary numbers?
A:
5
Q: What can not be negative so the required resu lt is?
A: The radix
Q: What can not be negative so the required resu lt is?
A: The radix
Q: What is the range of unsigned and signed numbers?
A: 15
Q: What are the different ways of representing the signed binary numbers in a
digital system?
A: 13. What are signed numbers? Give the different way s
Q: What is the range of unsigned and signed numbers in a digital system?
A: 15
Q: What is the range of unsigned and signed binary numbers?
A: 15
Q: What is the range of unsigned and signed numbers in a digital system?
A: 15
Q: What is the range of unsigned and signed binary numbers in a digital system?
A: 15
Q: What are signed numbers?
A: binary numbers
Q: What are the different ways of representing signed binary numbers in a digital
system?
A: 13. What are signed numbers? Give the different way s
Q: What are the different ways of representing signed binary numbers in a digital
system?
A: 13. What are signed numbers? Give the different way s
Q: What are signed numbers?
A: binary numbers
Q: What is the floating representation of binary numbers in 16 bit machine?
A:
1010111
Q: What is the floating representation of binary numbers in 16 bit machine?
A:
1010111
Q: How are binary numbers represented in a 12 bit system?
A:
Q: What is the floating representation of binary numbers in a 16 bit machine?
A: binary n umbers
Q: How are binary numbers represented in a 12 bit system?
A:
Q: How are binary numbers represented in a 12 bit system?
A:
Q: What is a floating representation of binary numbers in 16 bit machine?
A: binary n umbers
Q: How are binary numbers represented in a 12 bit system?
A:
Q: How are binary numbers represented in a 12 bit system?
A:
Q: How can binary numbers be represented in a 12 bit system?
A:
Q: What is the octal, hexadecimal and decimal equivalent of
A: 1011101
Q: What is the hexadecimal and decimal equivalent of the following numbers?
A: octal
Q: What is the hexadecimal equivalent of 1011101?
A: octal
Q: What is the hexadecimal and decimal equivalent of 1011101?
A: octal
Q: What is the hexadecimal and decimal equivalent of 10111101?
A: octal
Q: What is the hexadecimal equivalent of 10111101?
A: octal
Q: What is the hexadecimal equivalent of the following numbers?
A: octal
Q: What is the octal, hexadecimal and decimal equivalent to
A: 1011101
Q: What is the hexadecimal and decimal equivalent to 10111101?
A: octal
Q: What is the octal, hexadecimal and decimal equivalent?
A: 1011101
Q: How many decimal numbers can be converted into octa l numbers?
A:
30
Q: Convert the following decimal numbers into octa l numbers?
A:
30
Q: Convert the following decimal numbers into octa l numbers: (i
A:
30
Q: Convert the following decimal numbers into thei r equivalent octal and
A:
28
Q: How many decimal numbers can be converted to octa l numbers?
A:
30
Q: Convert the following decimal numbers into octa l numbers.
A:
30
Q: How many decimal numbers are there?
A: 415005
Q: How many decimal numbers can be converted into bina ry numbers?
A:
29
Q: Convert the following decimal numbers into octa l numbers?
A:
30
Q: How many decimal numbers are there?
A: 415005
Q: What are the following binary numbers to their e quivalent octal and he
A: base 3
and base 5
Q: What are the following numbers to their e quivalent octal and hex
A: binary numbers
Q: What are the following binary numbers to?
A: their e quivalent octal and hexadecimal
numbers
Q: What are the following binary numbers to their equivalent octal and he
A: base 3
and base 5
Q: What are the following binary numbers?
A: octal and hexadecimal
numbers
Q: How many binary numbers are there?
A: 333.3) 8
Q: What are the following binary numbers to?
A: their e quivalent octal and hexadecimal
numbers
Q: What are the following binary numbers to?
A: their e quivalent octal and hexadecimal
numbers
Q: How many decimal numbers are in base 3 and base 5?
A: 8923
Q: What are the following binary numbers to their e quivalent octal numbers?
A: 11011011.011
Q: What are the following numbers in binary?
A: Subtract
Q: What are the following numbers in binary?
A: Subtract
Q: How many numbers are in binary?
A: 25763
Q: What is the name of the number that is added in binary?
A: 25763
Q: What is the name of the number that is subtracted in binary?
A: 25763
Q: What are the following numbers in binary?
A: Subtract
Q: How many numbers are in binary?
A: 25763
Q: What are the following numbers in binary?
A: Subtract
Q: What are the following numbers in binary?
A: Subtract
Q: How many numbers are in binary?
A: 25763
Q: What is the result of the following operation?
A: binary subtraction
Q: What is the name of the operation that performs the following subtraction?
A:
40
Q: What is the name of the operation to perform the following subtraction?
A:
40
Q: Who performed the following operation?
A: binary subtraction
Q: What is the following operation to perform?
A: binary subtraction
Q: What is the name of the operation to perform the following?
A: binary subtraction
Q: What is the name of the operation that performs the following?
A: binary subtraction
Q: What is the following operation to perform?
A: binary subtraction
Q: What is the name of the operation that performs the following: (i) 11010011
A: binary subtraction
Q: What is the name of the operation that performs the following: (i) 10000001
A: Ans.:
Q: What do the following floating point numbers represent?
A:
________
Q: What do the following floating point numbers represent?
A:
________
Q: What do the following floating point numbers represent?
A:
________
Q: What do the following floating point numbers represent?
A:
________
Q: What do the following num bers represent?
A: floating point number
Q: What do the following floating point numbers represent?
A:
________
Q: What do the following num bers represent?
A: floating point number
Q: What do the following floating point numbers represent?
A:
________
Q: What do the following floating point numbers represent?
A:
________
Q: What do the following num bers represent?
A: floating point number
Q: What is a coding system used for the conversion of each decimal digit to binary
A: Binary Coded Decimal
Q: What is a coding system used to convert each decimal digit to binary?
A: Binary Coded Decimal
Q: What is a coding system for the conversion of each decimal digit to binary known
A: Binary Coded Decimal
Q: What are binary codes?
A: Binary Coded Decimal
Q: What is a coding system used for the conversion of each digit to binary?
A: Binary Coded Decimal
Q: What is a coding system for the conversion of each decimal digit to binary
called
A: Binary Coded Decimal
Q: What is a coding system for the conversion of each decimal digit to binary?
A: Binary Coded Decimal
Q: What is a coding system used for the conversion of decimal digits to binary
A: Binary Coded Decimal
Q: What is a coding system used to convert each decimal digit to binary called?
A: Binary Coded Decimal
Q: What is a coding system used to convert each decimal digit to?
A: binary
Q: How many combinations of 4 bits are required to represent ea ch symbol of
decimal
A: 10
Q: How many combinations of 4 bits is required to represent ea ch symbol of decimal
A: 10
Q: What is written as 1101 in b inary?
A: b inary
Q: What is written as 1101 in b inary?
A: b inary
Q: What are weighted codes assigned to?
A: the
binary bit
Q: What is written as 1101 in b inary?
A: b inary
Q: What are weighted codes assigned to?
A: the
binary bit
Q: What are weighted codes assigned to?
A: the
binary bit
Q: What are weighted codes assigned to?
A: the
binary bit
Q: What are weighted codes assigned to?
A: the
binary bit
Q: What is the decimal value of a code?
A: the algebraic sum of
weighted bits
Q: What is the decimal value of a code?
A: the algebraic sum of
weighted bits
Q: What is the decimal value of a code?
A: the algebraic sum of
weighted bits
Q: The decimal value of a code is the algebraic sum of weighted bits.
A:
9 0 0 0 0
0
Q: What is the decimal value of a code?
A: the algebraic sum of
weighted bits
Q: What is the decimal value of a code?
A: the algebraic sum of
weighted bits
Q: What is the decimal value of a code?
A: the algebraic sum of
weighted bits
Q: What is the decimal value of a code?
A: the algebraic sum of
weighted bits
Q: What is the decimal value of a code?
A: the algebraic sum of
weighted bits
Q: What is the decimal value of a code the algebraic sum of?
A: weighted bits
Q: In the 8421 code, the weight assigned to bit positi on 1(
A: i = 1
Q: The binary number 0110 represents the decimal digit 6 as 0 x8+1
A: x4+1 x2+0 x1 = 6
Q: What is the binary number 0110?
A: represents the decimal digit
Q: In the 8421 code, the weight assigned to bit positi is 1, second
A:
(i = 2) is 2
Q: The binary number 0110 represents the decimal digit as 0 x8+1
A: x4+1 x2+0 x1 = 6
Q: What is the binary number 0110?
A: represents the decimal digit
Q: In the 8421 code, the weight assigned to bit positi on 1 is
A: 1
Q: The binary number 0110 represents the decimal digit 6 as 0x8+1
A: x4+1 x2+0 x1 = 6
Q: What is the binary number 0110 represented as?
A: the decimal digit 6
Q: What is the binary number 0110?
A: represents the decimal digit
Q: What is also called as natural binary coded decimal (NBCD)?
A: 8421 cod es
Q: What is another name for natural binary coded decimal (NBCD)?
A: 8421 cod es
Q: What is NBCD also called?
A: natural binary
coded decimal
Q: What is also called as natural binary coded decimal (NBCD)?
A: 8421 cod es
Q: What is NBCD also called?
A: natural binary
coded decimal
Q: What is another term for natural binary coded decimal (NBCD)?
A: 8421 cod es
Q: What is also called as natural binary coded decimal (NBCD)?
A: 8421 cod es
Q: What is another name for natural binary coded decimal (NBCD)?
A: 8421 cod es
Q: What is another term for natural binary coded decimal (NBCD)?
A: 8421 cod es
Q: What is also called as natural binary coded decimal (NBCD)?
A: 8421 cod es
Q: How many decimal numbers are encoded into 8421, 2 421 and excess
A: Example 2.1
Q: What is not a necessary condition that only t he weighted codes are self
A: complementing
Q: How many decimal numbers can be encoded into 8421, 2 421 and excess
A: Example 2.1
Q: What is another important code?
A: excess – 3 (XS -3)code
Q: How many decimal numbers are encoded into 8421, 2 421, and excess
A: Example 2.1
Q: What is another important code?
A: excess – 3 (XS -3)code
Q: What is another important code that is not a weighted code but sho w
A: excess – 3 (XS -3)code
Q: How many decimal numbers can be encoded into 8421, 2 421, and
A: Example 2.1
Q: What is another important code?
A: excess – 3 (XS -3)code
Q: What is another important code?
A: excess – 3 (XS -3)code
Q: What is another class of binary codes?
A: cyclic code s
Q: What is another class of binary codes?
A: cyclic code s
Q: What is another class of binary codes?
A: cyclic code s
Q: What is the hamming distance defined as?
A: the number of places the binary bits differ in two consecutive numbers
Q: What is another class of binary codes?
A: cyclic code s
Q: What is another class of binary codes?
A: cyclic code s
Q: What is a cyclic code?
A: Another class of binary codes
Q: What is another class of binary codes?
A: cyclic code s
Q: What is a cyclic code?
A: Another class of binary codes
Q: What class of binary codes is the cyclic code s?
A: Cyclic Codes
Q: What is a particularly useful cyclic code?
A: Gray code
Q: What is a particularly useful cyclic code?
A: Gray code
Q: What is the unit hamming distance property of cyclic codes?
A: 00 01 11 10
Q: What is the unit hamming distance property of Cyclic codes?
A: e hamming dis tance is not unity
Q: What is a particularly useful cyclic code?
A: Gray code
Q: What is a particularly useful cyclic code?
A: Gray code
Q: What is a particularly useful cyclic code?
A: Gray code
Q: What is a particularly useful cyclic code?
A: Gray code
Q: What is a particularly useful cyclic code?
A: Gray code
Q: What is a particularly useful cyclic code?
A: Gray code
Q: What is written at the second place (as the second LSB) abo
A: 0
Q: 0 is written at the second place (as the second LSB) abo
A: the mirror
Q: What is added to the binary number above the mirror and 1 is added to the mirro
A: 0
Q: What is written at the second place (as the second LSB) above the mirror
A: 0
Q: What is added to the binary number above the mirror and 1 to the mirro r
A: 0
Q: What is written at the second place above the mirror and 1 to the numbers below
the mirror?
A: 0
Q: What is written at the second place above the mirror?
A: 0
Q: What is written at the second place (as the second LSB of the co de
A: 0
Q: What is written at the second place above the mirror?
A: 0
Q: What will the sequence of the LSB of the co de be?
A: 0, 1, 1 & 0
Q: When we move from decimal number 9 to 0 (successive
A: three
Q: What is not suitable for its use as cyclic BCD code?
A: gray code
Q: What is not suitable for its use as a cyclic BCD code?
A: gray code
Q: What is not suitable for use as cyclic BCD code?
A: gray code
Q: What is the most commonly used cyclic code?
A: table 2.4
Q: What is not suitable for its use as cyclic BCD code?
A: gray code
Q: What is not suitable for use as a cyclic BCD code?
A: gray code
Q: What is the most commonly used cyclic code?
A: table 2.4
Q: What is not suitable for use as a cyclic BCD code?
A: gray code
Q: What is the most commonly used cyclic code shown in table 2.4?
A: cyclic
BCD code
Q: What is difficult to obtain for a large de cimal number?
A: The gray code
Q: The cyclic code shown in the table 2.4 is a reflected BCD code
A:
Q: What is difficult to obtain for a large de cimal number?
A: The gray code
Q: What is difficult to obtain for a large de cimal number?
A: The gray code
Q: What is difficult to obtain for a large de cimal number?
A: The gray code
Q: What is difficult to obtain for a large de cimal number?
A: The gray code
Q: What is difficult to obtain for a large de cimal number?
A: The gray code
Q: What makes 9's complementation easy to implement?
A: Reflection
Q: What is difficult to obtain for a large de cimal number?
A: The gray code
Q: What is hard to obtain for a large de cimal number?
A: gray code
Q: What is the gray equivalent of binary number 100010111?
A: (110011100
Q: What is the Gray equivalent of binary number 100010111?
A: (110011100
Q: What is the gray equivalent of binary number 100010111?
A: (110011100
Q: What is the gray equivalent of binary number 100010111?
A: (110011100
Q: What is the gray equivalent of binary number 100010111?
A: (110011100
Q: What is the Gray equivalent of binary number 100010111?
A: (110011100
Q: What is the Gray equivalent of binary number 100010111?
A: (110011100
Q: What is the Gray equivalent of binary number (100010111) 2?
A: 110011100
Q: What is the gray equivalent of binary number (100010111) 2?
A: 110011100
Q: What is the Gray equivalent of binary number 100010111?
A: (110011100
Q: What is recorded as the most significant of the binary number?
A: gray code
Q: What is the binary equivalent of gray code (110011100) g?
A: (100010111) 2
Q: What is the most significant number of gray code recorded as the most
significant of the binary number?
A: d
Q: What is recorded as the most significant of the binary number?
A: gray code
Q: How is the most significant number of gray code recorded?
A: recorde d as the most significant of
the binary number
Q: What is the most significant number of gray code recorded as?
A: the binary number
Q: What is recorded as the most significant of the binary number?
A: gray code
Q: What is recorded as the most significant of the binary number?
A: gray code
Q: What is recorded as the most significant of the binary number?
A: gray code
Q: What is the binary equivalent of gray code (110011100) g?
A: (100010111) 2
Q: What is a group of bits known as?
A: word
Q: A group of bits is known as word and it moves as an entity in the digital
systems.
A:
Q: A group of bits is known as word and it moves as an entity in the digital
systems
A:
Q: A group of bits is known as word and it moves as an entity in the digital
systems,
A:
Q: What is a group of bits called?
A: word
Q: A group of bits is known as a group of bits and it moves as an entity in
A: digital systems
Q: What group of bits is known as word and it moves as an entity in the digital
systems?
A: Error Detecting Codes
Q: What is a group of bits known as?
A: word
Q: What is a group of bits called?
A: word
Q: A group of bits is known as word and moves as an entity in the digital systems .
A:
Q: What two types of parity may be considered for error de tection?
A: even parity and
odd parity
Q: What two types of parity may be considered for error de tection?
A: even parity and
odd parity
Q: How many types of parity may be considered for error de tection?
A: Two
Q: How many types of parity may be considered for error de tection?
A: Two
Q: What are two types of parity that may be considered for error de tection?
A: even parity and
odd parity
Q: What is one type of parity that may be considered for error de tection?
A: even parity and
odd parity
Q: Which two types of parity may be considered for error de tection?
A: even parity and
odd parity
Q: What type of parity may be considered for error de tection?
A: even parity and
odd parity
Q: Which two types of parity may be considered for error de tection?
A: even parity and
odd parity
Q: What two types of parity may be considered for error detection?
A: even parity and
odd parity
Q: What is transmitted along with the word at the transmitter end?
A: parity bit P
Q: The parity bit P generated by some electronic circuitry is transmitted along
with the word at the
A:
0011
0100
Q: What is transmitted along with the word at the transmitter end?
A: parity bit P
Q: What is generated by some electronic circuitry transmitted along with the word
at the transmitter end?
A: parity bit P
Q: What is transmitted along with the word at the transmitter end for the error
detection?
A: parity bit P
Q: What is transmitted along with the word at the transmitter end for error
detection?
A: parity bit P
Q: What is transmitted along with the word at the transmitter end?
A: parity bit P
Q: What is transmitted along with the word at the transmitter end for the error
detection?
A: parity bit P
Q: What is transmitted along with the word at the transmitter end?
A: parity bit P
Q: What is sent along with the word at the transmitter end?
A: parity bit P
Q: What can be used to detect the error occurred due to the transmission of binary
information?
A: error correcting codes
Q: What is also intro duced as the odd parity row for each column?
A: f 6 bits)
Q: What is used to detect the error occurred due to the transmission of binary
information?
A: error correcting codes
Q: What was discussed in the forgoing section?
A: error correcting codes
Q: What can be used to detect the error occurred due to the transmission of binary
information?
A: error correcting codes
Q: What is also intro duced as the odd parity row for each column?
A: f 6 bits)
Q: What can be used to detect the error occurred due to the transmission of binary
information?
A: error correcting codes
Q: What is also intro duced as the odd parity row for each column?
A: f 6 bits)
Q: What can be used to detect the error occurred due to the transmission of binary
information?
A: error correcting codes
Q: What is the odd parity row for each column?
A: f 6 bits
Q: What is the most commonly used code that can not only detect the error but also
finds the error
A: Ha mming code also called self correcting
code
Q: What is hamming code also known as?
A: self correcting
Q: What is hamming code also called?
A: self correcting
Q: What is hamming code also known as?
A: self correcting
Q: What is hamming code also known as?
A: self correcting
Q: What is the most commonly used code that can not only detect the error but also
find the error
A: Ha mming code also called self correcting
code
Q: What is hamming code also known as?
A: self correcting
Q: What is hamming code also called?
A: self correcting
Q: What is hamming code also called?
A: self correcting
Q: What is hamming code also known as?
A: self correcting
Q: The 7 bit Hamming code for 8421 data is shown in ta
A:
Q: The Hamming code for 8421 data is shown in ta ble
A:
Q: What is used to detect and corre ct the error after the code is received?
A: The following procedure
Q: What is the 7 bit Hamming code for 8421 data shown in?
A: ta ble 2.6
Q: What is the 7 bit Hamming code for 8421 data shown in ta
A:
Decimal
numbers
Q: What is the Hamming code for 8421 data shown in ta ble
A: 7 bit
Q: What is the decimal equivalent of C3C2C1?
A: gives the position of incorrect bit
Q: What is used to detect and correct the error after the code is received?
A: The following procedure
Q: What is the code for 8421 data shown in ta ble 2.6?
A: 7 bit Hamming code
Q: What is the decimal equivalent of C3C2C1?
A: gives the position of incorrect bit
Q: What is the correct hamming code?
A: 1010010
Q: What can be used for detecting and correcting the error by using extra digital
circuitry?
A: cod e
Q: What is the correct hamming code?
A: 1010010
Q: What can be used to detect and correct an error by using extra digital
circuitry?
A: cod e
Q: What can be used to detect and correct the error by using extra digital
circuitry?
A: this cod e
Q: What is the correct hamming code?
A: 1010010
Q: What is the correct hamming code?
A: 1010010
Q: What is the correct hamming code?
A: 1010010
Q: What can be used for detecting and correcting the error by using extra digital
circuit ry
A: this cod e
Q: What is the correct hamming code for a four bit word?
A: 1010010
Q: What is the seven bit Hamming code received at the receiver?
A: 1110100
Q: What is the correct code for a seven bit Hamming code?
A: 0101100
Q: What is the correct hamming code for a seven bit Hamming code?
A: 0101100
Q: What is the correct hamming code?
A:
0110100
Q: What is the correct 7 bit Hamming code?
A: 0101100
Q: What is the correct code for a 7 bit Hamming code?
A: 0101100
Q: What is the correct 7 bit Hamming code?
A: 0101100
Q: What is the 7 bit Hamming code received at the receiver?
A: 1110100
Q: What is the 7 bit Hamming code?
A: 0101100
Q: What is the correct code for a seven bit Hamming code?
A: 0101100
Q: What are the illegal codes in 8421 code?
A: binary numbers 1010 through 1111
Q: How many binary numbers are the illegal codes in 8421 code?
A: 1010 through 1111
Q: What are the illegal codes in 8421 code?
A: binary numbers 1010 through 1111
Q: What are the illegal codes in 8421 code?
A: binary numbers 1010 through 1111
Q: How many binary numbers are the illegal codes in 8421 code?
A: 1010 through 1111
Q: What are the illegal codes in 8421 code?
A: binary numbers 1010 through 1111
Q: What are the illegal codes in 8421 code?
A: binary numbers 1010 through 1111
Q: How many binary numbers are the illegal codes in 8421 code?
A: 1010 through 1111
Q: What are the illegal codes in 8421 code?
A: binary numbers 1010 through 1111
Q: What are the illegal codes in 8421 code?
A: binary numbers 1010 through 1111
Q: What is to be added if the answer is more than 9?
A: 0110
Q: What is the BCD number for 476?
A: 0100 0111 0110
Q: What is added to LSD and second LSD because 1010 is the illegal code in
A: 0110
Q: What is to be added to LSD and second LSD if the sum is l
A: 0110
Q: What is to be added if the answer is more than 9?
A: 0110
Q: What is the BCD number for 476?
A: 0100 0111 0110
Q: What is added to LSD and second LSD if the sum is l e
A: 0110
Q: What is to be added if the answer is more than 9?
A: 0110
Q: What is to be added to LSD and second LSD if the answer is more than
A: 0110
Q: What is to be added if the answer is more than 9?
A: 0110
Q: What is the correct answer to 0001 0010 0111 0000 1000?
A: Decimal number
Q: What is the correct answer for the decimal number 1 2 7 0 8?
A: 0001 0010 0111 0000 1000
Q: What is the correct answer for decimal number 1 2 7 0 8?
A: 0001 0010 0111 0000 1000
Q: What is the correct answer for decimal number 1 2 7 0 8?
A: 0001 0010 0111 0000 1000
Q: What is the correct answer to 0001 0010 0111 0000 1000?
A: Decimal number
Q: What is the correct answer to 0001 0010 0111 0000 1000 Decimal number
A: 2.8
Q: What is the correct answer for the decimal number 1 2 7 0 8?
A: 0001 0010 0111 0000 1000
Q: What is the correct answer for decimal number 1 2 7 0 8?
A: 0001 0010 0111 0000 1000
Q: What is the correct answer to 0001 0010 0111 0000 1000?
A: Decimal number
Q: What is the correct answer for decimal number 1 2 7 0 8?
A: 0001 0010 0111 0000 1000
Q: What code shows the excess - 6?
A: 1111
Q: What is to be subtracted from the above sum to get the correct answer?
A: 0011
(3)
Q: Why is the sum of 1111 wrong?
A: illegal code 1111
Q: What is the sum of these numbers wrong due to?
A: illegal code 1111
Q: What is to be subtracted from the above sum to get the correct answer?
A: 0011
(3)
Q: What is to be subtracted from the above sum to get the correct answer?
A: 0011
(3)
Q: What is the correct answer for the LSD?
A: 1000
Q: What code shows the excess - 6?
A: 1111
Q: What is to be subtracted from the above sum to get the correct answer?
A: 0011
(3)
Q: What is to be subtracted from the above sum to get the correct answer?
A: 0011
(3)
Q: What is to be added to the incorrect sum if the sum is more than 9?
A: 00 11 (3)
Q: If the sum is more than 9, then 00 11 (3) is to be added to the incorrect
A: Alphanumeric Codes
Q: What is added to the incorrect sum if the sum is more than 9?
A: 00 11 (3)
Q: What is to be added if the sum is more than 9?
A: 00 11 (3)
Q: What is to be added to the incorrect sum if the sum is less than 9?
A: 1000
Q: What can be added to the incorrect sum if the sum is more than 9?
A: 00 11 (3)
Q: What is to be added to the incorrect sum if the sum is greater than 9?
A: 00 11 (3)
Q: What is added to the incorrect sum if the sum is more than 9?
A: 00 11 (3)
Q: What is to be added to the incorrect sum when the sum is more than 9?
A: 00 11 (3)
Q: What is added to the incorrect sum if the sum is more than 9?
A: 00 11 (3)
Q: How many bits are used to represent the decimal numbers in bin ary form?
A: four
Q: How many bits are used to represent the decimal numbers in bin ary form?
A: four
Q: What are groups of 0's and 1's called?
A: alphanumeric codes
Q: What are the different codes called?
A: alphanumeric codes
Q: How many bits are used to represent decimal numbers in bin ary form?
A: four
Q: What are different codes called?
A: alphanumeric codes
Q: What are the groups of 0's and 1's called?
A: alphanumeric codes
Q: How many bits are used to represent decimal numbers in bin ary form?
A: four
Q: What are different codes called?
A: alphanumeric codes
Q: What are different codes called?
A: alphanumeric codes
Q: What is the most commonly used alphanumeric code?
A: ASCII
Q: What is a more commonly used alphanumeric code?
A: ASCII
Q: What is the most commonly used alphanumeric code?
A: ASCII
Q: What is the ASCII (American Standard Code for Information Interchange) code
pronounced
A: a s “as-kee”.
Q: What is the most commonly used alphanumeric code?
A: ASCII
Q: What is a more commonly used alphanumeric code?
A: ASCII
Q: What is the most commonly used alphanumeric code?
A: ASCII
Q: What is the ASCII (American Standard Code for Information Interchange) code
pronounced as
A: kee
Q: What is the ASCII code pronounced a s?
A: as-kee
Q: What is a more commonly used alphanumeric code?
A: ASCII
Q: 0 0000 100 0001 100 0010 100 0011 100 0101 100
A:
111
Q: A b c d e f g h i j
A:
111
Q: 0 0000 100 0001 100 0010 100 0011 100 0100 100
A:
111
Q: a b c d e f g h i
A:
111 0010
111
Q: DELETE 101 1000 101 1001 101 1010 101 1011 101 1100 101 11
A:
110
Q: 0000 100 0001 100 0010 100 0011 100 0101 100 0110
A:
110
Q: DELETE 101 1000 101 1001 101 1010 101 1011 101
A:
111
Q:
A: Error generating answer
Q: 0 0000 100 0001 100 0010 100 0011 100 0110 100
A:
111
Q: 0 0000 100 0001 101 0010 100 0011 100 0101 100
A:
111
Q: What is a self complementing code?
A: excess–3 code
Q: What is EBCDIC?
A: Extended BCD
Interchange Code
Q: Why are BCD codes used for decimal numbers in digital systems?
A: distance cyclic
Q: What are BCD codes used for in digital systems?
A:
decimal numbers
Q: Why are BCD codes used for decimal numbers in digital systems?
A: distance cyclic
Q: What is a self complementing code?
A: excess–3 code
Q: What is EBCDIC?
A: Extended BCD
Interchange Code
Q: What is EBCDIC?
A: Extended BCD
Interchange Code
Q: What is EBCDIC?
A: Extended BCD
Interchange Code
Q: What is EBCDIC?
A: Extended BCD
Interchange Code
Q: What is the ASCII code for decimal numbers 0 through 9?
A: 0111100101011000
Q: What is the ASCII code for?
A: decimal numbers 0
Q: What is the ASCII code for decimal numbers?
A: 0111100101011000
Q: What is the ASCII code for?
A: decimal numbers 0
Q: What is the ASCII code for decimal numbers 0 through 9?
A: 0111100101011000
Q: What is the ASCII code for decimal numbers 0 through 9?
A: 0111100101011000
Q: What is the ASCII code for decimal numbers 0 through 9?
A: 0111100101011000
Q: What is the ASCII code for decimal numbers 0 through 9?
A: 0111100101011000
Q: What is the ASCII code for decimal numbers 0 through 9. 11. Name some al
A: alphanumeric codes
Q: What is the ASCII code for decimal numbers 0 through 9?
A: 0111100101011000
Q: Convert the following decimal numbers to XS3 code: 1014, 2397
A:
17
Q: Convert the following decimal numbers to 2421 code numbers: 1014, 2397,
A:
16
Q: What does XS3 stand for?
A: exces s –3
Q: Convert the following decimal numbers to XS3 code: 1026, 4375
A:
15
Q: How many decimal numbers can be converted to XS3?
A: 4415
Q: How many decimal numbers can be converted to XS3 code?
A: 4415
Q: How many decimal numbers can you convert to XS3?
A: 4415
Q: How many decimal numbers can you convert to XS3 code?
A: 4415
Q: How many decimal numbers can be converted to XS3?
A: 4415
Q: How many decimal numbers can you convert to XS3?
A: 4415
Q: What is a seven bit Hamming code received at the receiv er?
A: 1001001
Q: What is the correct code for transmitting the following digital data?
A: 1001011
Q: What is a seven bit Hamming code received at the receiver?
A: 0010100
Q: What is the seven bit Hamming code received at the receiv er?
A: 1001001
Q: What is a seven bit Hamming code received at the receiver?
A: 0010100
Q: What is a seven bit Hamming code received at the receiver?
A: 0010100
Q: What is a seven bit Hamming code received at the receiver?
A: 0010100
Q: What is a 7 bit even parity Hamming code for transmitting the following
A:
21
Q: What is a seven bit Hamming code received at the receiver?
A: 0010100
Q: What is the seven bit Hamming code received at the receiver?
A: 0010100
Q: What is Boolean algebra?
A: Boolean Algebra
Q: What is Boolean algebra?
A: Boolean Algebra
Q: What is Boolean algebra based on?
A: logics
Q: Who developed an algebra called Boolean algebra?
A: George Boole
Q: What is a group of 0's and 1's called in digital computers?
A: binary numbers
Q: Which English mathematician became famous as logician?
A: George Boole
Q: Which English mathematician developed an algebra called Boolean algebra?
A: George Boole
Q: What is the name of the English mathematician who developed an algebra based on
A: George Boole
Q: Which English mathematician became famous as logician?
A: George Boole
Q: Which English mathematician developed an algebra called Boolean algebra?
A: George Boole
Q: How many basic logic operations are used in Boolean algebra?
A: Three
Q: How many basic logic operations are used in Boolean algebra?
A: Three
Q: How many basic logic operations are used in Boolean algebra?
A: Three
Q: How many basic logic operations are used in Boolean algebra?
A: Three
Q: How many basic logic operations are used in Boolean algebra?
A: Three
Q: How many basic logic operations are used in Boolean algebra?
A: Three
Q: How many basic logic operations are used in Boolean algebra?
A: Three
Q: How many basic logic operations are used in Boolean algebra?
A: Three
Q: What are the three basic logic operations used in Boolean algebra?
A: AND, OR and NOT
Q: How many basic logic operations are used in Boolean algebra?
A: Three
Q: How many simple propositions are connected with AND connective?
A: two
Q: What are two simple propositions connected with AND connective called?
A: AND operation
Q: What are two simple propositions connected with AND connective known as?
A: AND operation
Q: How many simple propositions are connected with AND connective?
A: two
Q: What are the two simple propositions connected with AND connective known as?
A: AND operation
Q: What are two simple propositions connected with AND connective?
A: student having books and having his Identity card
Q: How many simple propositions can be connected with AND connective?
A: two
Q: What are the two simple propositions connected with AND connective called?
A: AND operation
Q: How many simple propositions are connected with AND connective?
A: two
Q: What are two simple propositions connected with AND connective?
A: student having books and having his Identity card
Q: What shows conditions for the bulb to glow?
A: Fig. 3.1
Table 3.2
Q: What shows conditions for the bulb to glow?
A: Fig. 3.1
Table 3.2
Q: What shows the conditions for the bulb to glow?
A: Fig. 3.1
Table 3.2
Q: What shows the conditions for the bulb to glow?
A: Fig. 3.1
Table 3.2
Q: What shows conditions for the bulb to glow?
A: Fig. 3.1
Table 3.2
Q: What does Table 3.2 show conditions for the bulb to glow?
A: T he bulb will glow only when
both the switches are on
Q: What is shown in Table 3.2 for the bulb to glow?
A: both the switches are on
Q: What does Table 3.2 show for the bulb to glow?
A: when
both the switches are on
Q: What does Table 3.2 show the conditions for the bulb to glow?
A: T he bulb will glow only when
both the switches are on
Q: What does Table 3.2 show conditions for the bulb to glow?
A: T he bulb will glow only when
both the switches are on
Q: What is the logic circuit designed for the demonstration of AND operation known
as?
A: AND gate
Q: What is the logic circuit designed for the demonstration of AND operation
called?
A: AND gate
Q: What is the logic circuit designed for the demonstration of AND operation known
as?
A: AND gate
Q: What is the logic circuit designed for the demonstration of AND operation?
A: AND gate
Q: What is the logic circuit designed for the demonstration of AND operation known
as?
A: AND gate
Q: What is the logic circuit designed for the demonstration of AND operation?
A: AND gate
Q: What is the logic circuit designed for the demonstration of AND operation
called?
A: AND gate
Q: What is the logic circuit designed for the demonstration of AND operation
called?
A: AND gate
Q: What is the logic circuit designed for the demonstration of AND operation known
as?
A: AND gate
Q: What is the logic circuit designed for the demonstration of AND operation?
A: AND gate
Q: How many simple propositions are connected with OR connective?
A: two
Q: What should a student have?
A: either of the two essential th ings
Q: What should a student have?
A: either of the two essential th ings
Q: What is the word for entry of the student?
A: True
Q: How many simple propositions are connected with OR operation?
A: two
Q: How many simple propositions are connected with OR connective?
A: two
Q: What is the result of the statement?
A: entry of the student
Q: What should a student have?
A: either of the two essential th ings
Q: What should a student have?
A: either of the two essential th ings
Q: What should a student have?
A: either of the two essential th ings
Q: What is the logic circuit designed for the demonstration of OR operation known
as?
A: OR
gate
Q: What is the logic circuit designed for the demonstration of OR operation called?
A: OR
gate
Q: What is the logic circuit designed for the demonstration of OR operation?
A: OR
gate
Q: What is the logic circuit designed for the demonstration of OR operation known
as?
A: OR
gate
Q: What is the logic circuit designed for the demonstration of OR operation known
as?
A: OR
gate
Q: What is the logic circuit designed for the demonstration of OR operation called?
A: OR
gate
Q: What is the logic circuit designed for the demonstration of OR operation called?
A: OR
gate
Q: What is the logic circuit designed for the demonstration of OR operation called?
A: OR
gate
Q: What is the logic circuit designed for the demonstration of OR operation known
as?
A: OR
gate
Q: What is a logic circuit designed for the demonstration of OR operation known as?
A: OR
gate
Q: What is the student who does not have the cell phone allowed to enter the
college?
A: NOT operator
Q: What is the student who does not have a cell phone allowed to enter the college?
A: NOT operator
Q: What is the term for a student who does not have a cell phone allowed to enter
A: NOT operator
Q: What is it called when a student does not have a cell phone?
A: NOT operator
Q: What is the student who does not have the cell phone allowed to enter the
college known as?
A: NOT operator
Q: What is the student who does not have the cell phone allowed to enter the
college?
A: NOT operator
Q: What is the student who does not have the cell phone allowed to enter the
college?
A: NOT operator
Q: What is the student who does not have a cell phone allowed to enter?
A: the college
Q: What is the student who does not have a cell phone allowed to enter college?
A: NOT operator
Q: What is the student who does not have the cell phone allowed to enter?
A: the college
Q: How many binary operators are used in defining Boolean Algebra?
A: two
Q: How many binary operators are used in defining Boolean Algebra?
A: two
Q: What are the two binary operators AND & OR and one unary operator (NOT)
A: Postulates of Boolean Algebra
Q: How many binary operators are used in defining Boolean Algebra?
A: two
Q: What is the symbolic representation of NOT gate?
A: a bar on a variable
Q: How many binary operators are used in defining Boolean Algebra ?
A: two
Q: How many binary operators are used in defining Boolean Algebra?
A: two
Q: What are the two binary operators AND & OR ),(+) and one un
A: Postulates of Boolean Algebra
Q: What is the symbolic representation of NOT gate shown in Figure 3.7?
A: a bar on a variable
Q: How many binary operators are used in defining Boolean Algebra?
A: two
Q: What is the closure property for OR operation?
A: 0
Q: When did Huntington define the following postu lates of Boolean algebra?
A: 1904
Q: Who defined the following postu lates of Boolean algebra?
A: Huntington
Q: What is the closing property for OR operation?
A: 0
Q: What is the closure property for OR operations?
A: 0
Q: In what year did Huntington define the following postu lates of Boolean algebra
A: 1904
Q: Who defined the following postu lates of Boolean algebra?
A: Huntington
Q: What is the closure property for OR operation?
A: 0
Q: Who defined the following postu lates of Boolean algebra in 1904?
A: Huntington
Q: What is the Closure Property for every A, B S?
A: D = A + B
Q: Boolean algebra does not have the additive inver se and multiplicative inverse
A: no subtraction or division operations exist
Q: Boolean algebra differs from ordinary algebra on the following points: 1. The
distributive
A: does not hold in ordinary
algebra
Q: Where does Boolean algebra differ from ordinary algebra?
A: th e following points
Q: Boolean algebra has only finite set of elements where as ordinary algebra deals
with real
A: numbers
Q: Boolean algebra has only finite set of elements while ordinary algebra deals
with real numbers
A: infinite number of
elements
Q: Boolean algebra differs with ordinary algebra on the following points: 1. The
distributive
A: does not hold in ordinary
algebra
Q: Where does Boolean algebra differ from ordinary algebra?
A: th e following points
Q: Where does Boolean algebra differ from ordinary algebra?
A: th e following points
Q: Boolean algebra differs from ordinary algebra on the following points: 1. Boole
A: 2
Q: Boolean algebra differs from ordinary algebra on the following points: 1. What
does the
A: does not hold in ordinary
algebra
Q: What is a special class of Boolean algebra?
A: Switching algebra
Q: What is a special class of Boo lean algebra?
A: Switching algebra
Q: Which special class of Boolean algebra deals with two valued elements?
A: Switching algebra
Q: What is the special class of Boolean algebra?
A: Two – Valued Boolean Algebra
Q: What special class of Boolean algebra deals with two valued elements?
A: Switching algebra
Q: What class of Boolean algebra deals with two valued elements?
A: Switching algebra
Q: What special class of Boolean algebra deals with two valued elements?
A: Switching algebra
Q: What special class of Boolean algebra deals with two valued elements?
A: Switching algebra
Q: Which special class of Boolean algebra deals with two valued elements?
A: Switching algebra
Q: What is a special class of Boolean algebra?
A: Switching algebra
Q: When A = 0 : 0 + 0 = A When A = 1:
A:
Theorem 3
Q: What is the general theorems or rules of Boolean algebra?
A:
3.5 Theorems
Q: What are the general theorems or rules of Boolean algebra?
A:
3.5 Theorems
Q: The following are the general theorems or rules of Boolean algebra:
A:
Theorem
Q: What is the general theorems or rules of Boolean Algebra
A: The following
Q: Theorem 1(a) A + A = A 1(b) A
A: A . A = A
Q: When A = 0: 0 + 0 = A When A = 1: 1
A:
Theorem
Q: What are the general theorems or rules of Boolean Algebra
A:
Theorem
Q: The following are the general theorems or rules of Boolean algebra.
A:
Theorem
Q: What is the dual of 1(a)?
A: 1(b)
Q: The complement of a product of two variables is equal to the sum of the
complemented variables
A: BABA ⋅=+
Q: De Morgan gave two very important theor ems which are used in Boole
A:
Q: Who gave two very important theor ems which are used in Boolean
A: De Morgan
Q: The complement of a product of two variables is equ al to the sum of the
A:
complemented variables
Q: Which logician gave two very important theor ems which are used in Bo
A: De Morgan
Q: The complement of a sum of two variables is equal to the sum of the complemented
variables
A: BABA ⋅=+
Q: De Morgan gave two very important theorems which are used in Boolean
A:
Q: How many very important theor ems are used in Boolean algebra?
A: two
Q: Which logician gave two very important theorems which are used in Boo
A: De Morgan
Q: The complement of a product of two variables is equal to the sum of complemented
variables.
A: BABA ⋅=+
Q: Using the theorems of Boolean algebra, prove the following identities
A:
=
Q: Theorem 6(b) is the dual of 6( a) so need
A:
0
0
1
1 0
Q: Theorem 6(b) is the dual of what?
A: 6( a)
Q: What do theorems of Boolean algebra prove?
A: identities
Q: Theorem 6(b) is the dual of which theorem?
A: 6( a)
Q: Using the theorems of Boolean algebra, prove the following
A:
1
1
1 1
Q: How many variables do De Morgan's theorems hold good for?
A: n
Q: Theorem 6(b) is the dual of 6(a) so need not
A:
table are identical
Q: Using the theorems of Boolean algebra, prove the following:
A:
=
Q: How many variables do De Morgan's theorems hold good for?
A: n
Q: The postulates and theorems of Boolean algebra may be illustrated
A: Venn di agram
Q: What model illustrates the postulates and theorems of Boolean
A: Venn di agram
Q: How are the postulates and theorems of Boolean algebra illustrated
A: by the pictorial model known as Venn di agram
Q: What is the pictorial model that illustrates the postulates and theorem
A: Venn di agram
Q: The postulates and theorems of Boolean algebra are illustrated by
A: Venn di agram
Q: The postulates and theorems of Boolean algebra can be illustrated
A: Venn di agram
Q: What can be illustrated by the pictorial model known as Venn di agram?
A: The postulates and theorems of Boolean algebra
Q: What is the pictorial model used to illustrate the postulates and theorem
A: Venn di agram
Q: What is the pictorial model of Boolean algebra called?
A: Venn di agram
Q: What is the pictorial model of Boolean algebra?
A: Venn di agram
Q: Figure 3.7 shows the Venn diagram for two variables consisting of a rectangular
inside which
A:
A
Q: The area inside the circle represents the variable itse lf (i.e. the
A:
area
Q: What is the Venn diagram for two variables consisting of a rectangular inside
which two circles
A: Figure 3.7
Q: What does the area inside the circle represent?
A: the variable itse lf
Q: What represents the variable itse lf?
A: The
area inside the circle
Q: What represents the variable itse lf?
A: The
area inside the circle
Q: The area inside the circle represents the variable itse lf; the area outside the
circle
A:
area
Q: The area inside the circle represents the variable itse lf and the area outside
the circle
A:
area
Q: Figure 3.7 shows the Venn diagram for two variables consisting of a rectangular
inside where
A:
A
Q: The area inside the circle represents the variable itse lf, and the area outside
the
A:
area
Q: Where is the left hand side of the Boolean identity shown?
A: figure 3.12
Q: What is shown in figure 3.10?
A: The Venn diagram for BA⋅
Q: The Venn diagram for BA is shown in figure 3.10 which is the intersection of the
A:
Q: What is shown in figure 3.10?
A: The Venn diagram for BA⋅
Q: Where is the left hand side of BA shown?
A: figure 3.12
Q: What is shown in figure 3.10?
A: The Venn diagram for BA⋅
Q: What is shown in figure 3.10?
A: The Venn diagram for BA⋅
Q: The Venn diagram for BA is shown in figure 3.10 which is the intersection of A
A:
Q: What is shown in Figure 3.10?
A: The Venn diagram for BA⋅
Q: What is shown in Figure 3.10?
A: The Venn diagram for BA⋅
Q: What gives the values of the output variable s for all the possible combinations
of the input variables
A: Truth table
Q: What gives the values of the output variable s for all the possible combinations
of input variables?
A: Truth table
Q: What gives the values of the output variable for all the possible combinations
of the input variables?
A: Truth table
Q: What gives the values of the output variable s for all possible combinations of
the input variables?
A: Truth table
Q: The shaded areas of the Venn diagram are identical, so the Boolean identity
A:
Q: What does the Truth Table give the values of for all the possible combinations
of the input variables?
A: output variable s
Q: The shaded areas of the Venn diagram shown above are identical, so the Boole
A:
Q: What gives the values of the output variable for all the possible combinations
of input variables?
A: Truth Table
Q: What is a Boolean function that gives the values of the output variable s
A: Truth Table
Q: What gives the values of the output variable s for all possible combinations of
input variables?
A: Truth table
Q: Input Variables A B output F= BA 0 0 0 1
A: horizontal rows
Q: How are all possible values of input and output variables listed in the form of
a table?
A: truth table
Q: Input Variables A B output F= BA 0 0 1 1 1
A: horizontal rows
Q: Input Variables A B output F = BA 0 0 0 1
A: horizontal rows
Q: What are all possible values of input and output variables listed in the form of
a table called
A: truth table
Q: Input Variables A B output F= BA0 0 0 1 1
A: horizontal rows
Q: Input Variables A B output F= BA 0 0 0
A: horizontal rows
Q: What are all possible values of input and output variables listed in the form of
a table?
A: different horizontal rows
Q: What are all possible values of input and output variables listed in the form of
a table is
A: truth table
Q: Input Variables A B output F= BA0 0 0 0
A: horizontal rows
Q: Where is the required truth table obtained?
A: table 3.11
Q: How many horizontal rows does the given expression have?
A: 8
Q: How many horizontal rows does the given expression have?
A: 8
Q: How many horizontal rows does the given expression have?
A: 8
Q: How many horizontal rows does a given expression have?
A: 8
Q: How many horizontal rows will a given expression have?
A: 8
Q: How many horizontal rows does the given expression have?
A: 8
Q: How many horizontal rows does the given expression have?
A: 8
Q: How many horizontal rows does a given expression have?
A: 8
Q: How many horizontal rows does a given expression have?
A: 8
Q: What is the Canonical SP form?
A: Sum of Products
Q: What is the Canonical SP form for Boolean function of the truth table?
A: summing (ORing) the product (ANDed) terms
Q: What is a Canonical SP form?
A: Sum of Products
Q: What are Canonical SP form?
A: Sum of Products
Q: What is Canonical SP form?
A: Sum of Products
Q: What are Canonical SP form?
A: Sum of Products
Q: What are Canonical SP form?
A: Sum of Products
Q: What is the Canonical SP form?
A: Sum of Products
Q: What is Canonical SP form?
A: Sum of Products
Q: What are Canonical SP form and Canonical PS form?
A: Produ ct of Sums
Q: How is the required canonical SP form of the Boolean expression obtained?
A: ORing the minterms that produce 1 output in the
truth table
Q: Table 3.13 In general, there will be 2 N different minterms for N variables.
A:
Q: The required canonical SP form of the Boolean expression is finally obtained by
OR
A:
Q: In general, there will be 2 N different minterms for N variables. Further it is
A:
Q: How many different minterms will there be for N variables?
A: 2
Q: How is the required canonical SP form of the Boolean expr e
A: ORing the minterms that produce 1 output in the
truth table
Q: How is the required canonical SP form of the Boolean exprence obtained
A: by ORing the minterms
Q: In general, there will be 2 N different minterms for N variables. Furthermore,
it
A:
Q: What is the required canonical SP form of the Boolean expr e
A: ORing the minterms that produce 1 output in the
truth table
Q: What is the required canonical SP form of the Boolean expression?
A:
truth table
Q: What is the required Boolean expression obtained by ORing these minterms?
A: CBACBACBACBAF
Q: What is the required Boolean expression obtained by ORing the minterms?
A: CBACBACBACBAF
Q: What is the required Boolean expression in canonical PS form of a truth
A: CBACBACBACBAF
Q: What is the required Boolean expression obtained by ORing these minterms as?
A: CBACBACBACBAF
Q: How is the required Boolean expression obtained?
A: by ORing these minterms
Q: What is the required Boolean expression obtained by ORing?
A: CBACBACBACBAF
Q: What are ORed terms called?
A: maxterms
Q: What are ORed terms called?
A: maxterms
Q: What is the required Boolean expression obtained by ORing the minterms as?
A: CBACBACBACBAF
Q: What are ORed terms called?
A: maxterms
Q: What is the decimal equivalent of the binar y number formed by the independent
variables?
A: The subscript to M
Q: The subscript to M corresponds to the decimal equivalent of the binar y number
A:
formed by the independent variables
Q: What is the binary equivalent of the decimal nu mber 5?
A: 101
Q: What corresponds to the decimal equivalent of the binar y number formed by the
independent
A: The subscript to M
Q: Where are the maxterms with their notations for three variables shown?
A: table 3.15
Q: What is the binary equivalent of the decimal nu mber 5?
A: 101
Q: What is the binary equivalent of the decimal nu mber 5?
A: 101
Q: What is the binary equivalent of the decimal nu mber 5 (subscript of M
A: 101
Q: How many variables will be present in a row of the trut h table?
A: four
Q: What is the binary equivalent of the decimal nu mber 5?
A: 101
Q: What is obtained by ANDing the maxterms that produces o output in the truth
table
A: e 3.14
Q: Which equations represent the Boolean expressions in canonical SP and canon
A: 3.1) and ( 3.4
Q: How is e 3.14 obtained?
A: by ANDing the maxterms that produces o output in the truth table
Q: What does ANDing the maxterms produce?
A: o output in the truth table
Q: Which equations represent the Boolean expressions in canonical SP form?
A: 3.1) and ( 3.4
Q: What does ANDing the maxterms produce in the truth table?
A: o output
Q: What does ANDing the maxterms produce in the truth table?
A: o output
Q: Which equations represent the Boolean expressions in canonical SP forms?
A: 3.1) and ( 3.4
Q: What is obtained by ANDing the maxterms that produces o output?
A: e 3.14
Q: What is obtained by ANDing the maxterms that produces o output?
A: e 3.14
Q: How many standard forms of Boolean function may be obtained from a given truth
table
A: two
Q: How are the two standard forms of Boolean function obtained from a given truth
table
A: complementing on both sides
Q: How many standard forms of Boolean function can be obtained from a given truth
table
A: two
Q: What are the two standard forms of Boolean function obtained from a given truth
table
A: PS form from SP form
Q: What equation is the same as equation 3.4?
A: 3.8
Q: What equation is the same as equation 3.4?
A: 3.8
Q: How are the two standard forms of Boolean function obtained?
A: from a given truth table
Q: How are the two standard forms of Boolean function obtained?
A: from a given truth table
Q: What are the two standard forms of Boolean function obtained from?
A: truth table
Q: How are the two standard forms of Boolean function obtained?
A: from a given truth table
Q: The conversion of one standard form to another is obtained by interchanging and
and
A:
Q: What is the conversion of one standard form to another obtained by interchanging
and
A: having the numbers missing in the original for m
Q: What is obtained by interchanging and and having the numbers missing in the
original
A: the conversion of one standard form to other
Q: What equation shows that the conversion of one standard form to another is
obtained by interchanging
A: 3.9
Q: How is the conversion of one standard form to another obtained?
A: distributive law
Q: How is the conversion of one standard form to another obtained?
A: distributive law
Q: The conversion of one standard form to another is obtained by interchanging and
having the numbers
A:
Q: How is the conversion of one standard form to another obtained?
A: distributive law
Q: The conversion of one standard form to another is obtained by interchanging and
,
A:
Q: How is the conversion of one standard form to another obtained?
A: distributive law
Q: Using the theorems of Boolean algebra, reduce th
A:
Q: Using the theorems of Boolean algebra, reduce the following functions
A:
Q: What is the given Boolean function?
A:
CBAF +⋅=
Q: What does the given Boolean function do?
A: reduce
Q: What is the given Boolean function in SP fo rm?
A: CBAF
Q: Using the theorems of Boolean algebra, reduce the
A:
Q: What does the given Boolean function do?
A: reduce
Q: Using the theorems of Boolean algebra, reduce the following function
A:
Q: What is the given Boolean function called?
A: CBAF
Q: What is the given Boolean function in SP fo rm?
A: CBAF
Q: Using the theorems of Boolean algebra, reduce th
A:
Q: Using the theorems of Boolean algebra, reduce the following functions
A: Example 3.8
Q: How many functions can be reduced using the theorems of Boolean algebra
A: Example 3.8
Q: What does AACBCCBA +++= CBBA+=
A:
CBBA
Q: What does AACBCCBA +++= CBBA +
A:
CBBA
Q: What does AACBCCBA +++= CBBA?
A:
CBBA
Q: Theorems of Boolean algebra are used to reduce the following functions using
A: i
Q: Theorems of Boolean algebra are used to reduce the following functions.
A: i
Q: What does AACBCCBA +++= CBBA?
A:
CBBA
Q: Theorems of Boolean algebra reduce th e following functions using
A: CBADCBADCBADCBA
Q: The Boolean functions discussed above can be realized using AND, OR and NOT
gates.
A:
Q: The Boolean functions discussed above nay be realized using AND, OR and
A: Gates
Q: 3.9 Realization of Boolean Function Using Gates : The Boo
A: The Boolean functions discussed
above nay be realized using AND
Q: The Boolean functions discussed above can be realized using AND, OR, and NOT
gates
A:
Q: How can Boolean functions be realized?
A: using AND, OR and NOT gates
Q: What can be realized using AND, OR and NOT gates?
A: Boolean functions
Q: What can the Boolean functions discussed above be realized using?
A: AND, OR and NOT gates
Q: The Boolean functions discussed above nay be realized using AND, OR,
A: Gates
Q: What can be realized using AND, OR, and NOT gates?
A: Boolean functions
Q: What can be realized using AND, OR and NOT gates?
A: Boolean functions
Q: How many gates does the circuit need for its realization?
A: 9
Q: How many gates does this circuit need?
A: 9
Q: How many gates does the circuit need for its realization?
A: 9
Q: How many gates does a circuit need for its realization?
A: 9
Q: How many gates does the circuit need to realize?
A: 9
Q: How many gates does this circuit need for its realization?
A: 9
Q: How many gates does a circuit need for its realization?
A: 9
Q: How many gates does this circuit need?
A: 9
Q: How many gates does a circuit need to realize?
A: 9
Q: How many gates does this circuit need?
A: 9
Q: The use of three Boolean operators namely AND, OR and NOT has been discussed
A: Other Logic Operations and Logic Gates
Q: Which three Boolean operators have been discussed in the forgoing sections of
this chapter?
A: AND, OR and NOT
Q: How many Boolean operators have been discussed in the forgoing sections of this
chapter?
A: three
Q: What are the gates for these operators known as?
A: universal gates
Q: What are the gates for AND, OR and NOT known as?
A: universal gates
Q: How many Boolean operators are there?
A: three
Q: How many Boolean operators are there?
A: three
Q: How many Boolean operators are there?
A: three
Q: How many Boolean operators are there?
A: three
Q: How many Boolean operators are there?
A: three
Q: Out of the 16 function listed in table 3.16, eight functions are basically the
complementation of
A: eight functions
Q: How many functions are basically the complementation of other eight functions?
A: eight
Q: Out of the 16 functions listed in table 3.16, eight functions are basically the
complementation of
A: eight functions
Q: Out of the 16 function listed in table 3.16, how many functions are basically
the complementation
A: eight
Q: Table 3.16 A B 0f 1f 2f 3f 4f 5f 6
A:
Function Operator Symbol Comments
00=f
Q: How many functions are basically the complementation of other eight functions?
A: eight
Q: How many functions are basically complementation of other eight functions?
A: eight
Q: Out of the 16 function listed in table 3.16, eight functions are basically
complementation of other
A: eight functions
Q: How many functions are basically the complementation of other eight functions?
A: eight
Q: How many functions are basically the complementation of other eight functions?
A: eight
Q: The Null, Identity, A and B functions are trivial, since Null and Identity
A:
always produce 0 and 1
Q: The Null, Identity, A and B functions are trivial since Null and Identity
functions
A:
always produce 0 and 1
Q: What functions are trivial?
A: Null, Identity, A and B
Q: The Null, Identity, A and B functions are trivial because Null and Identity
functions
A:
always produce 0 and 1
Q: What functions are trivial?
A: Null, Identity, A and B
Q: What are the Null, Identity, A and B functions trivial?
A:
always produce 0 and 1
Q: What are the Null, Identity, A and B functions?
A: trivial
Q: What are the Null, Identity, A and B functions trivial?
A:
always produce 0 and 1
Q: What functions are trivial?
A: Null, Identity, A and B
Q: What functions are trivial?
A: Null, Identity, A and B
Q: What are the electronic circuits which can perform the operation or functions
discussed above known as?
A: gates
Q: What are the electronic circuits that can perform the operation or functions
discussed above known as?
A: gates
Q: What are the electronic circuits that can perform the opera tion or functions
discussed above known as
A: gates
Q: What are the electronic circuits which can perform the opera tion or functions
discussed above known as
A: gates
Q: What are the electronic circuits that can perform the operation or functions
discussed above called?
A: gates
Q: What are the electronic circuits which can perform the operation or functions
discussed above called?
A: gates
Q: What are the electronic circuits that can perform the opera tion or functions
discussed above called?
A: gates
Q: The electronic circuits which can perform the operation or functions discussed
above are known as gates.
A:
A
BF=
Q: What are the electronic circuits which can perform the opera tion or functions
discussed above called?
A: gates
Q: What are the electronic circuits that perform the operation or functions
discussed above known as?
A: gates
Q: What are the logic gates for Inhibition and Implication oper ators not designed
for?
A: commutative
Q: The logic gates for Inhibition and Implication oper ators are not designed since
these functions
A: not commutative
Q: The logic gates for Inhibition and Implication oper ators are not designed
because they are
A: these functions are not commutative
Q: The logic gates for Inhibition and Implication oper ators are not designed since
they are
A: not commutative
Q: The logic gates for Inhibition and Implication oper ators are not designed
because these functions
A: not commutative
Q: What are the logic gates for Inhibition and Implication oper ators not designed?
A: these functions are not commutative
Q: What are the binary logic gates designed for?
A: operators which satisfy the f ollowing factors
Q: The logic gates for Inhibition and Implication are not designed since these
functions are not
A: commutative
Q: What are the logic gates for Inhibition and Implication operators not designed
for?
A: these functions are not commutative
Q: The logic gates for Inhibition and Implication oper ators or functions are not
designed since
A: these functions are not commutative
Q: What type of gates can be implemented with NAND's or NOR's alone?
A: AND, OR, NOT gates
Q: What are NAND/NOR d efined for only two inputs?
A: BABABABA
Q: What can be implemented with NAND's or NOR's alone?
A: AND, OR, NOT gates
Q: What can be implemented with NAND's or NOR's alone as follows?
A: AND, OR, NOT gates
Q: What can be implemented with NAND's or NOR's alone?
A: AND, OR, NOT gates
Q: What can be implemented with NAND's or NOR's alone?
A: AND, OR, NOT gates
Q: What can be implemented with NAND’s or NOR’s alone?
A: AND, OR, NOT gates
Q: What can be implemented with NAND's or NOR's alone?
A: AND, OR, NOT gates
Q: What type of gates can be implemented with NANDs or NORs alone?
A: AND, OR, NOT gates
Q: What are NAND/NOR d efined for only two inputs as they
A: these operators are not associative
Q: What do the t heorems of Boolean algebra help in
A: reducing the literals or variables
Q: What do the theorems of Boolean algebra help in?
A: reducing the literals or variables
Q: What do the theorems of Boolean algebra help reduce?
A: literals or variables
Q: What do the t heorems of Boolean algebra help reduce
A: literals or variables
Q: What are the t heorems of Boolean algebra?
A: BABABABA
Q: What are the t heorems of Boolean algebra used for
A: minimization of Boolean expressions
Q: What are the theorems of Boolean algebra used for?
A: minimization of Boolean expressions
Q: What helps in reducing literals or variables?
A: The minimization of Boolean expressions using the t heorems of Boolean algebra
Q: What help in reducing literals or variables?
A: The minimization of Boolean expressions using the t heorems of Boolean algebra
Q: What are the t heorems of Boolean algebra used to
A: minimization of Boolean expressions
Q: What are the general rules for NAND gates realization of Boolean expression
given in SP
A:
1.
Q: What should be used for realization of Boolean expressions using NAND/NOR alone
A: NOR gates
Q: What should be used for realization if the simplified Boolean expression is in
the sum
A: NOR gates
Q: What are the general rules for NAND gates realization of Boolean expressions
given in
A:
1.
Q: What should be used for realization if the simplified Boolean expression is in
SP form
A: NOR gates
Q: What are the general rules for NAND gates realization of Bo olean expression
given in
A: SP
form, are given below
Q: What is the logic circuit diagram corresponding to the simplified Boolean
expression?
A:
diagram
Q: The logic circuit diagram corresponding to the simplified Boolean expression is
drawn.
A:
diagram
Q: What should be used for realization of Boolean expressions using NAND/NOR?
A: NOR gates
Q: What is the logic circuit diagram corresponding to the simplified Boolean
expression drawn?
A:
diagram
Q: How many levels of gating does this circuit require?
A: three
Q: How many levels of gating does each level add to the propagation delay?
A: three
Q: How many levels of gating does a circuit require?
A: three
Q: What is the aim of the circuit designers?
A: the re should be minimum number levels
Q: What does each level add to the propagation delay?
A: three levels of gating
Q: How many levels of gating does this circuit require?
A: three
Q: How many levels of gating does this circuit require?
A: three
Q: What does each level add to the propagation delay?
A: three levels of gating
Q: How many levels of gating does each level add to the propagation delay?
A: three
Q: How many levels of gating does each level add to?
A: three
Q: What are the general rules for NOR gates realization of Bool ean expression
given
A:
4
Q: Fig. 3.23 The general rules for NOR gates realization of Bool e
A:
Q: The general rules for NOR gates realization of Bool ean expression given in PS
A:
4
Q: What are the general rules for NOR gates realization of Bool ean expressions
A:
4
Q: What is the associative law for exclusive – OR operation given as?
A:
Q: The general rules for NOR gates realization of Bool ean expression are given
below
A:
4
Q: What is the general rule for NOR gates realization of Bool ean expression given
A:
4
Q: How are the general rules for NOR gates realization of Bool ean expressions
A: below
Q: What are the general rules for NOR gates realization of Bool ean expression?
A:
4
Q: What is the associative law for exclusive – OR operation?
A: Prove
Q: What is the difference between ordinary algebra and Boolean algebra?
A: Discuss the theorems of Boolean algebra
Q: What do you understand by logics?
A: Discuss the AND a nd OR operations
Q: What is the difference between ordinary algebra and Boolean algebra?
A: Discuss the theorems of Boolean algebra
Q: What is the difference between ordinary algebra and Boolean algebra?
A: Discuss the theorems of Boolean algebra
Q: What is the difference between the ordinary algebra and Boolean algebra?
A: Discuss the theorems of Boolean algebra
Q: How many variables can Demorgan's law be proved for?
A: two
Q: What is the difference between ordinary algebra and Boolean algebra?
A: Discuss the theorems of Boolean algebra
Q: What do you understand by logics?
A: Discuss the AND a nd OR operations
Q: What is the difference between the ordinary algebra and Boolean algebra?
A: Discuss the theorems of Boolean algebra
Q: What do you understand by logics?
A: Discuss the AND a nd OR operations
Q: How many of the different Boolean operators are used to deign the gates?
A: iii
Q: How many Boolean operators are used to deign the gates?
A: iii
Q: How many Boolean operators are used to deign the gates?
A: iii
Q: What are NAND and NOR gates known as?
A: universal gates
Q: What are NAND and NOR gates known as?
A: universal gates
Q: How many Boolean operators are used to deign the gates?
A: iii
Q: How many Boolean operators are used to deign the gates?
A: iii
Q: How many Boolean operators are used to deign the gates?
A: iii
Q: How many Boolean operators are used to deign the gates?
A: iii
Q: How many of the Boolean operators are used to deign the gates?
A: iii
Q: How many variables does the associative law not hold for?
A: three
Q: Using the theorems of Boolean algebra , prove the
A:
20
Q: What does the associative law not hold for?
A: NA ND operators
Q: What does the associative law not hold for for three variables?
A: NA ND operators
Q: Using the theorems of Boolean algebra, prove the f
A:
20
Q: What does the ssociative law for exclusive - OR and eq u
A:
operators
Q: How many variables does the associative law not hold?
A: three
Q: How many variables does the associative law not hold for?
A: three
Q: What does the associative law not hold for for NA ND operators for three
variables?
A: NO R operators
Q: Using the theorems of Boolean algebra , prove the following
A:
20
Q: What does DCBAF stand for?
A:
Q: What are the minimal Boolean expressions obtained i n above problem 24?
A: AND, OR NOT gates
Q: What are the minimal Boolean expressions obtained i n above problem (24)
A: AND, OR NOT gates
Q: What is the minimum Boolean expression obtained i n above problem 24?
A: AND, OR NOT gates
Q: What are the minimal Boolean expressions obtained i n above problem 22?
A:
(i) AND, OR NOT gates
Q: What is the minimal Boolean expression obtained i n above problem 24?
A: AND, OR NOT gates
Q: What are the minimal Boolean expressions obtained i n above problem 24 using
A: AND, OR NOT gates
Q: What does DCBAF stand for?
A:
Q: What are the minimal Boolean expressions obtained i n above problem?
A: AND, OR NOT gates
Q: What is the minimal Boolean expressions obtained i n above problem 24?
A: AND, OR NOT gates
Q: What can be simplified using the theorems of Boolean algebra?
A: Boolean functions
Q: How can Boolean functions be simplified using theorems of Boole
A:
simplified using the theorems of Boolean algebra
Q: What is the Karnaugh map method?
A:
4.1
Q: Theorems of Boolean algebra can be used to simplify Boole
A: Boolean functions
Q: What is the Karnaugh map method?
A:
4.1
Q: Theorems of Boolean algebra are used to simplify Boolean
A: Boolean functions
Q: Theorems of Boolean algebra help simplify the Boolean functions
A:
Q: Theorems of Boolean algebra can be used to simplify the Boo
A: Boolean functions
Q: What is another name for the Karnaugh map method?
A: Quine – McClusky (Q – M ) tabular method
Q: What is another name for the Karnaugh map method?
A: Quine – McClusky (Q – M ) tabular method
Q: What is very commonly used for the simplification of Boolean expressions?
A: d
Q: What is the Karnaugh map also called?
A: K – map
Q: What is very commonly used for the simplification of Boolean exp ressions?
A: d
Q: What is the Karnaugh map also known as?
A: K – map
Q: What is most commonly used for the simplification of Boolean expressions?
A: d
Q: What is most commonly used for the simplification of Boolean exp ressions?
A: d
Q: What is the Karnaugh map also called?
A: K – map
Q: What is the Karnaugh map also known as?
A: K – map
Q: What is very commonly used for the simplification of Boolean expresions?
A: d
Q: What is the Karnaugh map also called?
A: K – map
Q: How many variables are ta ken on either side of t he K
A: two adjacent variables
Q: Where are A and B shown separately over and below of a leaning line?
A: izontal line
Q: How many variables are on either side of t he K – map for three variables
A: two adjacent variables
Q: How many variables are ta ken on either side of the K – map?
A: three
Q: How many variables are on either side of t he K – map?
A: three
Q: How many variables are ta ken on either side of the K – map for
A: three variables two adjacent variables
Q: What is written in place of A?
A: 1
Q: How many variables are on either side of t he K – map?
A: three
Q: How many variables are ta ken on either side of the K –
A: two adjacent variables
Q: How many variables are on either side of the K – map for three variables?
A: two adjacent variables
Q: What is written in place of the possible combinations of two variables A & B?
A: a s 00, 01, 11 and 10
Q: How many variables are labeled on one side of the K – map?
A: four
Q: How many variables are on one side of the K – map?
A: four
Q: What is written in place of the possible combinations of two variables A & B?
A: a s 00, 01, 11 and 10
Q: How many variables will have four combinations labeled on one side?
A: three var iables, the two
Q: How many variables are labeled on one side of the K – map?
A: four
Q: What is the other method of writing K – map for three variables?
A: it is written a s 00, 01, 11 and 10
Q: How many variables will have four combinations labeled on one side of the K –
map
A: two
Q: How many variables are on one side of the K – map?
A: four
Q: What is written in place of the possible combinations of two variables A & B?
A: a s 00, 01, 11 and 10
Q: When a Boolean function of three variables or four va riables
A:
Q: What can be shown separately over and below of a leaning line as illu
A: The possible combinations of AB and CD
Q: When a Boolean function of three variables is given, the 1s entry in
A:
Q: When a Boolean function of three variables is given, 1s entry are mad
A:
Q: What are the possible combinations of AB and CD discussed in a bove?
A:
separately over and below of a leaning line
Q: Where is the K – map for the following Boolean func tion of
A:
Q: What is shown in figure 4.8?
A: The K – map
Q: When a Boolean function of three variables is given, 1s entry are made
A:
Q: Where is the K – map for the Boolean function of three variables shown?
A: figure 4.8
Q: What are the possible combinations of AB and CD discussed in figure 4.7?
A:
separately over and below of a leaning line
Q: What are the pairs quads and o ctets of adjacent 1s
A: minimal Boolean expression
Q: What do the pairs quads and o ctets of adjacent 1s
A: minimal Boolean expression
Q: What are pairs quads and o ctets of adjacent 1s made
A: minimal Boolean expression
Q: What are the pairs quads and octets of adjacent 1s made
A: minimal Boolean expression
Q: What do quads and octets of adjacent 1s do?
A: minimizing the Boolean
expression
Q: What do quads and octets of adjacent 1s in the K
A: minimal Boolean expression
Q: What do quads and o ctets of adjacent 1s in the
A: minimal Boolean expression
Q: What do quads and o ctets of adjacent 1s do?
A: getting the minimal Boolean expression
Q: How are quads and o ctets formed in the K –
A: minimal Boolean expression
Q: What do quads and o ctets of adjacent 1s do after
A: getting the minimal Boolean expression
Q: What does the var iable change from complemented form to un-complemented form?
A: dropped with its
complement
Q: What is the term of a pair whose term is BA?
A: ⋅,
Q: What is the term of the pair whose term is BA?
A: ⋅,
Q: What is the term of a pair whose term is BA?
A: ⋅,
Q: What is the term of the second pair whose term is BA?
A: CA⋅.
Q: What is the term of the pair whose term is BA?
A: ⋅,
Q: What is the term of a pair whose term is BA?
A: ⋅,
Q: What is the term of the pair whose term is BA?
A: ⋅,
Q: What does the var iable change from complemented form to un-complemented form or
A: dropped with its
complement
Q: What is the term of a pair whose term is BA?
A: ⋅,
Q: What is involved in getting the exp ression for a pair?
A: The Boolean algebra
Q: The Boolean algebra is involved in getting the exp ression for a
A:
BACCBACBACBA
Q: What algebra is involved in getting the exp ression for a pair?
A: Boolean
Q: What is involved in getting the exp ression for a pair?
A: The Boolean algebra
Q: What is involved in getting the exp ression for a pair?
A: The Boolean algebra
Q: What is involved in getting the exp ression for a pair?
A: The Boolean algebra
Q: What is involved in getting the exp ression for a pair?
A: The Boolean algebra
Q: What is involved in getting the exp ression for a pair?
A: The Boolean algebra
Q: What is involved in getting the exp ression for a pair?
A: The Boolean algebra
Q: What algebra is involved in getting the exp ression for a pair?
A: Boolean
Q: What is involved in getting the expression for a quad?
A: Boolean algebra
Q: What is involved in getting the expression for a quad?
A: Boolean algebra
Q: What algebra is involved in getting the expression for a quad?
A: Boolean
Q: What is the combinat ion of two pairs shown by dotted encircles
A: The quad
Q: What is involved in getting the expression for a quad?
A: Boolean algebra
Q: What is involved in getting the expression for a quad?
A: Boolean algebra
Q: What is involved in getting the expression for a quad?
A: Boolean algebra
Q: What type of algebra is involved in getting the expression for a quad?
A: Boolean
Q: What type of algebra is involved in getting the expression for a quad?
A: Boolean
Q: What is involved in getting the expression for a quad?
A: Boolean algebra
Q: How many adjacent 1s are encircled in a K – map?
A: eight
Q: How many adjacent 1s are encircled in a K – map known as
A: eight
Q: How many adjacent 1s are encircled in a K - map?
A: eight
Q: What are encircled in a K – map known as oct
A: The eight adjacent 1s
Q: How many adjacent 1s are encircled in a K - map known as
A: eight
Q: How many adjacent 1s are encircled in a K – map called
A: eight
Q: How many adjacent 1s are encircled in a K – map of four
A: eight
Q: How many adjacent 1s are encircled in a K-map?
A: eight
Q: How many adjacent 1s are encircled in a K- map?
A: eight
Q: How many adjacent 1s are encircled in a K – map of 4
A: eight
Q: What group may be used in more than one encircled groups?
A: same 1
Q: What group may be used in more than one encircled groups?
A: same 1
Q: What group may be used in more than one encircled groups?
A: same 1
Q: What group may be used in more than one encircled groups?
A: same 1
Q: What group may be used in more than one encircled group?
A: same 1
Q: What group may be used in more than one encircled groups?
A: same 1
Q: What are overlapped groups?
A: same 1 may be used in more than one encircled groups
Q: What group may be used in more than one encircled group?
A: same 1
Q: What group may be used in more than one encircled groups?
A: same 1
Q: What is important to use more than once?
A: same 1
Q: What looks like an octet?
A: de encircle d quad
Q: What is possible with the 1s of ext reme left columns and the 1s
A: The rolling
Q: What is a possibility that all the elements of some grou p/groups
A: overlapped by other
groups
Q: What looks like an octet when de encircle d quad
A: the right hand side
encircled quad
Q: What looks like an octet?
A: de encircle d quad
Q: What looks like an octet?
A: de encircle d quad
Q: What looks like an octet?
A: de encircle d quad
Q: What looks like an octet?
A: de encircle d quad
Q: Which quad touches the right hand side of the encircled quad?
A: de encircle d quad
Q: Which quad touches the right hand side encircled quad?
A: de encircle d quad
Q: What are the encircled groups of a K – map shown in figure 4.
A: one quad and four pairs
Q: What are the encircled groups of a K – map?
A: one quad and four pairs
Q: What are the encircled groups in the K – map?
A: one quad and four pairs
Q: What are the encircled groups in the K – map?
A: one quad and four pairs
Q: What are the encircled groups in the K – map shown in figure 4.17
A: one quad and four pairs
Q: What are the encircled groups in a K – map shown in figure 4.
A: one quad and four pairs
Q: What are the encircled groups in a K – map?
A: one quad and four pairs
Q: What are the encircled groups of the K – map?
A: one quad and four pairs
Q: What are the encircled groups of a K – map?
A: one quad and four pairs
Q: What are the encircled groups in the K – map?
A: one quad and four pairs
Q: What is the final minimal Boolean expression corresponding to the K – map
obtained
A: by ORing all the terms obtained above
Q: What is the required Boolean expre sion given by: CBBABAF
A: ⋅+⋅+⋅=
Q: What is the required Boolean expre ssion given by: CBBABA
A: ⋅+⋅+⋅=
Q: What is the final minimal Boolean expression corresponding to the K – map?
A: by ORing all the terms obtained above
Q: What is the final minimal Boolean expression corresponding to the K - map
obtained
A: by ORing all the terms obtained above
Q: Using K –map simplify following Boolean function of three variables.
A:
Q: What is the final minimal Boolean expression corresponding to the K map obtained
by OR
A: all the terms obtained above
Q: What is the final minimal Boolean expression corresponding to the K - map?
A: by ORing all the terms obtained above
Q: What is the required Boolean expre ssion given by?
A: CBBABAF
Q: Where is the required Boolean expre ssion given?
A: figure 4.19
Q: How many 1s at the corners of the K – map form a quad?
A: four
Q: The K –map for the given function is drawn, after encircling the groups
A:
1s
Q: How many 1s at the corners of the K - map form a quad?
A: four
Q: What is shown in figure 4.20?
A: K –map
Q: How many 1s are at the corners of the K – map?
A: four
Q: What is drawn after encircling the groups of 1s?
A: K –map
Q: What is drawn after encircling the groups of 1s?
A: K –map
Q: What is drawn after encircling the groups of 1s?
A: K –map
Q: The K –map for the given function is shown in figure 4.21. The four 1
A:
Solution :
Q: How many 1s at the corners of the K – map form a quad due to
A: four
Q: Input data to a digital system are sent in 8421 code in which the combin
A: illegal combinations
Q: What are two types of functions?
A: completely specified fun ctions and incompletely specified
functions
Q: Input data to a digital system are sent in 8421 code where the combinat
A: illegal combinations
Q: What are the two types of functions?
A: completely specified fun ctions and incompletely specified
functions
Q: Input data to a digital system are sent in 8421 code in which combinat
A: 0000 through 1001
Q: What are two types of functions?
A: completely specified fun ctions and incompletely specified
functions
Q: What are two types of functions?
A: completely specified fun ctions and incompletely specified
functions
Q: Input data to a digital system are sent in 8421 code in which 0000
A: 0000 through 1001
Q: Input data to a digital system are sent in 8421 code in which combinations
A: combinati ons 0000 through 1001
Q: What are completely specified fun ctions and incompletely specified functions?
A:
functions
Q: What is called as 'don't care' condition?
A: φ
Q: What is called as ‘don't care' condition?
A: φ
Q: What is called as 'don't care' condition?
A: φ
Q: What is the called as?
A: don’t care
Q: What is called as 'don't care' condition?
A: φ
Q: What is called as 'don't care' condition?
A: φ
Q: What is called as 'don't care' condition?
A: φ
Q: What is called as ‘don't care' condition?
A: φ
Q: What is called as ‘don't care' condition?
A: φ
Q: What is the called as?
A: don’t care
Q: When forming a K-map, enter 1s for the min-ter m
A:
Q: When forming the K-map, enter 1s for the min-ter ms
A:
Q: What is the minimal Boolean function of a K-map?
A: DCCAX ⋅+⋅=
Q: What is the minimal Boolean function of a K-map including the ‘don
A: don’t care
Q: What is the minimal Boolean function of a K-map including?
A: ‘don’t care’ conditions
Q: What is the minimal Boolean function of a K-map?
A: DCCAX ⋅+⋅=
Q: What is the minimum Boolean function of a K-map?
A: DCCAX ⋅+⋅=
Q: What is the minimum Boolean function of a K-map?
A: DCCAX ⋅+⋅=
Q: What is the minimal Boolean function of a K-map?
A: DCCAX ⋅+⋅=
Q: How is the minimal Boolean function of a K-map given?
A: by:
DCCAX
Q: What is drawn for the given function and e ncircling of the groups is done
A: The K –map
Q: What is done for the given function and e ncircling of the groups is done
A: The K –map
Q: What is drawn for the given function and e ncircling of the groups done as
A: The K –map
Q: What is drawn for the given function?
A: K –map
Q: Where is the K-map drawn for the given function and e ncircling of
A:
Q: Where is the K -map drawn for the given function and e ncircling
A: figure 4.24
Q: Where is the K –map drawn for the given function and e ncircling
A: figure 4.24
Q: What is done for the given function and e ncircling of the groups?
A: The K –map
Q: What is done for the given function and e ncircling of the groups as shown
A: The K –map
Q: What is drawn for the given function and e ncircling of the groups done?
A: The K –map
Q: What gives the simplified expression in sum of products form?
A: K –map
Q: What gives the simplified expression in sum of products form?
A: K –map
Q: What gives the simplified expression in sum of products form?
A: K –map
Q: What gives the simplified expression in sum of products form?
A: K –map
Q: What gives the simplified expression in sum of products form?
A: K –map
Q: What gives the simplified expression in sum of products form?
A: K –map
Q: What gives the simplified expression in sum of products form?
A: K –map
Q: What gives the simplified expression in sum of products form?
A: K –map
Q: What gives the simplified expression in sum of products form?
A: K –map
Q: What gives the simplified expression in sum of products form?
A: K –map
Q: What is shown in figure 4.27?
A: encircling of the groups
Q: What is drawn for the given function and encircling of the groups is done as
shown
A: The K –map
Q: What is shown in figure 4.27?
A: encircling of the groups
Q: What is shown in figure 4.27?
A: encircling of the groups
Q: What is shown in figure 4.26?
A: The K –map
Q: What is done in figure 4.27?
A: encircling of the groups
Q: Where is the K –map drawn for the given function and encircling of the
A: groups
Q: What is shown in figure 4.26?
A: The K –map
Q: What is shown in figure 4.27?
A: encircling of the groups
Q: What is shown in figure 4.27?
A: encircling of the groups
Q: The simplification of the Boolean function up to four variables have been
discussed in the
A:
4.5 Five and Six Variable K – map
Q: The simplification of the Boolean function up to 4 variables have been discussed
in the
A:
Q: The simplification of the Boolean function up t o four variables have been
A:
4.5 Five and Six Variable K – map
Q: How is the minimized function to be realiz ed with NOR gates?
A: done with 0s and φ
Q: How many variables should a five variable map have?
A: 32 squares
Q: The simplification of the Boolean function up to four variables has been
discussed in the
A:
4.5 Five and Six Variable K – map
Q: How many variables should a 5 variable map have?
A: 32 squares
Q: The simplification of the Boolean function up t to four variables have been
discussed
A:
4.5 Five and Six Variable K – map
Q: How many variables can be used in a Boolean function?
A: four
Q: How many variables can be used in a Boolean function?
A: four
Q: What has been discussed that the K –map of five variables has two blocks of 16
square
A: Simplification of Five and Six Variable Maps
Q: What has been discussed that the K -map of five variables has two blocks of 16
square
A: Simplification of Five and Six Variable Maps
Q: How many blocks does the K-map of five variables have?
A: two blocks of 16 squares
Q: How many blocks does the K –map of five variables have?
A: two blocks of 16 squares
Q: How many blocks of squares does the K-map of five variables have?
A: two blocks of 16
Q: How many blocks does the K -map of five variables have?
A: two blocks of 16 squares
Q: How many blocks of 16 squares does the K –map of five variables have?
A: two
Q: How many blocks of squares does the K –map of five variables have?
A: two blocks of 16
Q: How many blocks of squares does the K -map of five variables have?
A: two blocks of 16
Q: How many blocks of 16 squares does the K-map of five variables have?
A: two
Q: How many squares are adjacent to the squares 51, 55, 63 &
A: four
Q: How many variables can be simplified?
A: five
Q: How many squares are adjacent to the squares 51, 55, 63 and 59
A: four
Q: What can be illustrated by using the following two examples?
A: simplification
Q: What can be illustrated by using the following two examples?
A: simplification
Q: How many squares are adjacent to the squares 51, 55, 63, and
A: four
Q: How many variables is a Boolean function of?
A: five
Q: What can be illustrated by using the following two examples?
A: simplification
Q: How many variables are in a Boolean function?
A: five
Q: How many squares are adjacent to the squares 51, 55, 63, &
A: four
Q: What is the minimiz ed Boolean expression given by?
A:
EDCDCBDBEDF
Q: What is the minimiz ed Boolean expression given by?
A:
EDCDCBDBEDF
Q: Where is the minimiz ed Boolean expression given?
A:
EDCDCBDBEDF
Q: EDCDCBDBEDF +++= Example 4.10:
A:
Q: What is the minimiz ed Boolean expression given in figure 4.33
A:
EDCDCBDBEDF
Q: Where is the minimiz ed Boolean expression given?
A:
EDCDCBDBEDF
Q: What is the minimiz ed Boolean expression given by?
A:
EDCDCBDBEDF
Q: What is the minimiz ed Boolean expression given by?
A:
EDCDCBDBEDF
Q: What is the minimiz ed Boolean expression?
A:
EDCDCBDBEDF
Q: What is the minimiz ed Boolean expression given by?
A:
EDCDCBDBEDF
Q: What method was found to be good for the simplification of Boolean functions of
any
A: Quine – McCluskey Method
Q: What is the name of the method used for the simplification of Boolean function?
A: Quine – McCluskey Method
Q: What is the K –map for the simplification of Boolean function?
A: Quine – McCluskey Method
Q: What is the name of the method developed by Quine and improved by McClusk e
A: Quine – McCluskey Method
Q: What is the name of the method developed by Quine and improved by McCluskey?
A: Quine – McCluskey method
Q: What is the K-map for the simplification of Boolean function?
A: Quine – McCluskey Method
Q: What is the Quine - McCluskey Method?
A: Q – M tabular method
Q: What is the Quine – McCluskey Method?
A: Q – M tabular method
Q: What is the K-map for the simplification of Boolean function known as?
A: Quine – McCluskey Method
Q: What is the K –map for the simplification of Boolean function known as
A: Quine – McCluskey Method
Q: What is the f undamental principle of the Q – M tabular method of
A: minimization of Boolean functions
Q: What are all minterms arranged in groups of same number of 1s in their binary
A: Step I
Q: How are all minterms arranged in groups of same number of 1s in their binary
A: Step I
Q: What is placed on the right hand side of every term which has been combined with
at least
A: A tick mark
Q: How are minterms arranged in groups of same number of 1s in their binary
equivalent
A: Step I
Q: What are all minterms arranged in groups of the same number of 1s in their
A: Step I
Q: What is the f undamental principle of the Q - M tabular method of
A: minimization of Boolean functions
Q: What is the f undamental principle of the Q -M tabular method of
A: minimization of Boolean functions
Q: How are all minterms arranged in groups of same number of 1s?
A: Step I
Q: What is the f undamental principle of the Q – M tabular method?
A: minimization of Boolean functions
Q: What method is used to simplify the Boolean function given in example 4.9?
A: Q – M
Q: What method is used to simplify the Boolean function given in example 4. 9?
A: Q – M
Q: Which method is used to simplify the Boolean function given in example 4. 9?
A: Q – M
Q: Which method is used to simplify the Boolean function given in example 4.9?
A: Q – M
Q: What is used to simplify the Boolean function given in example 4.9?
A: Q – M
method
Q: What method can be used to simplify the Boolean function given in example 4.9?
A: Q – M
Q: What is used to simplify the Boolean function given in example 4. 9?
A: Q – M
method
Q: What method can be used to simplify the Boolean function given in example 4. 9?
A: Q – M
Q: What is the name of the method used to simplify the Boolean function?
A: Q – M
Q: What is the name of the method used to simplify the Boolean function given in
example
A: Example 4.11
Q: 0 0 0 0 0 0 0 0 0
A:
0 0 √ 0 0 0 0 0 0,2
Q: What zeros terms equivalents with Binary Nos. with bina ry Nos.
A:
zeros
Q: Binary Combination Combination Combination II zeros terms equivalents with
Binary Nos. with
A: bina ry Nos.
Q: What zeros terms equivalents with Binary Nos. with bina ry Nos?
A: Combination Combination II
Q: 0 0 0 0 0 0 0 0 0 Bin
A:
0 0 √ 0 0 0 0 0 0,2
Q: Which zeros terms equivalents with Binary Nos. with bina ry Nos.
A:
zeros
Q: 0 Binary Combination Combination Combination II zeros terms equivalents with
Binary Nos
A:
Q: 0 0 Binary Combination Combination Combination II zeros terms equivalents with
Binary
A:
Q: What does Binary Combination Combination Combination II zeros terms equivalents
with?
A: Binary Nos.
Q: 0 0 0 0 0 0 0 0
A:
0 0 √ 0 0 0 0 0 0,2
Q: – Contd. Contd. Combination III with binary Nos. 0,2,4,
A:
__________________________________________
Q: Contd. Contd. Combination III with binary Nos. 0,2,4,6:
A:
__________________________________________
Q: Contd. Contd. Combination III with binary Nos. 0,2,4,6,12
A:
__________________________________________
Q: Contd. Contd. Combination III with binary Nos. 0,2,4,6,7
A:
__________________________________________
Q: – The prime implicants fr. 0,2,4,6:16,18,
A:
__________________________________________
Q: What does Contd. Contd. Combination III with binary Nos. 0,2,4,
A: 0 – – 0
Q: The prime implicants fr. 0,2,4,6:16,18,20,
A:
__________________________________________
Q: – The prime implicants fr. 0,2,4,6,7:18,19
A:
Q: – 0 – 0 – 0 – 0
A:
Q: Contd. Contd. Combination III with binary Nos. 0,2,4,6,16
A:
__________________________________________
Q: The essential prime implicants are represented in the following form: 3,11,19,
A: quads and octets
Q: What are the essential prime implicants represented in the following form?
A: ticked marked
Q: What are the essential prime implicants represented in?
A: the following
form
Q: What is the esse ntial prime implicants represented in the following form?
A: quads and octets
Q: What is the esse ntial prime implicants represented in?
A: the following
form
Q: What is the minimum Boolean function using K – maps?
A: rules
Q: What are the essential prime implicants represented in the following form?
A: ticked marked
Q: What are essential prime implicants represented in the following form?
A: ticked marked
Q: What are the essential prime implicants represented in?
A: the following
form
Q: What are the essential prime implicants represented in the following form?
A: ticked marked
Q: What do you understand by incompletely specified fu nctions how these are used
in eliminating
A:
minimized functions with NAND gates
Q: What do you understand by incompletely specified fu nctions?
A: how these are
used in eliminating the Boolean functions
Q: What do you understand by incompletely specified fu nctions?
A: how these are
used in eliminating the Boolean functions
Q: What is the Quine – Mccluskey method of reduction o f Bo
A: Boolean functions
Q: What do you understand by incompletely specified fu nctions how are used in
eliminating the
A: redundant groups
Q: What do you understand by incompletely specified fu nctions?
A: how these are
used in eliminating the Boolean functions
Q: What is the Quine - Mccluskey method of reduction o f Bo
A: Boolean functions
Q: What do you understand by incompletely specified fu nctions how they are used in
eliminating
A: Boolean functions
Q: What do you understand by incompletely specified fu nctions how are used in
eliminating Bo
A:
minimized functions with NAND gates
Q: What do you understand by incompletely specified fu nctions?
A: how these are
used in eliminating the Boolean functions
Q: What does K –m ap do?
A: Simplify the following Boolean functions
Q: What does K –m ap do?
A: Simplify the following Boolean functions
Q: What do you use to simplify the following Boolean functions?
A: K –m ap
Q: How many Boolean functions can be simplified using K –m ap?
A: 13
Q: What can be used to simplify the following Boolean functions?
A: K –m ap
Q: What does K –m ap do?
A: Simplify the following Boolean functions
Q: What does K -m ap do?
A: Simplify the following Boolean functions
Q: What do you use to simplify the following Boolean functions?
A: K –m ap
Q: What do you use to simplify the Boolean functions?
A: K –m ap
Q: What do you use to simplify the following Boolean functions?
A: K –m ap
Q: Obtain the minimal Boolean functions of the followi ng, using K
A:
16
Q: Obtain the minimal Boolean functions of the followi ng using K –
A:
16
Q: How do you obtain the minimal Boolean functions of the followi ng?
A: using K – map
Q: Obtain the minimum Boolean functions of the followi ng, using K
A:
16
Q: Obtain the minimal Boolean functions of the followi ng using K -
A:
16
Q: What is used to obtain the minimal Boolean functions of the followi ng,
A: K – map
Q: Obtain the minimum Boolean functions of the followi ng using K –
A:
16
Q: Obtain the minimal Boolean functions of the following ng, using K –
A:
16
Q: What is used to obtain the minimal Boolean functions of the followi ng?
A: K – map
Q: What is used to obtain the minimal Boolean functions of the followi ng using
A: K – map
Q: Using K – map, obtain the minimal POS expressions o f the
A:
17
Q: Using K - map, obtain the minimal POS expressions o f the
A:
17
Q: Using K – map, obtain the minimal POS expressions of the following and implement
A: NOR gates only
Q: Using K – map, obtain the minimum POS expressions o f the
A:
17
Q: What does DBDBCAF +++=1 (ii) DCDC
A: DCDCBF
Q: Using K - map, obtain the minimal POS expressions of the following and implement
A: NOR gates only
Q: How many DCBAF Ans. are there?
A: 5
Q: What does DBDBCAF +++=1?
A: ⋅+⋅++=1
Q: How do you obtain the minimal POS expressions o f the following?
A: Using K – map
Q: How do you obtain the minimal POS expressions of the following?
A: Using K – map
Q: Using K – map, obtain the minimal POS expressions o f the
A:
Q: Using K - map, obtain the minimal POS expressions o f the
A:
Q: Using K – map, obtain the minimal POS expressions of the following and implement
A:
Q: Using K – map, obtain the minimum POS expressions o f the
A:
Q: Using K - map, obtain the minimal POS expressions of the following and implement
A:
Q: What does K – map do?
A: Minimize the following functions
Q: Using K – map, obtain the minimal POS expressions and implement them with
A: NOR gates
Q: How do you obtain the minimal POS expressions o f the following?
A: Using K – map
Q: How do you obtain the minimal POS expressions?
A: Using K – map
Q: How do you obtain the minimal POS expressions of the following?
A: K – map meth od
Q: EDBACBCAF ++=1 (ii) ED
A:
Q: EDCBEDCBEDBADCBAECBAEDBADCBEDCBEDCF
A:
φEDCBAF
Q: EDBACBCAF ++=1 (ii) ED
A:
Q: EDBACBCAF ++=1 (ii)
A:
Q: EDBACBCAF ++=2 (ii) ED
A:
φEDCBAF
Q: EDBACBCAF ++=1 (i) EDBA
A:
Q: FEDCBECBAF ++=1 (ii)
A:
Q: FEDBDCBAEDCBECBAF +
A: 4
Q: EDBACBCAF ++=1 (iii)
A:
φEDCBAF
Q: FEDBDCBAEDCBECBAF ++=1
A:
Q: What is the design of the special class o f logic circuits for digital systems
called
A: combinational switching circuits
Q: What are the two types of switching circuits?
A: combinationa l and sequential switching circui
Q: How many types of switching circuits are there?
A: two
Q: What is the design of the special class o f logic circuits for digital systems
known
A: combinational switching circuits
Q: How many types of switching circuits are there?
A: two
Q: How many types of switching circuits are there?
A: two
Q: What is the design of the special class o f logic circuits for digital systems?
A: combinational switching circuits will be d iscussed
Q: What can be used to simplify Boolean functions?
A: logic gates
Q: How many types of switching circuits are there?
A: two
Q: What can be used to simplify Boolean functions?
A: logic gates
Q: What are the network of logic gates having a set of input independent variables
and outputs as
A: combinational circuits
Q: What are the network of logic gates having a set of input independent variables?
A: combinational circuits
Q: What is the network of logic gates having a set of input independent variables
and outputs as
A: combinational circuits
Q: What are the network of logic gates having a set of input independent variables?
A: combinational circuits
Q: What are the network of logic gates having a set of input independent variables?
A: combinational circuits
Q: What is the network of logic gates having a set of input independent variables?
A: combinational circuits
Q: What are the network of logic gates having a set of input and output independent
variables?
A: combinational circuits
Q: What are the network of logic gates having a set of input independent variables?
A: combinational circuits
Q: What type of circuits depend on the verbal sta tement of the problem?
A: combinational
Q: What is the network of logic gates having a set of input independent variables?
A: combinational circuits
Q: What is formed between the required outp ut variables and the given input
variables?
A: The truth table
Q: From the word statement of the problem input indepe ndent variables and output
dependent variables
A:
Q: What is the procedure for the design of the combinational l ogic circuit given
A: below:
Q: What is the procedure for the design of the combinational l ogic circuit?
A:
Q: What is formed between the required outp ut variables and given input variables?
A: The truth table
Q: From the word statement of the problem input indepenent variables and output
dependent variables are isolated
A:
Q: What is the procedure for the design of the combinatio l ogic
A: The procedure for the design of the combinational l ogic circuit
Q: What is the procedure for the design of the combinational l ogic circuit shown
A: below:
Q: What is formed between the required output variables and the given input
variables?
A: The truth table
Q: What is formed between the required outp ut variables and given input variables?
A: The truth table
Q: How many platforms does a railway station have?
A: four
Q: How many platforms are in a railway station?
A: four
Q: How many platforms does a railway station have marked as P1, P2, and P3?
A: four
Q: A railway station has four platforms marked as P1, P2, and P3 as shown in the
A: figure 5.2
Q: How many platforms does a railway station have?
A: four
Q: How many platforms is a railway station marked as?
A: four
Q: How many platforms are there at a railway station?
A: four
Q: How many platforms are there in a railway station?
A: four
Q: How many platforms are in a railway station?
A: four
Q: How many platforms does a railway station have?
A: four
Q: The switching system having input and output variables is shown in figure 5.3.
The Signal S is
A:
Fig. 5.3
Q: What is assigned to the platforms P1, P2, P3 & P4 if they
A: Logic 0’s
Q: What is assigned to the platforms P1, P2, and P3 if they are empty?
A: Logic 0’s
Q: What is assigned to the platforms P1, P2, P3 & P4 if the
A: Logic 0’s
Q: What is the switching system with input and output variables shown in figure
5.3?
A: the outer signal S
Q: The switching system having input and output variables is shown in figure 5.3.
Now the logic values
A:
Fig. 5.3
Q: What is assigned to the platforms P1, P2, P3 & P4 if these
A: Logic 0’s
Q: What is the switching system with input and output variables shown in figure
5.3?
A: the outer signal S
Q: What is the switching system having input and output variables shown in figure
5.3?
A: the outer signal S
Q: What is the switching system having input and output variables shown in figure
5.3?
A: the outer signal S
Q: What can be directly obtai ned as: 4321 P
A: The Boolean expressions for S
Q: What can be directly obtained as: 4321 PPPPS
A: The Boolean expressions for S
Q: What can be obtai ned as: 4321 PPP
A: The Boolean expressions for S
Q: What can be obtained as: 4321 PPPPS +
A: Boolean expressions for S
Q: How many Boolean expressions can be directly obtai n
A: 4321
Q: Who can design the combinational logic circuit using NAN D gates?
A: Example 5.2
Q: How many Boolean expressions can be directly obtained
A: 4321
Q: What can be directly obtai ned?
A: The Boolean expressions for S
Q: What can be directly obtai ned as?
A: The Boolean expressions for S
Q: What can be directly obtai ned as?
A: The Boolean expressions for S
Q: How many input variables does the problem have?
A: four
Q: How many input variables does a problem have?
A: four
Q: How many input variables does a problem have?
A: four
Q: How many input variables does the problem have?
A: four
Q: How many input variables does the problem have?
A: four
Q: How many input variables does the problem have?
A: four
Q: How many input variables does the problem have?
A: four
Q: How many input variables are there?
A: four
Q: How many input variables does the problem have?
A: four
Q: How many input variables does the problem have?
A: four
Q: What is shown in figure 5.6?
A: switching system having input and output variab les
Q: What is shown in figure 5.6?
A: switching system having input and output variab les
Q: What is shown in figure 5.6?
A: switching system having input and output variab les
Q: What is the output variable of the policy shown in figure 5.6?
A: P
Q: Where is the tube light located in a group of four flats?
A: tenants of the four flats using switches
located in their flats
Q: What is shown in figure 5.6?
A: switching system having input and output variab les
Q: What is shown in figure 5.6?
A: switching system having input and output variab les
Q: What is shown in figure 5.6?
A: switching system having input and output variab les
Q: How many flats has a tube light?
A: four
Q: Where is the tube light located in a group of four flats?
A: tenants of the four flats using switches
located in their flats
Q: How many input variables does the switching circuit to be designed have?
A: four
Q: How many input variables does the switching circuit to be designed have?
A: four
Q: How many input variables does the switching circuit have?
A: four
Q: How many input variables does the circuit to be designed have?
A: four
Q: How many input variables does the switching circuit to be designed have?
A: four
Q: What is the output variable for the tube light?
A: L
Q: What is the output variable of the switching circuit to be designed?
A: tube light L
Q: How many input variables does a switching circuit have?
A: four
Q: What is the output variable for the tube light L?
A: either glow or not glow
Q: How many input variables does the switching circuit to be designed have?
A: four
Q: What percentage of the board of directors owns 10% shares of a company?
A: A
Q: How many board of directors are there of a company?
A: five
Q: How many board of directors are there of a company?
A: five
Q: How many board of directors of a company are there?
A: five
Q: How many board of directors are there in a company?
A: five
Q: How many board of directors of a company are there?
A: five
Q: How many board of directors are there of a company?
A: five
Q: How many board of directors are there of a company?
A: five
Q: How many board of directors are there in a company?
A: five
Q: How many board of directors of a company are there?
A: five
Q: How many input variables are there?
A: five
Q: How many input variables are there?
A: five
Q: How many input variables are there?
A: five
Q: How many input variables are there?
A: five
Q: How many input variables are there?
A: five
Q: How many input variables does each director have?
A: five
Q: How many input variables are there?
A: five
Q: How many input variables are there?
A: five
Q: How many input variables and one output variables are there?
A: five
Q: How many input variables are there?
A: five
Q: What indicates that in order to pass a policy, the board of directors BDE or B
A: sion
Q: What indicates that in order to pass a policy, the board of directors should
vote in favour
A: sion
Q: How many inp ut variables does the logic circuit have?
A: six
Q: How many inp ut variables does the logic circuit to be designed have?
A: six
Q: How many inp ut variables does a logic circuit have?
A: six
Q: How many inp ut variables does the logic circuit to be designed have?
A: six
Q: What indicates that in order to pass a policy, the board of directors should
vote in favor
A: sion
Q: What indicates that in order to pass a policy the board of directors should vote
in favour of
A: sion
Q: What indicates that in order to pass a policy, the board of directors BDE, B
A: sion
Q: What indicates that the board of directors should vote in favour of a policy?
A: sion
Q: Where are the Boolean expressions for x 2, x 1, x
A: 0111012
Q: What shows the outcome of two different sign bits?
A: Truth table 5.6
Q: How are the Boolean expressions for x 2, x 1, x
A: The realization of these expressions with And, OR a nd Not gates
Q: What shows the outcome of two different sign bits?
A: Truth table 5.6
Q: Where are the Boolean expressions for x 2, x 1, and 0
A: K-maps drawn for
each variable
Q: What shows the outcome of two different sign bits?
A: Truth table 5.6
Q: What shows the outcome of two different sign bits?
A: Truth table 5.6
Q: The truth table 5.6 shows the outcome of two different sign bits.
A:
Q: What shows the outcome of two different sign bits?
A: Truth table 5.6
Q: What shows the outcome of two different sign bits?
A: Truth table 5.6
Q: What is a half adder that adds two binary digits simultaneously?
A: Half Adder
Q: What is one half adder that adds two binary digits simultaneously?
A: Half Adder
Q: What is a half adder?
A: one which adds two binary digits simultaneously
Q: What is a half adder?
A: one which adds two binary digits simultaneously
Q: What is a half adder?
A: one which adds two binary digits simultaneously
Q: What is one that adds two binary digits simultaneously?
A: A half adder
Q: What is one half adder that adds two binary digits simultaneously?
A: Half Adder
Q: What is one that adds two binary digits simultaneously?
A: A half adder
Q: What is one that adds two binary digits simultaneously?
A: A half adder
Q: A half adder is one which adds two binary digits simultaneously and falls in the
A: combinational circ uits
Q: How many NAND gates does this circuit utilize?
A: 7
Q: How many NAND gates does the circuit utilize?
A: 7
Q: How many NAND gates are used for the half adder?
A: 7
Q: What is the symbolic representation of the half adder?
A: figure 5.22
Q: What may be realized by using NAN D gates only?
A: e circuit
Q: Where is the symbolic representation of the half adder given?
A: figure 5.22
Q: What may be realized by using NAN D gates only?
A: e circuit
Q: Where is the symbolic representation of the half adder given?
A: figure 5.22
Q: What is the symbolic representation of the half adder given in figure 5.22?
A:
Q: What may be realized by using NAN D gates only?
A: e circuit
Q: What is the minimal Boolean expression for S1 and C1 obtained using?
A: K – map
Q: What is the minimum Boolean expression for S1 and C1 obtained using?
A: K – map
Q: What is used to obtain the minimal Boolean expression for S1 and C1?
A: K – map
Q: What is used for the minimal Boolean expression for S1 and C1?
A: K – map
Q: How is the minimal Boolean expression for S1 and C1 obtained?
A: using K – map
Q: The minimal Boolean expression for S1 and C1 is obtained using what?
A: K – map
Q: The minimal Boolean expression for S1 and C1 is obtained using K –
A:
Q: What is a minimal Boolean expression for S1 and C1 obtained using?
A: K – map
Q: The minimal Boolean expression for S1 and C1 is obtained using the K
A:
Q: What is the minimal Boolean expression for S1 and C1?
A: K – map
Q: What is the carry bit of the half adder?
A: 11BA⋅
Q: What is the carry bit of the half adder?
A: 11BA⋅
Q: What is the carry bit of half adder?
A: 11BA⋅
Q: What is the carry bit of half adder?
A: 11BA⋅
Q: What is the carry bit (say C) of the half adder?
A: 11BA⋅
Q: What is the carry bit of a half adder?
A: 11BA⋅
Q: What is the carry bit of a half adder?
A: 11BA⋅
Q: What is the carry bit (say C) of the half adder?
A: 11BA⋅
Q: What is the carry bit of the half adder?
A: 11BA⋅
Q: What is the carry bit of the half adder?
A: 11BA⋅
Q: What is the name of the two-bit binary full adder IC?
A: 74LS82
Q: What is a parallel binary adder?
A: The addition of more number of bits may be added i n the similar fashion
Q: What is the name of the two-bit binary full adder IC?
A: 74LS82
Q: What is an example of a half subtractor using NAND gates only?
A: 5.4
Q: What is the addition of more number of bits known as?
A: parallel binary adder
Q: What is the addition of more number of bits called?
A: parallel binary adder
Q: What is a parallel binary adder known as?
A: The addition of more number of bits may be added i n the similar fashion
Q: What is the name of the two-bit binary full adder IC?
A: 74LS82
Q: What is an example of a half subtractor using NAND gates only?
A: 5.4
Q: What is the name of the two-bit binary full adder IC?
A: 74LS82
Q: What is the symbolic representation of half subtractor?
A: g iven
Q: What is the symbolic representation of half subtractor?
A: g iven
Q: What may be designed by the same met hod as the half adder?
A: btractor
Q: What is the symbolic representation of half subtractor?
A: g iven
Q: What is the symbolic representation of half subtractor?
A: g iven
Q: Where is the truth table for the half subtractor given?
A: tab le 5.10
Q: What are the minuend and subtrahend of the half subtractor?
A: X 0 and Y 0
Q: What is the symbolic representation of half subtractor?
A: g iven
Q: What may be designed by the same met hod as the half adder?
A: btractor
Q: What are the minuend and subtrahend of half subtractor?
A: X 0 and Y 0
Q: The Boolean express ion for difference D 1 is given by: 01111
A: 011 011
Q: What is the Boolean express ion for difference D 1 given by?
A: 01111 01111
Q: The Boolean expression for the borrow B 1 to the next bit is obtained from the
A: K –map
Q: What is the Boolean express ion for difference D 1?
A: 01111 01111
Q: What is the Boolean expression for the borrow B 1 to the next bit obtained from
A: the K –map
Q: The Boolean express ion for difference D 1 is given by: 0111
A: 01110111 11
Q: What is the Boolean expression for difference D 1 given by?
A: 01111 01111
Q: What is the Boolean expression for the borrow B 1 to the next bit?
A: 01110111 11
Q: Where D 0 is the difference of the half subtractor, the full subtractor circuit
may
A:
01101101101111
Q: What is the Boolean expression for difference D 1?
A: 01111 01111
Q: What is necessary to design BCD adder?
A: digital
systems
Q: What is necessary to design BCD adder?
A: digital
systems
Q: How are the two decimal numbers added in 8421 code?
A: 6
(0110) is added to the incorrect sum
Q: How many decimal numbers are added in 8421 code?
A: two
Q: How are the two decimal numbers added in the 8421 code?
A: 6
(0110) is added to the incorrect sum
Q: How many decimal numbers are added in 8421 code?
A: two
Q: How are two decimal numbers added in 8421 code?
A: 6
(0110
Q: How are the two decimal numbers added in 8421 code?
A: 6
(0110) is added to the incorrect sum
Q: How are the two decimal numbers added in 8421 code?
A: 6
(0110) is added to the incorrect sum
Q: How are the two decimal numbers added in 8421 code?
A: 6
(0110) is added to the incorrect sum
Q: If the sum S 4S3S2S1S0 is more than 9, then 01
A: 0110 is added to it
Q: When is the sum S 4S3S2S1S0 more than 9?
A: if S 4 is 1
Q: When is the sum of S 4S3S2S1S0 more than 9?
A: if S 4 is 1
Q: When the sum S 4S3S2S1S0 is more than 9, then 01
A: 0110 is added to it
Q: If the sum S 4S3S2S1S0 is more than 9 then 01
A: 0110
Q: When the sum S 4S3S2S1S0 is more than 9, 0110
A:
0000
Q: What is added to the incorrect sum if the sum S 4S3S2S1
A: 0XX0
Q: When the sum S 4S3S2S1S0 is more than 9, what is
A: 0110 is added to it
Q: What should be added to the incorrect sum if the sum is more than 9?
A: 0XX0
Q: What is added to the incorrect sum if the sum is more than 9?
A: 0XX0
Q: How many bits can be drawn for full one decimal digit in XS –
A: four
Q: In XS –3 code first three numbers 0000 through 0010 and the
A:
Q: How many decimal digits can be easily drawn for full one decimal digit?
A: four bits
Q: How many bits can be drawn for full one decimal digit?
A: four
Q: How many bits can be easily drawn for full one decimal digit in XS
A: four
Q: How many bits can be drawn for full one decimal digit (four bits)?
A:
Q: What should be used for the design of the excess –3 adder?
A: the addition of decimal numbers in XS –3 code
Q: In XS –3 code first three numbers 0000 through 0010 and last
A:
Q: How many bits can be easily drawn for full one decimal digit?
A: four
Q: How many decimal digits can be easily drawn for full one decimal digit (
A: four bits
Q: What is most commonly used in arithmeti c circuits because it greatly simplifie
A: two’s complement
adder/subtractor
Q: What is the two's complement adder/subtractor most commonly used in?
A: arithmeti c circuits
Q: The two's complement adder/subtractor is most commonly used in arith
A:
5.7 Two’s Complement Adder
Q: What is most commonly used in arithmeti c circuits?
A: two’s complement
adder/subtractor
Q: What is the most commonly used adder/subtractor in arithmeti
A: Two’s Complement Adder/Subtractor
Q: What is most commonly used in arithmeti c circuits?
A: two’s complement
adder/subtractor
Q: What is the most commonly used two's complement adder/subtractor?
A: Two’s Complement Adder/Subtractor
Q: What is the most commonly used two's complement adder/subtractor in a
A: Two’s Complement Adder/Subtractor
Q: What is the most common two's complement adder/subtractor used in?
A: arithmeti c circuits
Q: What method is most commonly used in arithmeti c circuits?
A: Two’s Complement Adder/Subtractor
Q: What is used to directly load B's to the full adders for addition
A: A
SUB signal
Q: What is the circuit diagram of 2's compl ement adder/ subtractor?
A: Figure 5.43
Q: What is used to directly load B’s to the full adders for addition
A: A
SUB signal
Q: What signal is used to directly load B's to the full adders for
A:
SUB
Q: What is used to directly load B's to the full adders?
A: A
SUB signal
Q: What signal is provided in the circuit to directly load B's to the full
A:
SUB
Q: What is used to add B3B2B1B0 to it?
A:
inverting B3B2B1B0
Q: What is used to add B3B2B1B0 to the circuit diagram?
A:
SUB signal
Q: What signal is used to directly load B's to the full adders?
A:
SUB
Q: What is used to add B3B2B1B0 to it?
A:
inverting B3B2B1B0
Q: What are combinational circuits?
A:
logic circuits
Q: What does the circuit work as?
A: the subtractor
Q: What is the design procedure of combinational logic circuits?
A: combinational
logic circuits
Q: What are combinational circuits?
A:
logic circuits
Q: What does the circuit work as?
A: the subtractor
Q: What is the design procedure of combinational logic circuits?
A: combinational
logic circuits
Q: What are combinational circuits?
A:
logic circuits
Q: What do combinational circuits do?
A:
logic circuits
Q: What does the circuit work as?
A: the subtractor
Q: What is the design procedure of combinational logic circuits?
A: combinational
logic circuits
Q: How many inputs A, B, C and D control three LEDs?
A: Four
Q: How many inputs control three LEDs?
A: Four
Q: How many inputs control three LEDs?
A: Four
Q: How many inputs A, B, C, and D control three LEDs?
A: Four
Q: How many inputs control three LEDs?
A: Four
Q: How many inputs A, B, C and D control three LEDs?
A: Four
Q: How many inputs A, B, C, and D control three LEDs?
A: Four
Q: How many inputs control three LEDs?
A: Four
Q: How many inputs control three LEDs?
A: Four
Q: How many inputs A, B, C and D control three LEDs?
A: Four
Q: How many shares does the board of directors have?
A: 45%, 20%, 10% and 25%
Q: How many shares does the board of directors hold?
A: 45%, 20%, 10% and 25%
Q: How many shares does the board of directors hold?
A: 45%, 20%, 10% and 25%
Q: What percentage of shares does the board of directors have?
A: 45%, 20%, 10% and 25%
Q: What percentage of shares does the board of directors hold?
A: 25%
Q: What percentage of shares does the board of directors hold?
A: 25%
Q: How many shares does the board of directors hold?
A: 45%, 20%, 10% and 25%
Q: What percentage of shares does the board of directors hold?
A: 25%
Q: How many shares does the board of directors hold?
A: 45%, 20%, 10% and 25%
Q: What percentage of shares does the board of directors have?
A: 45%, 20%, 10% and 25%
Q: How many exclusive-OR gates are used in a full adder circuit?
A: two
Q: How many exclusive-OR gates are there?
A: two
Q: How many exclusive-OR gates are there?
A: two
Q: How many exclusive-OR gates are there?
A: two
Q: What is a full subtractor?
A: a combination of two half subtractors
Q: What is half subtractor?
A: 5 NAND gates (ii) 5 NOR gates
Q: What is half subtractor?
A: 5 NAND gates (ii) 5 NOR gates
Q: What is half subtractor?
A: 5 NAND gates (ii) 5 NOR gates
Q: What is a full subtractor?
A: a combination of two half subtractors
Q: What is a full subtractor?
A: a combination of two half subtractors
Q: What is MUX also known as?
A: data selecto r
Q: What is the logic circuit that allows the digital information from m ulti-in
A: A multiplexer
Q: What is a MUX also known as?
A: data selecto r
Q: What is another name for MUX?
A: MUX
Q: What is another name for a multiplexer?
A: MUX
Q: What is MUX also known as?
A: data selecto r
Q: What is a MUX also known as?
A: data selecto r
Q: What is a MUX also known as?
A: data selecto r
Q: What is a multiplexer also known as?
A: data selecto r
Q: What is a multiplexer also known as?
A: data selecto r
Q: The block diagram for 4:1 multiplexer is shown in f igure 6.1
A: Xwill
Q: The block diagram for a 4:1 multiplexer is shown in f igure
A: X is
the output terminal
Q: What is provided in the MUXs which is normally active-low?
A: a strobe terminal
Q: What is the Boolean function to perform the multiplexing action given as?
A: 013012 011010
Q: What is provided in the MUXs that is normally active-low?
A: a strobe terminal
Q: How many select terminals are needed for 422=?
A: two
Q: How many select terminals are needed?
A: two
Q: What is the Boolean function to perform the multiplexing action?
A: 013012 011010
Q: What is provided in the MUXs which is normally active-low?
A: a strobe terminal
Q: How many select terminals are needed for 422=?
A: two
Q: The internal logic diagram of the IC 74157 is given in figure 6.3. The
A:
74157
Q: What is the internal logic diagram of the IC 74157?
A: figure 6.3
Q: What is the internal logic diagram of the IC 74157?
A: figure 6.3
Q: What is the internal logic diagram of the IC 74157 given in?
A: figure 6.3
Q: How many input multiplexers does the IC 74157 have?
A: four
Q: What is the internal logic diagram of the IC 74157?
A: figure 6.3
Q: The internal logic diagram of the IC 74157 is given in figure 6.3. What
A:
74157
Q: How many input multiplexers does the IC 74157 consist of?
A: four two
Q: The internal logic diagram of the IC 74157 is given in figure 6.3.
A:
74157
Q: What is the internal logic diagram of the IC 74157?
A: figure 6.3
Q: How many input lines does the IC 74150 have?
A: 16
Q: The IC 74150 is 16:1 multiplexer having 16 input lines and one
A:
Q: When enable terminal G is high, the multiplexer is disabled and output X is zero
A:
select input terminal
Q: How many input lines is the IC 74150?
A: 16
Q: How many input lines does the IC 74150 have?
A: 16
Q: How many input lines does the IC 74150 have?
A: 16
Q: How many input lines does IC 74150 have?
A: 16
Q: How many input lines and one output line does the IC 74150 have?
A: 16
Q: How many input lines and one output line does the IC 74150 have?
A: 16
Q: How many input lines does the IC 74150 have?
A: 16
Q: How many 4:1 MUXs are cascaded to form 8:1 MUX
A: two
Q: How are two 4:1 MUXs cascaded to form 8:1 MUX
A: The enable
terminal G
Q: How many MUXs are cascaded to form 8:1 MUX?
A: two 4:1 MUXs
Q: What is the primary aim of MUXs?
A: multiplexing
operation
Q: What is the primary aim of the MUXs?
A: multiplexing
operation
Q: What is the primary aim of the MUXs?
A: multiplexing
operation
Q: What is the primary aim of MUXs?
A: multiplexing
operation
Q: When S 2 is zero, the first MUX will be enabled and inputs X
A: 0 through X 3 will be
routed to its output
Q: What is the primary aim of MUXs?
A: multiplexing
operation
Q: When S2 is zero, the first MUX will be enabled and inputs X
A: 0 through X 3 will be
routed to its output
Q: What are the input variables of the function F?
A: A, B, C, D
Q: What is connected to the data se lect inputs of the multiplexer?
A: The variables
Q: What is connected to the remaining inputs of the MUX?
A: The logic 0
Q: What is the most significant bit of the function F?
A: The variable A
Q: How many variables can be implemented with an 8:1 multiplexer?
A: 4
Q: What is connected to the remaining inputs of the MUX?
A: The logic 0
Q: How many variables can be implemented with 8:1 multiplexers?
A: 4
Q: How many variables can be implemented with an 8:1 multiplexer?
A: 4
Q: The logic 0 is connected to the remaining inputs of the MUX. What are
A: The variables
Q: The logic 0 is connected to the remaining inputs of the MUX. The variables
A: data se lect inputs of the multiplexer
Q: What is connected to the data input of MUX?
A: A logical 0
Q: What is connected to the data input of MUX if the 0 occurs at the
A: A logical 0
Q: What is connected to the data input of MUX, if the 0 occurs at
A: A logical 0
Q: What is connected to the data input of MUX if a 0 occurs at
A: A logical 0
Q: What is connected to the data input of MUX?
A: A logical 0
Q: What happens at the output in the truth table when MSB is 0 and 1?
A: 1
Q: What is connected to the data input of MUX?
A: A logical 0
Q: What is connected to the data input of MUX, if a 0 occurs
A: A logical 0
Q: What is connected to the data input of MUX?
A: A logical 0
Q: When a logical 0 is connected to the data input of MUX, what
A:
2
Q: What is well known that a full adder adds three bit s of information?
A: Let A B C are
three bits to be added
Q: The truth table of the given function is drawn a s shown in table 6.3.
A:
Q: How many bits of information does a full adder add?
A: three
Q: What is well known that a full adder adds three bits of information?
A:
Q: What is well known that a full adder adds three bit of information?
A:
Q: How many bits of information does a full adder add?
A: three
Q: How many bits does a full adder add?
A: three
Q: How many bits of information does a full adder add?
A: three
Q: What is well known that a full adder adds three bits of information?
A:
Q: What is well known that a full adder adds three bit of information?
A:
Q: Where is the truth table for the given function first of all drawn?
A: table 6.5
Q: Where is the truth table for the given function first drawn?
A: table 6.5
Q: Where is the truth table for the given function first of all drawn?
A: table 6.5
Q: What is the reverse process of a multiplexer?
A: demultiplexer
Q: Where is the truth table for the given function first drawn?
A: table 6.5
Q: What does a demultiplexer perform?
A: reverse process o f multiplexer
Q: What is the reverse process of a multiplexer?
A: demultiplexer
Q: What is the reverse process of a multiplexer?
A: demultiplexer
Q: What does a demultiplexer perform?
A: reverse process o f multiplexer
Q: What is the reverse process o f multiplexer?
A: A demultiplexer
Q: In a 1:4 DMUX, let X is the data input which is
A:
Q: What is a logic circuit that has a set of inputs representing a binary
A: A decoder
Q: What is a decoder a logic circuit that has a set of o
A: A decoder is a logic circuit which has a set o f inputs
Q: What is a logic circuit that has a set of o f inputs representing
A: A decoder
Q: What is a decoder a logic circuit which has a set of o
A: A decoder is a logic circuit which has a set o f inputs
Q: What is a decoder?
A: a logic circuit
Q: What is a decoder?
A: a logic circuit
Q: What is a decoder a logic circuit that has a set o
A: A decoder
Q: What is a decoder a logic circuit which has a set o
A: A decoder is a logic circuit which has a set o f inputs
Q: What is a decoder a logic circuit with a set of o
A: A decoder is a logic circuit which has a set o f inputs
Q: Figure 6.12 shows the functional block diagram of a decoder having N inputs and
A: K outputs
Q: Figure 6.12 shows the functional block diagram of a decoder with N inputs and
A: K outputs
Q: What is the circuit diagram of a 3 – to – 8 line decoder
A: Figure 6.13
Q: How many input lines does a 3 to 8 line decoder have?
A: three
Q: What is the circuit diagram of a 3 to 8 line decoder?
A: Figure 6.13
Q: What is the circuit diagram of a 3 to 8 line decoder?
A: Figure 6.13
Q: What is the circuit diagram of a 3 – to 8 line decoder?
A: Figure 6.13
Q: How many inputs does a 3 to 8 line decoder have?
A: three
Q: How many input lines does a 3 to 8 line decoder have?
A: three
Q: How many input lines does a decoder have?
A: three
Q: When the Enable input is connected to logic 0, all the gates will be
A: disabled
Q: How many outputs are activated at a time?
A: one
Q: What is connected to the fourth input of each gate?
A: an Enable in put line
Q: When the Enable input is connec ted to logic 0, all the gates will
A: disabled
Q: How many outputs are activated at a time?
A: one
Q: How many outputs are activated at a time?
A: one
Q: How many outputs are activated at a time in a 3 to 8 line de
A: one
Q: How many outputs is activated at a time?
A: one
Q: How many outputs are activated at a time?
A: one
Q: How many outputs are activated at a time?
A: one
Q: What can a 2:4 line decoder with Enable terminal be used as?
A: 1:4 DMUX
Q: What can a 2:4 line decoder with Enable terminal function as?
A: 1:4 DMUX
Q: What can a 2:4 line decoder with Enable terminal be used as
A: 1:4 DMUX
Q: What can be used as a 1:4 DMUX?
A: a 2:4 line decoder with Enable terminal
Q: How can a 2:4 line decoder be used as a 1:4
A: if the
Enable terminal E is used as the data input line
Q: How many line decoders can be connected to form a larger decoder circuit
A: two 3:8
Q: When the enable terminal E is 0, the decoder (1) is enabled and decoder (2)
A: disabled
Q: How many line decoders can be connected to form a 4:16 line decode
A: two 3:8
Q: What can be used as a demultiplexer?
A: the decoder
Q: What can a 2:4 line decoder with Enable terminal be used for?
A: 1:4 DMUX
Q: What is the most significant bit of a Boolean function?
A: E terminal
Q: What is the most significant bit of the decoder?
A: E terminal
Q: What is the most significant bit for E terminal?
A: least significant bit
Q: How many Boolean functions can be implemented using the decoder circuits?
A: one decoder and a few
gates
Q: How many Boolean functions can be realized using the decoder circuits?
A: one decoder and a few
gates
Q: What is the most significant bit of the Boolean functions?
A: E terminal
Q: Which terminal is the most significant bit?
A: E
Q: How many Boolean functions can be implemented using a decoder?
A: one decoder and a few
gates
Q: Which terminal is the most significant bit?
A: E
Q: What is the most significant bit?
A: E terminal
Q: How many OR gates are used for the implementation of three functions?
A: Three
Q: How many OR gates are used for the implementation of three functions?
A: Three
Q: How many OR gates are used for the implementation of three function?
A: Three
Q: How many OR gates are used in a full subtractor circuit?
A: two
Q: What does the BCD to Decimal decoder convert each BCD input character into one
A: ten possibl e decimal form
Q: How many OR gates are used to implement a full subtractor circuit?
A: two
Q: How many OR gates are used for the implementation of three functions?
A: Three
Q: What is the BCD to Decimal Decoder?
A: converts each BCD
input character
Q: What does the BCD to Decimal decoder convert each BCD input character into?
A: one of ten possibl e decimal form
Q: What is the BCD to Decimal Decoder referred to as?
A:
4 – to – 10 line decoder
Q: What is the most commonly used BCD to decimal decoder TTL IC?
A: 74LS42
Q: What is the most common BCD to decimal decoder TTL IC?
A: 74LS42
Q: What is the most popular BCD to decimal decoder TTL IC?
A: 74LS42
Q: What is the most frequently used BCD to decimal decoder TTL IC?
A: 74LS42
Q: What is the most widely used BCD to decimal decoder TTL IC?
A: 74LS42
Q: What is the most commonly used BCD to decimal decoder TTL?
A: 74LS42
Q: What is the most commonly used BCD to decimal decoder TTL IC called
A: 74LS42
Q: What is the most commonly used demultiplexer IC in the market?
A: 74LS42
Q: What is the most commonly used demulti plexer IC in the market?
A: DMU X
Q: What is the most commonly used demulti plexer IC?
A: 74LS42
Q: What is the common cathode LED display device known as?
A: common ano de
Q: What are seven segment LED display devices also known as?
A:
common cathode
Q: What are seven segment LED display devices also known as?
A:
common cathode
Q: What are the seven segment LED display devices also known as?
A:
common cathode
Q: What are seven-segment LED display devices also known as?
A:
common cathode
Q: What are seven segment LED display devices also known as?
A:
common cathode
Q: What are seven - segment LED display devices also known as?
A:
common cathode
Q: What are the segments of seven segment LED display devices known as?
A: a, b, c, d, e, f, g
Q: What are seven segment LED display devices also known as?
A:
common cathode
Q: What type of LED display devices are operated at low voltage and low power?
A: seven – segment
Q: What are BCD to sev en - segment decoders available in the
A: ICs
Q: What type of decoders are available in the form of ICs?
A: BCD to sev en - segment decoders
Q: How are BCD to sev en - segment decoders available?
A: in the form of ICs
Q: What are BCD to sev en - segment decoders available in?
A: ICs
Q: What are BCD to sev en- segment decoders available in the form
A: ICs
Q: How are BCD to sev en - segment decoders available in the
A: in the form of ICs
Q: What type of decoders are available in the form of ICs?
A: BCD to sev en - segment decoders
Q: What are available in the form of ICs?
A: BCD to sev en - segment decoders
Q: What are BCD to sev en - segment decoders available as?
A: ICs
Q: How many inputs and seven outputs will the logic circuit have?
A: 4
Q: What is the maximum voltage rating of IC 7447?
A: 15 volts
Q: What is the maximum voltage rating for IC 7447?
A: 15 volts
Q: What is the maximum voltage rating of the IC 7447?
A: 15 volts
Q: The expressions for the seven segments a through d can be implemented using the
AND OR
A:
Q: What are used to implement the expressions for the seven segments a through d?
A: AND OR and Not gates
Q: What is the maximum voltage rating of IC 7447?
A: 15 volts
Q: What can be implemented using the AND OR and Not gates?
A: The expressions for the seven segments a through d
Q: What is the maximum voltage of IC 7447?
A: 15 volts
Q: What is the maximum voltage rating of IC 7447?
A: 15 volts
Q: What is the maximum voltage rating of the IC 7447?
A: 15 volts
Q: What is most commonly used in digital sytems?
A: Code converter : Code converter
Q: What is most commonly used in digital sytems?
A: Code converter : Code converter
Q: What is most commonly used in digital systems?
A: Code converter : Code converter
Q: What is most commonly used in digital systems?
A: Code converter : Code converter
Q: What is most commonly used in digital sytems?
A: Code converter : Code converter
Q: What is the most commonly used code converter in digital systems?
A: Code converter
Q: What is most commonly used in digital systems?
A: Code converter : Code converter
Q: What is the most commonly used in digital sytems?
A: Code converter
Q: What is the most commonly used in digital systems?
A: Code converter
Q: What is the most commonly used code converter in digital sytems?
A: Code converter
Q: What is needed to convert the digits given in 8421 to cyclic code
A:
converter
Q: How many input variables are taken for the given code?
A: four
Q: The conversion of 8421 to cyclic code is illustrated by taking an example by
taking
A:
converter
Q: What is illustrated by taking an example of code converter?
A: process of code
converter
Q: What is illustrated by taking an example of code converter?
A: process of code
converter
Q: What is illustrated by taking an example of a code converter?
A: process of code
Q: What is the process of code converter illustrated by taking an example?
A: cyclic code
Q: The conversion of 8421 to cyclic code is illustrated by taking an example of
what
A: process of code
converter
Q: The conversion of 8421 to cyclic code is illustrated by taking an example of
A:
Q: The conversion of 8421 to cyclic code is illustrated by taking an example. What
A: process of code
converter
Q: What is an encoder a combinational circuit which performs the reverse operation
of
A: decoder
Q: What is a combinational circuit which performs the reverse operation of decoder
A: An encoder
Q: What is a combinational circuit that performs the reverse operation of decoder
A: An encoder
Q: What is an encoder a combinational circuit that performs the reverse operation
of
A: decoder
Q: What is an encoder?
A: combinational circuit
Q: What is an encoder?
A: combinational circuit
Q: What is a combinational circuit which performs the reverse operation of a de
A: An encoder
Q: What is an encoder?
A: combinational circuit
Q: What is an encoder?
A: combinational circuit
Q: What is an encoder?
A: combinational circuit
Q: What is an octal – to – binary encoder also known as?
A: 8 –
line to 3 – line encoder
Q: What is another name for an octal – to – binary encoder?
A: 8 –
line to 3 – line encoder
Q: What is an octal - to - binary encoder also known as?
A: 8 –
line to 3 – line encoder
Q: What is another name for octal – to – binary encoder?
A: 8 –
line to 3 – line encoder
Q: What is an octal to – binary encoder also known as?
A: 8 –
line to 3 – line encoder
Q: What is an octal - to-binary encoder also known as?
A: 8 –
line to 3 – line encoder
Q: What is an octal to - binary encoder also known as?
A: 8 –
line to 3 – line encoder
Q: What is another name for an octal - to - binary encoder?
A: 8 –
line to 3 – line encoder
Q: What is an octal – to – binary encoder also called?
A: 8 –
line to 3 – line encoder
Q: What is another name for an octal to – binary encoder?
A: 8 –
line to 3 – line encoder
Q: How many inputs does the decimal – to – BCD encoder have?
A: 10
Q: What is the logic circuit for the octal – to – binary en
A: Decimal – to – BCD Encoder
Q: How many inputs does the decimal to BCD encoder have?
A: 10
Q: How many inputs does the decimal - to - BCD encoder have?
A: 10
Q: What is the logic circuit for the octal – to – binary encoder
A: Decimal – to – BCD Encoder
Q: What is the logic circuit for the decimal – to – BCD encoder with
A:
6.6 Priority Encoder
Q: How many inputs does a decimal to BCD encoder have?
A: 10
Q: Where is the logic circuit for the octal – to – binary en
A: Decimal – to – BCD Encoder
Q: How many inputs does the decimal to – BCD encoder have?
A: 10
Q: The logic circuit for the octal – to – binary encoder
A: Decimal – to – BCD Encoder
Q: How many input lines should a decimal to BCD priority encoder have?
A: ten
Q: The priority encoder performs the same logic function as that of encoder with
the additional facility
A: priority
function
Q: How many input lines should a decimal to BCD priority encoder have?
A: ten
Q: What does the priority encoder do when two or more input lines are activated
simultaneously?
A: priority
function
Q: What does the priority encoder perform when two or more input lines are
activated simultaneously?
A: priority
function
Q: How many input lines should a BCD priority encoder have?
A: ten
Q: How many input lines should an encoder have?
A: ten
Q: How many input lines should a Decimal to BCD priority encoder have?
A: ten
Q: How many input lines should a decimal to BCD priority encoder have?
A: ten
Q: What does the priority encoder do when two or more inputs are activated
simultaneously?
A: priority
function
Q: What will provide the priority function to the encoder?
A: The additional logic circuitry
Q: The additional logic circuitry will provide the priority function to the encoder
as fo llow
A:
available corresponding to D 8 line.
Q: What is high when D 1 is high and D 2, D 4, D6, and D8 are
A: X 0
Q: What will provide the priority function to the encoder?
A: The additional logic circuitry
Q: The additional logic circuitry will provide the priority function to the
encoder.
A:
available corresponding to D 8 line.
Q: The additional logic circuitry will provide the priority function to the
encoder.
A:
available corresponding to D 8 line.
Q: The additional logic circuitry will provide the priority function to the
encoder.
A:
available corresponding to D 8 line.
Q: The additional logic circuitry will provide the priority function to the
encoder.
A:
available corresponding to D 8 line.
Q: The additional logic circuitry will provide the priority function to the
encoder.
A:
available corresponding to D 8 line.
Q: What does the additional logic circuitry provide to the encoder?
A: the priority
function
Q: What is high when D 4 or D 5 or D6 or D 7 is high?
A: X2
Q: The expression for X 1 is of the form: 98798698543985
A:
Q: What is high when D4 or D 5 or D6 or D 7 is high?
A: X2
Q: What is the expression for X 1 of the form?
A:
9879869854398542 1
Q: What is high when D 8 or D 9 is high?
A: X3
Q: The expression for X 1 is of the form: 9879869859841
A:
9879869854398542
Q: What is high when D 4 or D 5 is high?
A: X2
Q: What is the expression for X 1 of the form?
A:
9879869854398542 1
Q: What is high when D 8 or D 9 is high?
A: X3
Q: What is high when D 8 or D 9 is high?
A: X3
Q: What is the logic circuit diagram for the Decimal – to – BC D priority encode
A: active high outputs
Q: The logic circuit diagram for the Decimal – to – BC D priority encoder is
A:
figure 6.31 with active high outputs
Q: Where is the logic circuit diagram for the Decimal – to – BC D priority encode
A:
figure 6.31
Q: The logic circuit diagram for the Decimal to BCD priority encoder is shown in
figure 6.
A:
Q: What is the block diagram of the octal to binary priority encoder IC
A:
figure 6.32
Q: The block diagram of the octal to binary priority encoder is shown in figure 6.
A:
table 6.13
Q: What is the name of the octal to binary priority encoder IC?
A: 74148
Q: What is the logic circuit diagram for the Decimal to BCD priority encoder?
A:
figure 6.31
Q: What is shown in figure 6.31 with active high outputs?
A: logic circuit diagram for the Decimal – to – BC D priority encoder
Q: What is the logic circuit diagram for the Decimal to BC D priority encoder?
A:
figure 6.31
Q: What is a hexadecimal to binary priority encoder designed by?
A: cascading octal to binary p riority encoders
Q: What type of circuits are designed by cascading octal to binary
A: hexadecimal to binary
encoder
Q: What is hexadecimal to binary priority encoder designed by?
A: cascading octal to binary p riority encoders
Q: What is hexadecimal to binary encoder designed by?
A: cascading octal to binary p riority encoders
Q: What is hexadecimal to binary encoder designed by cascading
A: Very useful circuits
Q: What is a hexadecimal to binary encoder designed by?
A: cascading octal to binary p riority encoders
Q: What is hexadecimal to binary encoder designed by?
A: cascading octal to binary p riority encoders
Q: What is a hexadecimal to binary priority encoder designed by casca
A: cascading octal to binary p riority encoders
Q: What is a hexadecimal to binary encoder designed by cascad
A: Very useful circuits
Q: What is a magnitude comparator also called?
A: magni tude
Q: What is the logic diagram for one bit comparator shown in Fig. 6.34?
A:
Q: The logic diagram for one bit comparator is shown in figure 6.34. Let P3P
A:
Q: What will be greater than Qs if P3 = 1 and P3 = 0
A: Ps
Q: What is the logic diagram for one bit comparator?
A: figure 6.34
Q: What is the logic diagram for a one bit comparator shown in figure 6.34?
A:
Q: What is the logic diagram for a one bit comparator shown in Fig. 6.34
A:
Q: What is the logic diagram for one bit comparator shown in?
A: figure 6.34
Q: What is the logic diagram for one bit comparator shown in figure 6.34?
A:
Q: What will be greater than Qs if P3 = 1 and P2 = 1 and
A: Ps
Q: What is the logic diagram for one bit comparator shown in figure 6.34?
A:
Q: What can be expressed in the form of e xpression for Ps > Qs
A: These statements
Q: What are the three expressions for Ps > Qs, Ps = Qs and
A:
Qs and Ps < Qs
Q: What is the output of the 4 – bit comp arator IC 7485?
A:
active high
Q: What can be expressed in the form of e xpression for Ps Q
A: Ps < Qs
Q: How many expressions are there for Ps > Qs, Ps = Qs and
A: three
Q: How many expressions for Ps > Qs, Ps = Qs and Ps
A: three
Q: How many expressions for Ps > Qs, Ps = Qs, and P
A: three
Q: What are the three expressions for Ps > Qs, Ps = Qs,
A:
Qs and Ps < Qs
Q: How many expressions are there for Ps > Qs, Ps = Qs,
A: three
Q: What are the expressions for Ps > Qs?
A: Ps =
Qs and Ps < Qs
Q: How many input and output terminals does this IC have?
A: 4
Q: How many inputs does this IC have?
A: 4
Q: How many inputs does the IC have?
A: 4
Q: How many input and output terminals does the IC have?
A: 4
Q: How many input terminals does this IC have?
A: 4
Q: How many input terminals does the IC have?
A: 4
Q: How many inputs and output terminals does this IC have?
A: 4
Q: How many input terminals does this IC have?
A: 4
Q: How many input terminals does the IC have?
A: 4
Q: How many inputs and output terminals does the IC have?
A: 4
Q: If the number of 1's in the given data is even then parity is called as
A: even parity
Q: What is the number of 1's in the given data called?
A: Parity
Q: What is the number of 1's in the given data called?
A: Parity
Q: What may occur due to change of data bit?
A: error
Q: If the number of 1's in the given data is even then the parity is called
A: even parity
Q: What is the number of 1's in the given data known as?
A: wo rd
Q: What is the number of 1’s in the given data called?
A: Parity
Q: What is the number of 1’s in the given data called?
A: Parity
Q: What is the number of 1's in a given data called?
A: wo rd
Q: What may occur due to change of data bit?
A: error
Q: The logic circuit for the parity checker is the same as that of the parity
generator
A:
parity
Q: What is output for odd parity of the input data?
A: 0
Q: What is the output of the parity bit generated by the parity generator?
A: 1 and for
odd parity of the input data, output is 0
Q: What is output for odd parity of input data?
A: 0
Q: The logic circuit for the parity checker is the same as that for the parity
generator
A:
parity
Q: What is output for odd parity of the input data?
A: 0
Q: What is the output of a parity bit generated by a parity generator?
A: 1 and for
odd parity of the input data, output is 0
Q: What is the output value for odd parity of the input data?
A: 0
Q: What is the output for odd parity of the input data?
A: 0
Q: What is the logic circuit for the parity checker?
A: the same as that of the parity generator
Q: What can be used to check for even or odd parity on a 9 – bit
A: IC 74180
Q: What can be used to check for even or odd parity on a 9 bit code?
A: IC 74180
Q: What is available in the form of IC?
A: Parity generator/checker
Q: What is available in the form of an IC?
A: Parity generator/checker
Q: What can be used to check for even or odd parity on a 9-bit code
A: This IC
Q: What is the name of the 8 bit parity generator/checker available in the form of
A: IC 74180
Q: What can be used to check for even or odd parity on a 9 - bit
A: This IC
Q: What can be used to check for odd or even parity on a 9 bit code?
A: IC 74180
Q: What is a parity generator/checker available in the form of?
A: IC
Q: What can be used to check for odd or even parity on a 9 – bit
A: IC 74180
Q: What are PLDs?
A: medium scale integrated circuits
Q: What are PLDs?
A: medium scale integrated circuits
Q: What are PLDs?
A: medium scale integrated circuits
Q: How many categories do PLDs fall into?
A: three
Q: How many categories do PLDs fall into?
A: three
Q: What are PLDs?
A: medium scale integrated circuits
Q: How many categories do PLDs fall into?
A: three
Q: What are PLDs?
A: medium scale integrated circuits
Q: What are PLDs?
A: medium scale integrated circuits
Q: What are PLDs?
A: medium scale integrated circuits
Q: What demonstrates the basic structure of Field Programmable Logic Array (FPLA)?
A: Figure 6.43
Q: What does FPLA stand for?
A: Field Programmable Logic array
Q: What shows the fusible connections to the input li nes?
A: The circ led cross marks
Q: What demonstrates the basic structure of Field Programmable Logic Array?
A: Figure 6.43
Q: What shows the fusible connections to the input li nes?
A: The circ led cross marks
Q: What demonstrates the basic structure of Field Programmable Logic Array?
A: Figure 6.43
Q: What does FPLA stand for?
A: Field Programmable Logic array
Q: What does FPLA stand for?
A: Field Programmable Logic array
Q: What illustrates the basic structure of Field Programmable Logic Array (FPLA)?
A: Figure 6.43
Q: What shows the fusible connections to the input li nes?
A: The circ led cross marks
Q: When FPLA is not programmed all true and complemented variables are connected to
the input
A:
programmed all outputs of the device will be zero
Q: When FPLA is not programmed all the true and complemented variables are
connected to the
A:
programmed all outputs of the device will be zero
Q: When FPLA is not programmed, all true and complemented variables are connected
to the
A:
programmed all outputs of the device will be zero
Q: When FPLA is not programmed, all the true and complemented variables are
connected to
A:
programmed all outputs of the device will be zero
Q: Where are true and complemented variables connected to the inputs of AND and OR
gates?
A: when i t is not programmed
Q: What indicates that connections are fu sible or programmable?
A: rks to the input lines of AND
and OR gates
Q: What indicates that these connections are fu sible or programmable?
A: rks to the input lines of AND
and OR gates
Q: When FPLA is not programmed all true and complemented variables are connected to
inputs
A:
programmed all outputs of the device will be zero
Q: What indicates that the connections are fu sible or programmable?
A: rks to the input lines of AND
and OR gates
Q: When FPLA is not programmed all the true and complemented variables are
connected to input
A:
programmed all outputs of the device will be zero
Q: The logic circuit for 8421 code to c yclic code has been implemented
A: n-
terms
Q: How many input variables does one FPLA have?
A: 4
Q: How many input variables does FPLA have?
A: 4
Q: How many input variables does one FPLA have?
A: 4
Q: How many input variables does FPLA have?
A: 4
Q: How many input variables does the FPLA have?
A: 4
Q: How many input variables does one FPLA have?
A: 4
Q: How many input variables does an FPLA have?
A: 4
Q: The logic circuit for 8421 code to c yclic code converter has been
A: n-
terms
Q: How many input variables does a FPLA have?
A: 4
Q: What are the terms of a, b, c and d va r
A: 15 independent min-terms
Q: How are the expressions of a, b, c and d va
A: using FPLA
Q: What is another class of Programmable logic devices?
A: Programmable Array Logic
Q: What is another class of Programmable logic devices?
A: Programmable Array Logic
Q: How are these expressions realized?
A: using FPLA
Q: How are these expressions realized?
A: using FPLA
Q: How are the expressions of a, b, c, and d va
A: using FPLA
Q: How are these expressions realized?
A: using FPLA
Q: What is another class of Programmable logic devices?
A: Programmable Array Logic
Q: What is another class of Programmable logic devices?
A: Programmable Array Logic
Q: What is the most generic structure for the implementation of arbitrary logic
functions?
A: PAL
Q: How many AND gates does a PAL device have?
A: 16
Q: How many AND gates does a PAL have?
A: 16
Q: What is the most generic structure for the implementation of arbitrary logic
functions?
A: PAL
Q: How many AND gates does the PAL device have?
A: 16
Q: How many AND gates are in a PAL device?
A: 16
Q: How many AND gates are in a PAL?
A: 16
Q: What structure is the most generic for the implementation of arbitrary logic
functions?
A: PAL
Q: What is the most generic structure for the implementation of arbitrary logic
functions?
A: PAL
Q: What is the most generic PAL structure for the implementation of arbitrary logic
functions?
A: PAL
Q: What class of PLDs is programmable read only memory (PROM)?
A: AND array is not programmable
Q: What is another class of PLDs?
A: Programmable Read Only Memory
Q: What is another class of PLDs?
A: Programmable Read Only Memory
Q: What is another class of PLDs?
A: Programmable Read Only Memory
Q: What is another class of PLDs?
A: Programmable Read Only Memory
Q: What is another class of PLDs?
A: Programmable Read Only Memory
Q: What class of PLDs is programmable read only memory?
A: PROM
Q: What is another class of PLDs?
A: Programmable Read Only Memory
Q: What is another class of PLDs?
A: Programmable Read Only Memory
Q: What is another class of PLDs?
A: Programmable Read Only Memory
Q: What are circled cross marks removed or fused for?
A: unused product terms
Q: What are circled cross marks removed for?
A: unused product terms
Q: How are circled cross marks removed or fused for the unused product terms?
A:
removed or fused
Q: How are circled cross marks removed or fused?
A: for the unused product terms
Q: How are circled cross marks removed or fused?
A: for the unused product terms
Q: How are circled cross marks removed or fused for the unused product terms?
A:
removed or fused
Q: How are circled cross marks removed or fused for unused product terms?
A:
removed or fused
Q: How are circled cross marks removed or fused for unused product terms?
A:
removed or fused
Q: How are circled cross marks removed for the unused product terms?
A: fused
Q: How are circled cross marks removed or fused for unused product terms?
A:
removed or fused
Q: How can two 8:1MUXs be cascaded to use it a 16
A:
Q: What is a demultiplexer?
A: Draw the logic circuit of 1: 4
Q: How many MUXs can be cascaded to use it a 16:1
A: two
Q: What is a decoder?
A: 3 to 8 line decoder
Q: How can two 8:1MUXs be used to use it a 16:1
A:
Q: What is a Demultiplexer?
A: Draw the logic circuit of 1: 4 demultiplexer
Q: What is a Demultiplexer?
A: Draw the logic circuit of 1: 4 demultiplexer
Q: What is a demultiplexer?
A: Draw the logic circuit of 1: 4
Q: How can two 8:1MUXs be cascaded?
A:
4
Q: What is a decoder?
A: 3 to 8 line decoder
Q: What is a code converter?
A: 8421 to 2421 co de converter
Q: How can two 3 to 8 line decoder be used as a 4 to 1 6
A: 10
Q: What is a code converter?
A: 8421 to 2421 co de converter
Q: How can two 3 to 8 line decoders be used as a 4 to 1
A:
Q: What is a code converter?
A: 8421 to 2421 co de converter
Q: What is a code converter?
A: 8421 to 2421 co de converter
Q: What is BCD to decimal decoder?
A: Draw its logic diag ram
Q: What is a code converter?
A: 8421 to 2421 co de converter
Q: What is an encoder?
A: Draw the logic diagram of octal to binary encoder
Q: What is a code converter?
A: 8421 to 2421 co de converter
Q: What are programmable logic devices?
A: PLDs
Q: What are programmable logic devices?
A: PLDs
Q: What is Programmable Logic Array?
A: FPLA
Q: What is the difference between FPLA and PAL devices?
A: Programmable array logic
Q: What is Programmable Logic Array (FPLA)?
A: PLDs
Q: How many variables are used as a 8 –bit comparator?
A: four
Q: What is the difference between FPLA and PAL devices?
A: Programmable array logic
Q: How many variables are used as a 8 –bit comparator?
A: four
Q: What are programmable logic devices?
A: PLDs
Q: What are programmable logic devices?
A: PLDs
Q: How does a FPLA differ from those of PROM and PAL?
A:
26
Q: How does a FPLA differ from PROM and PAL?
A:
26
Q: How does a FPLA differ from those of PROM and PAL?
A:
26
Q: What does a FPLA differ from?
A: PROM and PAL
Q: What is a FPLA different from?
A: PROM and PAL
Q: What is a FPLA different from?
A: PROM and PAL
Q: How does a FPLA differ from PROM and PAL?
A:
26
Q: How does a FPLA differ from PROM and PAL?
A:
26
Q: How does a FPLA differ from PROM and PAL?
A:
26
Q: How does a FPLA differ from PROM and PAL?
A:
26
Q: When logic 1 is assumed to higher voltage and logic 0 is assumed to lower
voltage, what
A: negative logic
Q: When logic 0 is assumed to lower voltage, what is it referred to as?
A: negative logic
Q: When logic 1 is assumed to higher voltage and logic 0 is assumed to lower
voltage, it
A: negative logic
Q: When logic 0 is assumed to lower voltage, it is referred to as what?
A: negative logic
Q: When logic 0 is assumed to higher voltage, what is it referred to as?
A: negative logic
Q: When logic 1 is assumed to higher voltage and logic 0 is assumed to lower
voltage then it
A: negative logic
Q: When logic 1 is assumed to higher voltage and logic 0 is assumed to lower
voltage what is
A: negative logic
Q: How many inputs are at logic 0?
A: two
Q: What is the positive logic?
A: logic 1 is assumed to higher voltage
Q: What is a positive logic?
A: logic 1 is assumed to higher voltage
Q: What is assumed to be logic o?
A: 0.7
volt
Q: What is assumed to be logic o?
A: 0.7
volt
Q: What is assumed to be logic o?
A: 0.7
volt
Q: How many volts is assumed to be logic o?
A: 0.7
volt
Q: What is assumed to be logic o?
A: 0.7
volt
Q: What is assumed to be logic o?
A: 0.7
volt
Q: What is assumed to be logic o?
A: 0.7
volt
Q: How many volts is assumed to be logic o?
A: 0.7
volt
Q: What is assumed to be logic o?
A: 0.7
volt
Q: What is assumed to be logic o?
A: 0.7
volt
Q: When both the inputs A and B of the OR gate are connected to ground, the output
A: zero
Q: What is the total voltage across the load resistance R L?
A: 4.3 volts
Q: What is the total voltage across the load resistance R L?
A: 4.3 volts
Q: Where are the two inputs A and B of the OR gate connected to ground?
A: logic 0
Q: Where are the two inputs A and B of the OR gate connected to ground?
A: logic 0
Q: When both the inputs are at logic 0 and the output is zero, the output will
A:
Q: When both the inputs A and B of the OR gate are connected to ground, output will
A: zero
Q: Where are the two inputs A and B of the OR gate connected to ground?
A: logic 0
Q: When both inputs are at logic 0 what will the output be?
A: zero
Q: When both inputs are at logic 0 what will the output be?
A: zero
Q: When the input A is at logic 0, the emitter base j unction of the transistor
A: reverse bias
Q: When the input is at logic 0, the emitter base j unction of the transistor will
A: Inverter) gate
Q: What shows the circuit diagram of an inve rter (NOT) gate?
A: Figure 7.3
Q: What is the circuit diagram of an inve rter (NOT) gate?
A: Figure 7.3
Q: What does NOT (Inverter) gate consist of?
A: a transistor in common e mitter configuration
Q: When the input is at logic 0, the emitter base j unction of the transistor is
A: Inverter) gate
Q: What is a NOT (Inverter) gate?
A: unary gate
Q: What is an inve rter (NOT) gate?
A: unary gate
Q: What is an inve rter (NOT) gate?
A: unary gate
Q: What is an inve rter (NOT) gate?
A: unary gate
Q: How many gates per IC are fabricated in SSI?
A: Twelve
Q: How many logic gates per IC are fabricated in SSI?
A: Twelve
Q: How many gates per IC are fabricated in SSI?
A: Twelve
Q: How many gates per IC are fabricated in SSI and total number of components per
A: Twelve
Q: How many gates per IC are fabricated in SSI and the total number of components
A: Twelve
Q: How many gates are per IC fabricated in SSI?
A: Twelve
Q: How many gates per IC are fabricated in SSI?
A: Twelve
Q: How many logic gates per IC are fabricated in SSI?
A: Twelve
Q: How many gates per IC are fabricated in SSI?
A: Twelve
Q: How many gates per IC are fabricated in SSI?
A: Twelve
Q: What does MSI stand for?
A: Large Scale Integrated Circuits
Q: What is the MSI?
A: These ICs contain 12 to 100 gates per IC
Q: What is the MSI?
A: These ICs contain 12 to 100 gates per IC
Q: What does MSI stand for?
A: Large Scale Integrated Circuits
Q: What does MSI stand for?
A: Large Scale Integrated Circuits
Q: What does MSI stand for?
A: Large Scale Integrated Circuits
Q: What type of logic families are mainly of two types?
A: bipolar
Q: What does MSI stand for?
A: Large Scale Integrated Circuits
Q: What is the MSI?
A: These ICs contain 12 to 100 gates per IC
Q: What are the logic families classified into?
A: two categor ies
Q: What is the maximum number of inputs that can be applie d to a logic
A: Fan – in. Thus a three
Q: What is the maximum number of inputs that can be applied to a logic gate
A: Fan – in. Thus a three
Q: What are the non-saturated logic families?
A: Schottky Transistor – Transistor Logic (STTL)
Q: What is the name of the maximum number of inputs that can be applie d to
A: Fan – in
Q: What are the non-saturated logic families?
A: Schottky Transistor – Transistor Logic (STTL)
Q: What is the name of the maximum number of inputs that can be applied to
A: Fan – in
Q: What are the non-saturated logic circuits classified into?
A:
Q: What are the non-saturated logic circuits classified into?
A:
Q: What are the non-saturated logic circuits classified into?
A:
Q: What are the non-saturated logic circuits classified into?
A:
Q: What is the number of gates that can be driven by a logic gate?
A: The fan –out
Q: What is defined as the time interval between the application of the inputs to a
gate and
A: Propagation Delay Time
Q: What is the number of gates that can be driven by a logic gate?
A: The fan –out
Q: What is the number of gates that can be driven by logic gate?
A: The fan –out
Q: How many gates can be driven by a logic gate?
A: 10
Q: What is the number of gates that can be driven by logic gates?
A: The fan –out
Q: What is the fan-out of a logic gate defined as?
A: the number of gates
Q: How many gates can be driven by a logic gate?
A: 10
Q: What is the number of gates that can be driven by a logic gate?
A: The fan –out
Q: What is the fan-out of a typical gate?
A: 10
Q: What is defined as the amount of power that can be dissipated in an
A: Power Dissipation
Q: What is the normal working power per gate required from few micro-watts to few
milli
A: Power Dissipation
Q: What defines the amount of power that can be dissipated in an IC?
A: Power Dissipation
Q: What is the product of speed and power dissipation per gate known as?
A: the figure of merit of
the logic family
Q: What is the standard working power per gate required from few micro-watts to few
milli
A: Power Dissipation
Q: What is the normal working power per gate required?
A: few micro-watts to few milli-watts
Q: What is defined as the amount of power that can be dissipated in a
A: Power Dissipation
Q: What is the standard working power per gate?
A: few micro-watts to few milli-watts
Q: What is the normal working power per gate?
A: few micro-watts to few milli-watts
Q: What is the normal working power per gate required?
A: few micro-watts to few milli-watts
Q: What is the minimum high voltage for logic 1?
A: V OH (min)
Q: What is noise sometimes generated in the connecting leads of the logic circuits?
A: Noise Margin
Q: What is noise sometimes gener ated in the connecting leads of the logic
circuits?
A: Noise Margin
Q: What is noise sometimes generated in the connecting leads of logic circuits?
A: Noise Margin
Q: What is noise sometimes gener ated in the connecting leads of the logic circuits
due to the
A: Noise Margin
Q: What is noise sometimes gener ated in the connecting leads of logic circuits?
A: Noise Margin
Q: What are sometimes gener ated in the connecting leads of the logic circuits?
A: Spurious signals called noise
Q: What are sometimes generated in the connecting leads of the logic circuits?
A: Spurious signals called noise
Q: What are sometimes generated in the connecting leads of logic circuits?
A: Spurious signals called noise
Q: What is noise sometimes gener ated in the connecting leads of the logic circuits
due to?
A: the s tray electric and magnetic fields in the
surroundings
Q: What is the most common family of logic circuits?
A: resistor–transistor logic
Q: What is the most common family of logic circuits?
A: resistor–transistor logic
Q: What is the most common family of logic circuits?
A: resistor–transistor logic
Q: What is the most common family of logic circuits?
A: resistor–transistor logic
Q: What is the most common family of logic circuits?
A: resistor–transistor logic
Q: The resistor-transistor logic is the most common family of logic circuits.
A:
resistor transistor logic
Q: What is the most common family of logic circuits?
A: resistor–transistor logic
Q: The most common family of logic circuits consists of res istors and transistors
A: The resistor–transistor logic
Q: What is RTL?
A: Resistor – Transistor Logic
Q: What is the most common family of logic circuits?
A: resistor–transistor logic
Q: Direct Coupled Transistor Logic (DCTL) is similar to RTL, but
A: omitting the base resistances in RTL
Q: Direct Coupled Transistor Logic (DCTL) is similar to RTL in that
A: Fig. 7.6
7.6
Q: What is the advantage of RTL?
A: power dissipation per gate is lo w
Q: Direct Coupled Transistor Logic is similar to RTL in that it omit
A: base resistances
Q: What is a direct coupled transistor logic circuit similar to?
A: RTL
Q: Who performs the operation of the NOR gate?
A: both the transistors
Q: Who performs the operation of the NOR gate?
A: both the transistors
Q: What is a direct coupled transistor logic circuit similar to?
A: RTL
Q: Direct Coupled Transistor Logic (DCTL) is similar to RTL but has
A: Fig. 7.6
7.6
Q: Who performs the operation of the NOR gate?
A: both the transistors
Q: What is the simplest logic family?
A: Integrated Injection Logic
Q: What family of bipolar transistors is the simplest logic family?
A: Integrated Injection Logic
Q: What is the simplest logic family of bipolar transistors?
A: Integrated Injection Logic
Q: What is the simplest logic family?
A: Integrated Injection Logic
Q: What family of bipolar transistors is the simplest logic family?
A: Integrated Injection Logic
Q: What is the simplest logic family?
A: Integrated Injection Logic
Q: What is the simplest logic family?
A: Integrated Injection Logic
Q: What is the simplest logic family of bipolar transistors?
A: Integrated Injection Logic
Q: What family of bipolar transistors is the simplest logic family?
A: Integrated Injection Logic
Q: What is the simplest logic family?
A: Integrated Injection Logic
Q: What was the next family after RTL?
A: diode
transistor logic
Q: What is the next family after RTL?
A: diode
transistor logic
Q: What is the next family of diode transistor logic?
A: Diode – Transistor Logic
Q: What was the next family of diode transistor logic?
A: Diode – Transistor Logic
Q: What was the next family after RTL?
A: diode
transistor logic
Q: What is the next family after RTL?
A: diode
transistor logic
Q: What is the name of the next family after RTL?
A: diode
transistor logic
Q: What was the next family after RTL?
A: diode
transistor logic
Q: What is the name of the next family after RTL?
A: diode
transistor logic
Q: What is another name for diode transistor logic?
A: diode transi stor logic
Q: The diode D 3 ensures that the transistor T1 is in cutoff, giving
A:
diode
Q: When both the inputs are connected to logic 1, both the diodes D 1 and D
A:
which the transistor T 1 goes into saturation
Q: When both the inputs are connected to logic 1, the diodes D 1 and D 2
A:
which the transistor T 1 goes into saturation
Q: When the inputs are connected to logic 1, the diodes D 1 and D 2 will
A:
which the transistor T 1 goes into saturation
Q: The diode D 3 ensures that the transistor T1 is in cutoff. What
A: output voltage will, theref ore, be high
Q: The diode D 3 ensures that the transistor T1 is in cutoff due to
A:
voltage
Q: What ensures that the transistor T1 is in cutoff?
A: The diode D 3
Q: The diode D 3 ensures that the transistor T1 is in cutoff. The
A:
diode
Q: The diode D 3 ensures that the transistor T1 is in cutoff. Which
A:
diode
Q: The diode D 3 ensures that the transistor T1 is in cutoff. This
A:
diode
Q: What is a modification of a DTL gate?
A: high threshold logic gate
Q: What is a modified of a DTL gate?
A: high threshold logic gate
Q: What is a high threshold logic gate a modification of?
A: DTL gate
Q: What is a modification of a DTL gate?
A: high threshold logic gate
Q: What is a modification of a DTL gate?
A: high threshold logic gate
Q: A high threshold logic gate is a modification of a DTL gate.
A:
Q: What type of logic is a modification of a DTL gate?
A: high threshold
Q: What is a modification of a DTL gate?
A: high threshold logic gate
Q: How long is the propagation delay of a high threshold logic gate?
A: 50 nsec
Q: What is a modification of a DTL gate?
A: high threshold logic gate
Q: What is the most popular amongst all logic families?
A: The TTL
Q: What is the most popular amongst all logic families and is widely used IC t
A: The TTL
Q: What is the most popular amongst all logic families?
A: The TTL
Q: What is the most popular amongst all logic families and is widely used?
A: The TTL
Q: What is the most popular among all logic families?
A: The TTL
Q: What is the most popular amongst all logic families and widely used IC te
A: The TTL
Q: The TTL is the most popular amongst all logic families and is widely used IC
A:
7.10 Transistor – Transistor Logic
Q: What is the most popular amongst logic families?
A: The TTL
Q: What is the most popular amongst all logic families?
A: The TTL
Q: What is the most popular amongst all logic families?
A: The TTL
Q: Where is the emitter base junction of the multi-emitter transistor in forward
bias?
A: logic 0
Q: When both the inputs are at logic 0, the emitter base junction of the multi-e
A: forward bias
Q: When both inputs are at logic 0, the emitter base junction of the multi-emit
A: forward bias
Q: When the inputs are at logic 0, the emitter base junction of the multi-emit
A: forward bias
Q: When two inputs are at logic 0, the emitter base junction of the multi-emit
A: forward bias
Q: When both inputs are at logic 0, emitter base junction of the multi-emitter
A: forward bias
Q: When both the inputs are at logic 0, emitter base junction of the multi-emit
A: forward bias
Q: When two inputs A are at logic 0, the emitter base junction of the multi-e
A: forward bias
Q: Where is the emitter base junction of the multi-emitter transistor in forward
bias and
A: When either of two inputs A or both the inputs are at logic 0
Q: What will the emitter base junction of the multi-emitter transistor be when both
input
A: forward bias
Q: What is the output resistance of the basic TTL circuit?
A: low
Q: What is the output resistance of the basic TTL circuit (fi g. 7.11
A: low
Q: What is the output resistance of the basic TTL circuit?
A: low
Q: The output resistance of the basic TTL circuit is low when the transistor T 2
satura
A:
Q: What is the output resistance of the basic TTL circuit?
A: low
Q: What is the output resistance of the basic TTL circuit?
A: low
Q: The output resistance of the basic TTL circuit is low when the transistor T2
satura
A:
Q: What is the output resistance of the basic TTL circuit?
A: low
Q: What is the output resistance of the basic TTL circuit?
A: low
Q: What is the output resistance of the basic TTL circuit?
A: low
Q: What is the standard form of a TTL circuit with input NAND gate?
A: TTL NAND Gate with Totem-pole Output
Q: What is the standard form of a TTL circuit with input NAND gate?
A: TTL NAND Gate with Totem-pole Output
Q: What is a standard form of a TTL circuit with input NAND gate?
A: TTL NAND Gate with Totem-pole Output
Q: What is the standard form of a TTL circuit with input NAND gate with totem
A: Figure 7.12
Q: What is the standard form of a TTL circuit with input NAND gate?
A: TTL NAND Gate with Totem-pole Output
Q: What is the standard form of a TTL circuit with input NAND gate?
A: TTL NAND Gate with Totem-pole Output
Q: When the inputs or both the inputs are low, the transistor T 2 goes into cut
A: cutoff
Q: When the inputs or both the inputs are low, the transistor T2 goes into cut
A: cutoff
Q: What is the standard form of a TTL circuit with input NAND gate?
A: TTL NAND Gate with Totem-pole Output
Q: When the inputs or both inputs are low, the transistor T 2 goes into cutoff
A:
Q: What prevents the transistor T 3 from being conducting when the transistor T4
saturates
A: The diode D
Q: What prevents the transistor T3 from being conducting when the transistor T4
saturates
A: The diode D
Q: What prevents the transistor T 3 from being conducting when T4 saturates?
A: The diode D
Q: The diode D prevents the transistor T 3 from being conducting when the
transistor T4
A: 0.7 V
Q: What prevents the transistor T 3 from being conducting when the transistor T4
saturates
A: The diode D
Q: What prevents the transistor T 3 from being conducting when the transistor T4
saturate
A: The diode D
Q: What prevents the transistor T3 from being conducting when T4 saturates?
A: The diode D
Q: When the transistor T4 saturates, the output voltage will be equal to V CE
A:
to V CE,Sat
Q: What prevents the transistor from being conducting when the transistor T4
saturates?
A: diode D
Q: The diode D prevents the transistor T3 from being conducting when the transistor
T4
A: 0.7 V
Q: When negative spikes appear at input terminals, the diodes conducts and the
spike
A: spikes are gr ounded
Q: What is the propagation delay of a TTL gate?
A: 15 nsec
Q: When negative spikes appear at input terminals, the diodes conduct and the
spikes
A: gr ounded
Q: What is the pro pagation delay of a TTL gate?
A: 15 nsec
Q: What is the propagation delay of TTL gates?
A: 15 nsec
Q: What is the pro pagation delay of TTL gates?
A: 15 nsec
Q: What is the propagation delay of a TTL gate?
A: 15 nsec
Q: What is the propagation delay of the TTL gates?
A: 15 nsec
Q: What is the propagation delay of the TTL gate?
A: 15 nsec
Q: What is the propagation delay of TTL gates?
A: 15 nsec
Q: When input A is low and input B is high, the transistor T 3 is in
A: cutoff
Q: When the inputs are low, the emitter base jun ctions of the input
A: cutoff
Q: When both inputs are low, the emitter base jun ctions of the input
A: cutoff
Q: When the inputs are low, the emitter base junctions of the input transistor
A: cutoff
Q: When both inputs are low, the emitter base junctions of the input transistor
A: cutoff
Q: When both the inputs are low, the emitter base jun ctions of the
A: cutoff
Q: When input A is low, the transistor T 3 is in cutoff and transistor T
A: forward bias
Q: When both the inputs are low, the emitter base junctions of the input
A: cutoff
Q: When the inputs are high, the emitter base jun ctions of the input
A: cutoff
Q: When input A is low and input B is high, the transistor T3 is in
A: cutoff
Q: What is obtained by inserting an extra inversi on circuit before the totem
output of
A: AND
operation
Q: What is the TTL OR gate obtained by inserting a com mon emitter circuit
A: TTL NOR gate
Q: What is obtained by inserting an extra inversion circuit before the totem output
of
A: TTL OR Gate : The TTL OR gate
Q: What is obtained by inserting a com mon emitter circuit before the totem output
A: TTL OR gate
Q: What is obtained by inserting an extra inversion on circuit before the totem
output
A: AND
operation
Q: What is obtained by inserting a com mon emitter circuit before the totem pole
A: TTL OR gate
Q: What is obtained by inserting an extra invertion on circuit before the totem
output
A: AND
operation
Q: How is the TTL OR gate obtained?
A: by inserting a com mon emitter
circuit
Q: What type of gate is obtained by inserting an extra inversi on circuit before
the to
A: TTL OR gate
Q: What is the output of the TTL NAND gate?
A: AN D gate
Q: What can be wired together and connected to a common pull-up resistor?
A: t heir outputs
Q: How many input TTL NAND gates are shown in Figure 7.17 (a)?
A: two
Q: What is the advantage of open collector gates?
A: eliminating the need of an
AND gate
Q: What is the advantage of the open collector gates?
A: eliminating the need of an
AND gate
Q: What is the advantage of the open collector gates?
A: eliminating the need of an
AND gate
Q: What is the advantage of open collector gates?
A: eliminating the need of an
AND gate
Q: What can be wired together and connected to a common pull-up resistor in the
A: t heir outputs
Q: What is the advantage of the open collector gates?
A: eliminating the need of an
AND gate
Q: What is the advantage of the open collector gates?
A: eliminating the need of an
AND gate
Q: What can be wired together and connected to a common pull-up resistor in open
A: t heir outputs
Q: When any or all transistors are in saturation, the output voltage is pulled down
to a
A: low value
Q: How many NAND gates are connected together to a pull-up resistor?
A: three
Q: How many NAND gates are connected together to a pull-up resistor R?
A: three
Q: How many NAND gates are connected together to a pull-up resistor?
A: three
Q: How many NAND gates are connected to a pull-up resistor?
A: three
Q: How many NAND gates are connected together to a pull-up resistor?
A: three
Q: How many NAND gates are connected to a pull-up resistor R?
A: three
Q: How many NAND gates are connected to a pull-up resistor?
A: three
Q: What operation is used to get the ANDing operation by wiring the outputs of open
A: wi re –AND
Q: How many NAND gates are connected to a pull-up resistor?
A: three
Q: What is needed for ANDing the outputs of TTL devices?
A: a separate AND gate
Q: What is needed for ANDing the outputs of TTL devic es?
A: a separate AND gate
Q: What type of gate is needed for ANDing the outputs of TTL devices
A: a separate AND gate
Q: What gate is needed for ANDing the outputs of TTL devices?
A: a separate AND gate
Q: What is the main disadvantage of open-collector gates?
A: slow speed
Q: What is needed to AND the outputs of TTL devices?
A: a separate AND gate
Q: What is the main disadvantage of open-collector gates?
A: slow speed
Q: What gate is needed for ANDing the outputs of TTL devic es?
A: a separate AND gate
Q: What type of gate is needed for ANDing the outputs of TTL devic e
A: a separate AND gate
Q: What is the main disadvantage of open-collector gates?
A: slow speed
Q: When the ENABLE E terminal is high, the diode D 1 remains in reverse bias
A: logic 1), the diode D 1 remains in reverse bias
Q: When ENABLE E terminal is high, the diode D 1 remains in reverse bias so
A: it has no effect on the working of transistors T 3 and T 4
Q: When ENABLE E terminal is high (logic 1), the diode D 1 remains in
A: reverse bias
Q: When the ENABLE E terminal is high (logic 1), the diode D 1 remains
A: reverse bias
Q: When ENABLE E terminal is high, the diode D 1 remains in reverse bias.
A: logic 1
Q: When the ENABLE E terminal is high, the diode D 1 stays in reverse bias
A: logic 1), the diode D 1 remains in reverse bias
Q: When ENABLE E terminal is high (logic 1), diode D 1 remains in reverse
A: bias
Q: When ENABLE E terminal is high, the diode D 1 remains in reverse bias and
A: logic 1
Q: When ENABLE E terminal is high, diode D 1 remains in reverse bias so it
A: it has no effect on the working of transistors T 3 and T 4
Q: When ENABLE E terminal is high, the diode D 1 stays in reverse bias so
A: it has no effect on the working of transistors T 3 and T 4
Q: What is the typical propagation delay for high speed gate?
A: 6 nsec
Q: The circuit of TTL NAND gate has been reproduced in figure 7.20 with three
values
A: values of each resistor R 1, R 2, R 3 and R 4
Q: What is the typical propagation delay for a high speed gate?
A: 6 nsec
Q: What is the typical propagation delay for high speed gates?
A: 6 nsec
Q: How many values of each resistor are in the circuit of TTL NAND gate?
A: three
Q: High Speed TTL circuits Medium Speed TTL Circuits Slow Speed TTL Circuits The
A: slow
speed TTL gates
Q: The circuit of TTL NAND gate has three values of each resistor for the three
families
A: Slow Speed TTL Circuits
Q: What is the typical propagation delay for high speed gate?
A: 6 nsec
Q: High Speed TTL circuits Medium Speed TTL circuits Slow Speed TTL circuits The
A: slow
speed TTL gates
Q: High Speed TTL circuits Medium Speed TTL circuits Slow Speed TTL Circuits The
A: slow
speed TTL gates
Q: What is the typical propagation delay for slow speed gate?
A: 33 nsec
Q: What is the typical propagation delay for slow speed gate?
A: 33 nsec
Q: What is the typical propagation delay for slow speed gate?
A: 33 nsec
Q: In Schottky TTL circuits, the operation speed is much larger than high speed
A: Schottky Transistor – Transistor Logic
Q: What is the typical propagation delay for slow speed gate?
A: 33 nsec
Q: What is the typical propagation delay for slow speed gate?
A: 33 nsec
Q: What is the typical propagation delay for slow speed gate?
A: 33 nsec
Q: What is the typical propagation delay for a slow speed gate?
A: 33 nsec
Q: How long is the typical propagation delay for slow speed gate?
A: 33 nsec
Q: What is the typical propagation delay for slow speed gate?
A: 33 nsec
Q: What type of circuits fall into the category of non-saturated digital logic f
A: Emitter Coupled Logic (ECL)
Q: What type of circuits fall in the category of non-saturated digital logic f
A: Emitter Coupled Logic (ECL)
Q: What type of logic circuits fall into the category of non-saturated digital
logic
A: Emitter Coupled Logic
Q: What is a non-saturated digital logic fami ly?
A: Emitter Coupled Logic
Q: What is the power dissi pation of the Schottky TTL family?
A: 1/5 of the 54/74 series
Q: What does ECL stand for?
A: Emitter Coupled Logic
Q: What is a non-saturated digital logic family?
A: Emitter Coupled Logic (ECL)
Q: What is a non-saturated digital logic family?
A: Emitter Coupled Logic (ECL)
Q: What is the power dissi pation of the Schottky TTL series?
A: 1/5 of the 54/74 series
Q: What is the power dissi pation of the 54/74S series?
A: 1/5
Q: When all inputs are low, the tra nsistors T 1 through T
A: 1.75 V
Q: What is the basic circuit of four-in put ECL OR/NOR gate?
A: The
outputs
Q: When all inputs are at low, the tra nsistors T 1 through
A: 1.75 V
Q: When all the inputs are low, the tra nsistors T 1 through
A: 1.75 V
Q: When all the inputs are at low, the tra nsistors T 1
A: 1.75 V
Q: When all inputs are at low, emitter base junctions are reverse biased.
A: 1.75 V
Q: When all inputs are low, emitter base junctions are reverse biased.
A: 1.75 V
Q: What is the basic circuit of four-in put ECL OR/NOR gate?
A: The
outputs
Q: When all inputs are low, the tra nsistors are off because emit
A: reverse biased
Q: What is the basic circuit of four-in put ECL OR/NOR gate?
A: The
outputs
Q: What is the differential voltage between base and emitter of the transistors T 1
through T 4
A: –0.34 V
Q: The differential voltage between base and emitter of the transistors T 1 through
T 4 is about
A: –0.34 V
Q: What is the differential voltage between base and emitter of transistors T 1
through T 4?
A: –0.34 V
Q: What is the differential voltage between base and emitter of the transistors T1
through T4
A: –0.34 V
Q: Where is the differential voltage between base and emitter of the transistors T
1 through T 4
A: –0.34 V
Q: What is the difference between base and emitter of the transistors T 1 through T
4?
A: –0.34 V
Q: What is the differential voltage between base and emitter of the transistors T 1
through T4
A: –0.34 V
Q: The differential voltage between base and emitter of transistors T 1 through T 4
is about
A: –0.34 V
Q: What is the differential voltage between base and emitter of the transistors T1
through T 4
A: –0.34 V
Q: Why is the base of tra nsistor T 5 held constant at –
A: due to the bias network
Q: Which logic family is the simplest to fabricate and occupies le ss space?
A: MOS
Q: The logic families discussed so far were based on what?
A: bipolar
transistor
Q: The logic families discussed so far were based on bipolar transistors.
A:
7.13 MOS Logic
Q: What does NMOS stand for?
A: enh ancement type N channel
Q: What are the logic families discussed so far based on?
A: bipolar
transistor
Q: Which logic family is the simplest to fabricate?
A: MOS
Q: What does NMOS stand for?
A: enh ancement type N channel
Q: Which logic family is the simplest to fabricate?
A: MOS
Q: What type of transistor were the logic families discussed so far based on?
A: bipolar
transistor
Q: What type of transistor were the logic families discussed so far based on?
A: bipolar
transistor
Q: What does NMOS conduct when gate is at a positive potential with respect to
source?
A:
Q: What conducts when gate is at a positive potential with respect to source?
A: NMOS
Q: What does the NMOS conduct when gate is at a positive potential with respect to
source
A:
conducts
Q: The NMOS conducts when gate is at a positive potential with respect to source
and
A:
Q: What does NMOS conduct when the gate is at a positive potential with respect to
source
A:
conducts
Q: Which MOS FET conducts when gate is at a positive potential with respect to
source
A: NMOS
Q: What conducts when gate is at a positive potential?
A: NMOS
Q: What does NMOS conduct when gate is at a positive potential?
A:
conducts when gate is at a positive potential with respect to source
Q: What does the NMOS conduct when?
A: gate is at a positive potential
Q: What does the NMOS conduct when gate is at a positive potential?
A: source
Q: What shows the circuit diagram of NMOS positive logic three-input NOR gate?
A: Figure 7.25(a)
Q: What is the circuit diagram of NMOS positive logic three-input NOR gate?
A: Figure 7.25
Q: What is the circuit diagram for NMOS positive logic three-input NOR gate?
A: Figure 7.25
Q: What does the MOS FET T 1 act as in both the circuits?
A: a
resistor
Q: 7.13.2 MOS NOR gate : Figure 7.25(a) shows the circuit
A:
logic three-input NOR gate
Q: What shows the circuit diagram of NMOS positive logic three-input NOR gate and
A: Figure 7.25(a)
Q: What does MOS FET T 1 act as in both the circuits?
A: a
resistor
Q: What is the circuit diagram of NMOS positive logic three input NOR gate?
A: Figure 7.25
Q: What does the MOS FET T 1 act as in both the circuits?
A: a
resistor
Q: What is the circuit diagram of NMOS positive logic three-input NOR gate and
A:
7.13.2 MOS NOR gate
Q: The NMOS NAND gate works with positive logic and PMOS NAND gate work with
A: negativ e logic
Q: What logic does the NMOS NAND gate work with?
A:
positive
Q: What logic does NMOS NAND gate work with?
A:
positive
Q: The NMOS NAND gate works with positive logic and the PMOS NAND gate work
A:
Q: What does NMOS NAND gate work with?
A:
positive logic
Q: What type of logic does the NMOS NAND gate work with?
A:
positive
Q: What type of logic does NMOS NAND gate work with?
A:
positive
Q: What does the NMOS NAND gate work with?
A:
positive logic
Q: What type of logic does the NMOS NAND gate work with?
A:
positive
Q: What logic does the NMOS NAND gate work with?
A:
positive
Q: What can be operated on wide range of supply voltage between 3 V to 15 V
A: The CMOS gate
Q: CMOS gate can be operated on wide range of supply voltage between 3 V
A: 15 V
Q: What is the speed of the CMOS logic better than than TTL circuits?
A: The speed of the CMOS
logic is comparable
Q: What is the speed of the CMOS logic comparable with?
A: TTL circuits
Q: What is the speed of the CMOS logic comparable with that of TTL circuits?
A: The speed
Q: What is the speed of the CMOS logic comparable to?
A: TTL circuits
Q: What is the speed of CMOS logic better than than TTL circuits?
A: comparable
Q: What is the speed of the CMOS logic?
A: comparable with that of TTL circuits
Q: What is the speed of CMOS logic comparable with?
A: TTL circuits
Q: What is the speed of CMOS logic comparable with?
A: TTL circuits
Q: What is the circuit diagram of CMOS NAND gate shown in figure 7.28?
A:
7.14.2
Q: What is the output of the CMOS NAND gate?
A: low
logic 0
Q: How many PMOS transistors are connected in parallel with the sources connected
together?
A: two
Q: What are the two PMOS transistors connected in parallel with the sources
connected together?
A: T 1 and T 2
Q: What is the output of CMOS NAND gate?
A: low
logic 0
Q: The circuit diagram of CMOS NAND gate is shown in figure 7.28. What is
A:
Q: What is the circuit diagram of CMOS NAND gate?
A:
figure 7.28
Q: How many PMOS transistors are connected in parallel with the sources connected
together?
A: two
Q: What is the circuit diagram of CMOS NAND gate?
A:
figure 7.28
Q: What is the output of the CMOS NAND gate?
A: low
logic 0
Q: When input A is at logic 0 (grounded) and input B is at logic 1,
A: high
Q: What is the circuit diagram of CMOS NOR gate?
A: figure
7.29
Q: What is the circuit diagram of CMOS NOR gate?
A: figure
7.29
Q: What is the circuit diagram of CMOS NOR gate given in figure 7.29?
A:
7.14.3
Q: The circuit diagram of CMOS NOR gate is given in figure 7.29.
A:
7.14.3
Q: What is the circuit diagram of CMOS NOR gate?
A: figure
7.29
Q: What is the circuit diagram of CMOS NOR Gate?
A: figure
7.29
Q: When input A is at logic 0 (grounded) and input B is at logic 1
A: high
Q: What is the circuit diagram of CMOS NOR gate?
A: figure
7.29
Q: What is the circuit diagram of the CMOS NOR gate?
A: figure
7.29
Q: When input A is at logic 0 and input B is at logic 0 (grounded
A:
negative potentials
Q: When both inputs are at logic 0 (grounded), the gate of T 1 and
A:
negative potentials
Q: When input A is at logic 0 (grounded), the gate of T 1 and T
A:
negative potentials
Q: When input A is at logic 0 (grounded) and input B is at logic
A:
negative potentials
Q: When both the inputs are at logic 0 (grounded), the gate of T 1
A:
negative potentials
Q: When both inputs are at logic 0 (grounded) and input B is at logic
A:
negative potentials
Q: When input A is at logic 0 (grounded), the gate of T 1 is at
A: negative potentials
Q: When both inputs are at logic 0 (grounded), the gate of T1 and
A:
negative potentials
Q: When input A is at logic 0 (grounded), the gate of T1 and T
A:
negative potentials
Q: When both inputs are at logic 0 (grounded), the gates of T 1 and
A:
negative potentials
Q: What are positive and negative logics?
A: logic diagram of two-input
AND gate
Q: What is the difference between positive and negative logics?
A:
grounded
Q: What are positive and negative logics?
A: logic diagram of two-input
AND gate
Q: What do you understand by the term logic?
A: Discus s three-input diode O
Q: What is the difference between positive and negative logic?
A:
grounded
Q: What is the difference between positive and negative logics?
A:
grounded
Q: What are positive and negative logics?
A: logic diagram of two-input
AND gate
Q: What are positive and negative logics?
A: logic diagram of two-input
AND gate
Q: What is the difference between positive and negative logics?
A:
grounded
Q: What are positive and negative logics?
A: logic diagram of two-input
AND gate
Q: What is the classification of logic family?
A: digital ICs
Q: What is the classification of logic family?
A: digital ICs
Q: How does an inverter circuit work?
A:
3. How an inverter circuit works, explain with neat diagram
Q: What is the classification of logic family?
A: digital ICs
Q: What is the classification of logic family?
A: digital ICs
Q: What are the following parameters related to logic gates?
A: Propagation delay time, Power dis sipation and Noise margin
Q: What is the classification of logic family?
A: digital ICs
Q: What is the classification of logic family?
A: digital ICs
Q: What is the classification of logic family?
A: digital ICs
Q: What is the classification of logic family?
A: digital ICs
Q: What is the main advantage of open collector two input TTL NAND gate?
A: can be used a s wire-AND
Q: What are the advantages and disadvantages of the basic circuit?
A: advantages and disadvantages
Q: What are the advantages and disadvantages of the logic family?
A: advantages and disadvantages
Q: What is the main advantage of the open collector TTL NAND gate?
A: can be used a s wire-AND
Q: How are the disadvantages of the basic circuit removed?
A:
12
Q: What is the main advantage of open collector two input TTL NAND gate?
A: can be used a s wire-AND
Q: What is the main advantage of the open collector gate?
A: can be used a s wire-AND
Q: What is the main advantage of open collector two input TTL NAND gate?
A: can be used a s wire-AND
Q: What is the main advantage of open collector two input TTL NAND gate?
A: can be used a s wire-AND
Q: What is the main advantage of open collector two input TTL NAND gate?
A: can be used a s wire-AND
Q: What are the advantages of emitter coupled logi c?
A:
19
Q: What are the two types of switching circuits used in digital systems?
A:
combinational
Q: What are two types of switching circuits used in digital systems?
A:
combinational
Q: What is the use of Schottky transistors in this logic?
A: working of two-input Schot tky TTL NAND gate
Q: What are the advantages of emitter coupled logic?
A:
19
Q: What two types of switching circuits are used in digital systems?
A:
combinational
Q: What are two types of switching circuits used in digital systems?
A:
combinational
Q: How many types of switching circuits are used in digital systems?
A: two
Q: What are the advantages of emitter coupled logi c?
A:
19
Q: What are the two types of switching circuits used in digital systems?
A:
combinational
Q: What is a basic memory element which is capable of storing one bit of
information?
A: flip-flop
Q: What is the other class of switching circuits known as?
A: s equential circuits
Q: What is the other class of switching circuits known as?
A: s equential circuits
Q: What is a b a b a b a b
A: Flip-flop
Q: What is the other class of switching circuits known as?
A: s equential circuits
Q: What is the other class of switching circuits?
A: s equential circuits
Q: What is a basic memory element which is capable of storing one bit of
information called?
A: flip-flop
Q: What is the other class of switching circuits known as?
A: s equential circuits
Q: What is the other class of switching circuits?
A: s equential circuits
Q: What is a b a b a b a b flip
A: Flip-flop
Q: What are flip-flops also known as?
A: the latch or toggle
Q: What are flip-flops also known as?
A: the latch or toggle
Q: What is the flip-flop also known as?
A: the latch or toggle
Q: The flip-flop has two stable states – logic 0 or lo gic 1.
A:
gates
Q: How many stable states does the flip-flop have?
A: two
Q: The flip-flop has two stable states - logic 0 or lo gic 1.
A:
gates
Q: What are flip flops also known as?
A: the latch or toggle
Q: How many stable states does a flip-flop have?
A: two
Q: What are flip flops also known as?
A: the latch or toggle
Q: What is the flip-flop also known as?
A: the latch or toggle
Q: What is assumed that x and y are outputs of ideal NOR gates?
A: after the delay of each gate
Q: The outputs x and y are given by: YRYRx
A: XSXSy ⋅=+=)(
Q: When the values of XY are equal to xy, then the circuit is said
A: stable state
Q: When the values of XY are equal to xy, the circuit is said to
A: stable state
Q: What are outputs of ideal NOR gates?
A: x and y
Q: What is assumed to be outputs of ideal NOR gates?
A: x and y
Q: What are x and y outputs of?
A: ideal
NOR gates
Q: What is assumed to be the outputs of ideal NOR gates?
A: x and y
Q: What are x and y outputs of ideal NOR gates?
A: after the delay of each gate
Q: What is assumed to be the outputs of ideal NOR gates?
A: x and y
Q: In the K-map, encircled values show the stable states since the en
A:
Q: What are the encircled values of the K-map?
A: xy
Q: What do encircled values show in the K-map?
A: stable states
Q: In the K-map, encircled values show the stable states, since the
A:
Q: Where do encircled values show the stable states?
A: In the K-map
Q: What are the encircled values of the K-map?
A: xy
Q: What shows the stable states in the K-map?
A: encircled values
Q: What are the encircled values in the K-map?
A: xy) are the same as XY
Q: What do encircled values show in the K-map?
A: stable states
Q: What are the encircled values of the K-map?
A: xy
Q: What is the race condition?
A: the la tch will reach to the stable state E
Q: What is the race condition?
A: the la tch will reach to the stable state E
Q: What is the race condition?
A: the la tch will reach to the stable state E
Q: What is the race condition?
A: the la tch will reach to the stable state E
Q: What is the race condition?
A: the la tch will reach to the stable state E
Q: What is the race condition?
A: the la tch will reach to the stable state E
Q: What is the race condition?
A: the la tch will reach to the stable state E
Q: What is the race condition?
A: the la tch will reach to the stable state E
Q: What is the race condition?
A: the la tch will reach to the stable state E
Q: What is the race condition?
A: the la tch will reach to the stable state E
Q: If RS = 11, the circui t will reach to the stable state D
A:
Q: What is the delay in the gates an inheren t quantity?
A:
transitions
Q: When RS = 11, the circui t will reach to the stable state D
A:
Q: The delay in the gates is an inheren t quantity. So this type of race
A:
transitions
Q: What is a valid race as it gives the predictable output?
A: this type of race
Q: What is the delay in the gates an inheren t quantity?
A:
transitions
Q: What is an inheren t quantity?
A: the delay in the gates
Q: What is an inheren t quantity of the delay in the gates?
A:
transitions
Q: What is the delay in the gates an inheren t quantity?
A:
transitions
Q: What is an inheren t quantity of the delay in the gates?
A:
transitions
Q: When RS are changed to 00, the outputs of the circuit are their previous stable
A: before the
change
Q: When RS are changed to 00, the values of the outputs are their previous stable
A: before the
change
Q: When RS is changed to 00, the outputs of the circuit are their previous stable
A: before the
change
Q: When RS are changed to 00, the outputs are their previous stable values (before
A:
change
Q: When RS is changed to 00, the values of the outputs are their previous stable
A: before the
change
Q: What was the circuit having the values of RS as 01?
A: stable state C
Q: The circuit was in the stable state C where xy = XY =10. When
A: the circuit was having the values of RS as 01
Q: When RS are changed to 00, the outputs are their previous stable values before
the
A:
change
Q: What was the circuit having the values of RS as 01?
A: stable state C
Q: The circuit was in the stable state C where xy = XY =10. The
A: the circuit was having the values of RS as 01
Q: What type of race is not a valid race as output is not predictable?
A: critical race
Q: What type of race is not a valid race?
A: critical race
Q: What type of race is not a valid race?
A: critical race
Q: What type of race is not a valid race?
A: critical race
Q: What type of race is not a valid race?
A: critical race
Q: What type of race is not a valid race as output is not predictable?
A: critical race
Q: What type of race is not a valid race as output is not predictable?
A: critical race
Q: What type of race is not a valid race?
A: critical race
Q: What type of race is not a valid race because output is not predictable?
A: critical race
Q: What type of race is not a valid race?
A: critical race
Q: If the values of RS are changed to 01 both from 00 or 10 or 11, the
A:
reach to the stable state
Q: When the values of RS are changed to 01 both from 00 or 10 or 11, the
A:
reach to the stable state
Q: What will happen if the values of RS are changed to 01 both from 00 or
A: 10 or 11
Q: What is the output of a R S flip-flop if the values of RS
A: XY = x y = 10
Q: What will occur if the values of RS are changed to 00 from 11?
A: a cr itical race
Q: If the values of RS are changed to 01 both from 01 or 10 or 11, the flip
A:
reach to the stable state
Q: What will happen if the values of RS are changed to 11 from 01 or 10 or
A: 00
Q: What will happen if the values of RS are changed to 00 from 11?
A: a cr itical race
Q: What will happen if the values of RS are changed to 01 both from 01 or 10
A:
reach to the stable state
Q: What will happen if the values of RS are changed to 01 from 00 or 10
A: a cr itical race
Q: What is the flip-flop known as?
A: asynchronous
Q: What is the symbolic representation of the R S flip-flop shown in figure 8.4?
A: asynchronous
Q: What are the outputs X and Y renamed as?
A: Q and Q
Q: What is the flip-flop known as?
A: asynchronous
Q: What is the symbolic representation of the R S flip-flop?
A: figure 8.4
Q: Where is the symbolic representation of the R S flip-flop shown?
A: figure 8.4
Q: What is the symbolic representation of the R S flip-flop shown in?
A: figure 8.4
Q: What is the flip-flop known as?
A: asynchronous
Q: What is the flip-flop known as?
A: asynchronous
Q: What are the outputs X and Y renamed to?
A: Q and Q
Q: What is the circuit shown in figure 8.6?
A: Active Low R S Flip-flop with NAND Gates
Q: What is the circuit shown in figure 8.6?
A: Active Low R S Flip-flop with NAND Gates
Q: What is the circuit shown in figure 8.6 with NAND gates?
A: R S latch
Q: What is the circuit in figure 8.6 called?
A: active low R S latch
Q: What is the circuit shown in figure 8.6 called?
A: active low R S latch
Q: What is the R S latch with NAND gates?
A: Active Low R S Flip-flop
Q: What is the R S latch with NAND gates?
A: Active Low R S Flip-flop
Q: What circuit is known as the active low R S latch with NAND gates?
A: Consider the circuit shown in
figure 8.6
Q: What circuit is known as the active low R S latch with NAND gates?
A: Consider the circuit shown in
figure 8.6
Q: What circuit is known as the active low R S latch with NAND gates?
A: Consider the circuit shown in
figure 8.6
Q: If R = 1 and S = 1, the output Q will always be 1 i.e
A:
it sets the latch
Q: What is the output of gate 1?
A: 0
Q: If R = 1 and S = 1, the output of gate 1 will be 0 and the
A:
Q: If R = 1 and S = 0, the output of gate 1 will be 0 and the
A:
Q: When R = 1 and S = 0, the output of gate 1 will be 0 and the
A:
Q: What is the output of gate 1 if R = 1 and S = 1?
A: 0
Q: If R = 1 and S = 1, the output of gate 1 will be 0 and that
A: 0=Q
Q: When R = 1 and S = 0, the output of gate 1 will be 0 and that
A: 0=Q
Q: If R = 1 and S = 0, the output of gate 1 will be 0 and that
A: 0=Q
Q: What will happen if R = 1 and S = 1?
A: resets the latch
Q: What was the R S flip-flop or latch discussed in the pr vious sections known as
A: asynchronous flip-flop
Q: What was the R S flip-flop or latch discussed in the prior sections known as?
A: asynchronous flip-flop
Q: What was the R S flip-flop or latch discussed in the previous sections known as?
A: asynchronous flip-flop
Q: What was the R S flip-flop or latch discussed in the preceding sections known
as?
A: asynchronous flip-flop
Q: What is the R S flip-flop known as?
A: asynchronous flip-flop
Q: What is the R S flip-flop or latch known as?
A: asynchronous flip-flop
Q: What was the R S flip-flop or latch discussed in the precedence sections known
as?
A: asynchronous flip-flop
Q: What was the R S flip-flop or latch discussed in the pr vious sections?
A: asynchronous flip-flop
Q: What was the R S flip-flop or latch discussed in the pr vious sections of the
A: asynchronous flip-flop
Q: What was the R S flip-flop or latch discussed in the prior sections?
A: asynchronous flip-flop
Q: What device generates the periodic trai n of clock pulses?
A: system
clock. The system clock
Q: What is the timing device known as?
A: system
clock
Q: What device generates the periodic trai n of clock pulses and the outputs are
affected
A: system
clock. The system clock
Q: What is the synchronization achieved b y the timing device known as?
A: system
clock
Q: What is the timing device known as in synchronous flip-flops?
A: system
clock
Q: What is the timing device used in synchro nous flip-flops?
A: system
clock
Q: What is the name of the timing device used in synchronous flip-flops?
A: system
clock
Q: What is the timing device used to achieve synchronization?
A: system
clock
Q: What is the timing device known as?
A: system
clock
Q: What device generates the periodic trai n of clock pulses?
A: system
clock. The system clock
Q: When the clock pulse is low both the AND gates will be disabled and inputs of t
A: the
latch will be in the store mode
Q: When the clock pulse is low both the AND gates will be disabled and inputs of
the latch
A: the
latch will be in the store mode
Q: When the clock pulse is low, both the AND gates will be disabled and inputs of
A: the
latch will be in the store mode
Q: When the clock pulse is low, both the AND gates will be disabled and inputs of
the
A: the
latch will be in the store mode
Q: What are the AND gates called?
A:
loading gates
Q: When the clock pulse is low both the AND gates and the inputs of the latch will
be
A: disabled
Q: When the clock pulse is low, both the AND gates will be disabled and the inputs
of
A: the
latch will be in the store mode
Q: What are the AND gates called?
A:
loading gates
Q: When the clock pulse is low both the AND gates and inputs of the latch will be
disabled
A: the
latch will be in the store mode
Q: When the clock pulse is low both the AND gates will be disabled and the inputs
of
A: the
latch will be in the store mode
Q: How many AND gates are used for loading the inputs R S and the c lock pulse
A: two
Q: How many AND gates are used to load the inputs R S and the c lock pulse
A: two
Q: How many AND gates are used for loading the inputs R S and c lock pulse?
A: two
Q: Where is the schematic representation of the clocked R S flip-flop shown?
A: figure 8.8(b).
Q: Where is the schematic representation of the asynchronous R S flip-flop shown?
A: figure 8.8(b).
Q: Where is the schematic representation of the clocked R S flip-flop shown?
A: figure 8.8(b).
Q: How is the asynchronous R S flip-flop designed?
A: by the circuit shown by shaded po rtion
Q: Where is the schematic representation of the clocked R S flip-flop shown?
A: figure 8.8(b).
Q: Where is the schematic representation of the asynchronous R S flip-flop shown?
A: figure 8.8(b).
Q: Where is the schematic representation of the asynchronous R S flip-flop shown?
A: figure 8.8(b).
Q: When the clock pulse is high, the circui t will behave as the
A: clocked R S flip-
flop
Q: When the clock pulse is high, the circui t behaves as the
A: clocked R S flip-
flop
Q: When the clock pulse is high, the circui t will behave like the
A: clocked R S flip-
flop
Q: Where do the changes at the output take place?
A: at the leading edge of the clock pulse
Q: What are high putting the NAND latch in store mode?
A:
gates
Q: What do the changes at the output take place at the leading edge of the clock
pulse?
A: CLK
Q: When the clock pulse is high, the circui t behaves like the
A: clocked R S flip-
flop
Q: What are high putting the NAND latch in store mode?
A:
gates
Q: Where do the changes at the output take place when the clock pulse is high?
A: at the leading edge
Q: When the clock pulse is high, the circui t will behave as the R
A: clocked R S
Q: When the clock pulse goes low to high, the flip-flop triggers (or flip-
A: flip-flop enables
Q: When the clock pulse goes low to high, the flip-flop triggers, or flip-
A: flip-flop enables
Q: When do flip-flops work after the application of clock pulse?
A: when the clock pulse goes low to
high
Q: When the clock pulse goes low to high, the flip-flop triggers or flip-flop
A: flip-flop enables
Q: What triggers flip-flops when the clock pulse goes low to high?
A: flip-flop
Q: What triggers flip-flops?
A: when the clock pulse
Q: What triggers flip-flops when the clock pulse goes low to high?
A: flip-flop
Q: What type of flip-flops work after the application of clock pulse?
A:
flip-flops
Q: When do flip-flops work after application of clock pulse?
A: when the clock pulse goes low to
high
Q: What triggers flip-flops?
A: when the clock pulse
Q: The symbol for negative edge triggered R S flip-flop is shown in figure 8.12(
A: b
Q: What is obtained by the edge detector circuit?
A: The narrow spikes
Q: What is obtained by the edge detector circuit?
A: The narrow spikes
Q: What is obtained by the edge det ector circuit?
A: The narrow spikes
Q: What is the symbol for negative edge triggered R S flip-flop shown in?
A: figure 8.12(b).
Q: What is the symbol for negative edge triggered R S flip-flop?
A: p-flop
Q: What is obtained by the edge det ector circuit?
A: The narrow spikes
Q: How is the narrow spikes at the leading edge or trailing edge of the clock pulse
obtained
A: by the edge det ector circuit
Q: What is the symbol for negative edge triggered R S flip-flop?
A: p-flop
Q: What is the symbol for negative edge triggered R S flip-flop?
A: p-flop
Q: What is the modified form of clocked R S flip-flop?
A: D flip-flop
Q: What is the modified form of clocked R S flip-flop?
A: D flip-flop
Q: What is the modified form of clocked R S flip-flop?
A: D flip-flop
Q: The modified form of clocked R S flip-flop is a D flip-flop
A:
8.4
Q: What modified form of clocked R S flip-flop is a D flip-flop
A: The D Flip-flop
Q: What is the modified form of clocked R S flip-flop?
A: D flip-flop
Q: What is a modified form of clocked R S flip-flop?
A: D flip-flop
Q: What is the modified form of clocked R S flip-flop?
A: D flip-flop
Q: What is the modified form of the clocked R S flip-flop?
A: D flip-flop
Q: What is the modified form of clocked R S flip-flop?
A: D flip-flop
Q: What is another name for the delay flip-flop?
A: D flip-flop
Q: What is another name for the delay flip-flop?
A: D flip-flop
Q: What is also called as the delay flip-flop?
A: The D flip-flop
Q: What is the D flip-flop also called?
A: delay flip-flop
Q: What is also called as the delay flip-flop?
A: The D flip-flop
Q: What is another name for the delay flip-flop?
A: D flip-flop
Q: What flip-flop is also called the delay flip-flop?
A: D
Q: What is another name for the D flip-flop?
A: delay flip-flop
Q: What is another name for the delay flip-flop?
A: D flip-flop
Q: What is another name for the delay flip-flop?
A: D flip-flop
Q: When the clock is high, the outputs ( Q and Q) were not complement to each
A:
Q: When both the inputs are 11, the outputs ( Q and Q) are complements of
A:
the latch are connecting to its own loading gate
Q: When the clock is high, the outputs ( Q and Q) are complements of each
A:
Q: When the clock is high, the outputs Q and Q are complements of each other.
A:
Q: When both the inputs are 11, the outputs are complements of each other.
A:
Q: When both inputs are 11, the outputs ( Q and Q) are complements of each
A:
the latch are connecting to its own loading gate
Q: When both the inputs are 11, the outputs ( Q and Q) were not complement to
A:
Q: When the clock is high, the outputs Q and Q are complements of each other?
A:
Q: When the clock is high, the outputs ( Q and Q) were not complements to
A:
Q: When the clock is high, the outputs Q and Q were not complement to each other.
A:
Q: When the inputs J K are 00, the outputs will be either 01 or 10
A: storing their previ ous values
Q: When the inputs JK are 00, the outputs will be either 01 or 10
A: previ ous values
Q: When the inputs J K are 00, the outputs will either be 01 or 10
A: storing their previ ous values
Q: When the inputs JK are 00, the outputs will either be 01 or 10
A: previ ous values
Q: When JK is 00, the outputs will be either 01 or 10 storing their
A: previ ous values
Q: When the inputs J K are 00, the outputs will be either 01 or 10.
A: previ ous values
Q: When the inputs J K are 00, the outputs will either be either 01 or
A: 10
Q: When the inputs JK are 00, the outputs will be either 01 or 10.
A: previ ous values
Q: What is drawn to analyse the behaviour of the flip-flop?
A: the K- map
Q: When the inputs JK are 00, the outputs will either be either 01 or
A: 10
Q: What condition is known as race around condition?
A: the width of the clock pulse is
less than the delay in latch
Q: What condition is known as race around condition?
A: the width of the clock pulse is
less than the delay in latch
Q: What condition is known as race around condition?
A: the width of the clock pulse is
less than the delay in latch
Q: What condition is known as race around condition?
A: the width of the clock pulse is
less than the delay in latch
Q: Which condition is known as race around condition?
A: the width of the clock pulse is
less than the delay in latch
Q: What is an inherent quantity which can not be known by the use r for the particu
A: the delay
Q: What is an inherent quantity that can not be known by the use r for the particu
A: the delay
Q: What condition is known as race around condition?
A: the width of the clock pulse is
less than the delay in latch
Q: What is an inherent quantity which can not be known by the use of r for the
parti
A: the delay
Q: What is an inherent quantity that can not be known by the use of r for the parti
A: the delay
Q: When J and K inputs are 00, no change in the output values will take place
A: at the
positive edge of the clock pulse
Q: When J and K inputs are 00, no change in output values will take place at
A: the
positive edge of the clock pulse
Q: When J and K inputs are 00, the flip-flop resets at the positive
A:
Q: What can be generated by the edge detector circuit discussed in section 8.3.1?
A: narro w spikes
Q: When the flip-flop resets at the positive edge of the clock pulse, the circuit
is
A:
Q: What can be eliminated if narrow spikes o f few nanoseconds at the
A: pulse width
Q: When the flip-flop resets at the positive edge of the clock pulse, the flip-
A:
Q: When J and K inputs are 00, no change will take place at the positive edge
A:
Q: What can be eliminated if narrow spikes o f few nanoseconds are used
A: pulse width
Q: What can be generated by the edge detector circuit discussed in section 8.3.1?
A: narro w spikes
Q: When J K inputs of an edge triggered Flip-flop are connected together to form
A: Edge Triggered T
Q: What is the waveform of the output Q of a negative edge triggered J K
A: Edge Triggered T
Q: What is the circuit diagram of edge trigger ed J K flip-flops using?
A: NOR and
NAND latch
Q: What is the waveform of the output Q of a negative edge triggered JK
A: Edge Triggered T
Q: What is an example of a negative edge triggered J K flip-flop?
A: 8.4
Q: What is the circuit diagram of edge trigger ed J K flip-flops using
A: NOR and
NAND latch
Q: What is the waveform of the output Q of a negative edge tri ggered J
A: Example 8.4
Q: Where is the circuit diagram of edge trigger ed J K flip-flops shown?
A: figures 8.20 and 8.21
Q: When J K inputs of an edge triggered flip-flop are connected together to form
A: Edge Triggered T
Q: What is the waveform of the output Q of the negative edge triggered J K flip
A: Edge Triggered T
Q: When T = 0, the flip-flop will be in the store mode and give no change in
A: the output
Q: When T = 0, the flip-flop will be in the store mode and gives no change in
A: output
Q: Where is the flip-flop initially reset?
A:
figure 8.24
Q: Where is the flip-flop initially reset?
A:
figure 8.24
Q: What is the behaviour of the T flip-flop given in table 8.8?
A: the flip -flop will be in the complement mode
Q: What is the behaviour of T flip-flop given in table 8.8?
A: the flip -flop will be in the complement mode
Q: Where is the flip-flop initially reset?
A:
figure 8.24
Q: What is the behaviour of the T flip-flop given in?
A: table 8.8
Q: What is the behavior of the T flip-flop given in table 8.8?
A: the flip -flop will be in the complement mode
Q: What is the behavior of T flip-flop given in table 8.8?
A: the flip -flop will be in the complement mode
Q: What is transferred synchronously to the outputs of flip-flops?
A: the d ata
Q: What is transferred synchronously to the outputs of flip-flops, only at
A: the d ata
Q: What are the inputs connected to the flip-flo ps known as?
A: synchronous inputs
Q: What is transferred synchronously to the outputs of flip-ops?
A: the d ata
Q: What are preset ( PRE ) and clear ( CLR ) inputs called?
A: asynchronous inputs
Q: What are the inputs connected to the flip-flo ps called?
A: synchronous inputs
Q: What is transferred synchronously to the outputs of flip-fops, only at the
A: the d ata
Q: What is transferred synchronously to the outputs of flip-flops?
A: the d ata
Q: What is transferred synchronously to the outputs of flip-fops?
A: the d ata
Q: What is transferred synchronously to the outputs of flip-flops?
A: the d ata
Q: When both PRE and CLR asynchronous inputs are 0, the circuit gives uncert
A: uncer tain state
Q: When both PRE and CLR asynchronous inputs are 0, the circuit gives uncer
A: tain state
and this condition must not be used
Q: When PRE and CLR asynchronous inputs are 0, the circuit gives uncerta
A: uncer tain state
Q: When both PRE and CLR asynchronous inputs are zero, the circuit gives uncer
A: tain state
and this condition must not be used
Q: When PRE and CLR asynchronous inputs are 0, the circuit gives uncer t
A: this condition must not be used
Q: What is the logic symbol of the flip-flop?
A: asynch ronous inputs are indicated separately
Q: What sets the flip-flop?
A: PRE = 0
Q: When PRE and CLR asynchronous inputs are not connected, the circuit gives uncer
A: If both PRE and CLR asynchronous inputs are 0
Q: What is the logic symbol of this flip-flop?
A: asynch ronous inputs are indicated separately
Q: When PRE and CLR asynchronous inputs are zero, the circuit gives uncert
A: uncer tain state
Q: What is removed using master slave flip-flop?
A: the race around condition
Q: The race around condition in J K flip-flop w is removed using master slave flip-
A: flip-
flops
Q: The race around condition in J K flip-flop w as removed using master slave flip-
A: flip-
flops
Q: What is removed using master slave flip-flop?
A: the race around condition
Q: What is removed using master slave flip-flop?
A: the race around condition
Q: What is removed using master slave flip-flop?
A: the race around condition
Q: What flip-flop is constructed using two J K flip-flops?
A: master slave J K fillip-flop
Q: How is the race around condition in J K flip-flop removed?
A: using master slave flip-flop
Q: How is the race around condition in J K flip-flop removed?
A: using master slave flip-flop
Q: How is the race around condition removed using master slave flip-flop?
A: triggered flip-
flops
Q: What gives the operation of f lip-flop?
A: truth table
Q: The truth table also referred to as characteristic table gives the operation of
f lip-flop
A: state is known
Q: What gives the operation of f lip-flop?
A: truth table
Q: What gives the operation of f lip-flops?
A: truth table
Q: What gives the operation of f lip flop?
A: truth table also referred
to as characteristic table
Q: What gives the operation of the f lip-flop?
A: truth table
Q: What gives the operation of f lip-flop?
A: truth table
Q: What is the truth table also referred to as?
A: characteristic table
Q: The truth table also referred to as characteristic table gives the operation of
f lip flop
A: state is known
Q: What gives the operation of f lip-flop?
A: truth table
Q: What is a combinational circuit designed for the conversion of one type of gip
A:
8.8 Conversion of Flip-flops
Q: What does the suffix (n + 1) in the outputs denote?
A: the next state
Q: What is a combinational circuit designed for the conversion of one type of gimm
A:
8.8 Conversion of Flip-flops
Q: What table illustrates th es transitions is known as the excitation table?
A: 8.11(a) to
(d)
Q: What is the name of the table that illustrates th es transitions?
A: excitation table
Q: What table illustrates the transitions from present state to next state?
A: excitation table
Q: What is the table that illustrates th es transitions known as?
A: excitation table
Q: What is a combinational circuit designed for the conversion of one type of giz
A: Conversion of Flip-flops
Q: What table illustrates the transitions from present state to next state?
A: excitation table
Q: What is the table that illustrates th es transitions known as?
A: excitation table
Q: The general model for such conversion is illustrated in figure 8.30. The
combinational logic circuit is
A: flip-flop to other type
Q: What are the inputs of the required flip-flop fed as Fig. 8.30 input
A: inputs to the combinational circuit
Q: What is the general model for conversion of a J K flip-flop to R S flip
A: figure 8.30
Q: What are the inputs of the required flip-flop fed as Fig. 8.30?
A: inputs to the combinational circuit
Q: What is the general model for conversion of a J K to R S flip-flop?
A: figure 8.30
Q: What is the general model for such conversion?
A: figure 8.30
Q: Where is the general model for such conversion illustrated?
A: figure 8.30
Q: What are the inputs of the required flip-flop fed as?
A:
Q: What is the general model for such conversion illustrated in?
A: figure 8.30
Q: What is the general model for such conversion?
A: figure 8.30
Q: What is the logic diagram showing the conversion from J K flip-flop to R S flip-
A: figure 8.32
Q: What is the logic diagram showing the conversion from D fl ip-flop to
A:
Q: The logic diagram showing the conversion from J K flip-flop to R S flip-flop is
A:
Q: What is the logic diagram showing the conversion from J K to R S flip-flop?
A: figure 8.32
Q: What are important to specify the perfor mance, operating requirements and
limitations of the circuit
A: Several parameters
Q: The logic diagram showing the conversion from J K to R S flip-flop is given in
figure
A:
Q: What is the logic diagram for the conversion from J K flip-flop to R S flip-
A: figure 8.32
Q: The logic diagram showing the conversion from D fl ip-flop to J K
A:
Q: What are important to specify the perfor mance, operating requirements and
limitations of a
A: Several parameters
Q: The logic diagram showing the conversion from D fl ip-flop to J
A:
Q: What type of flip-flops are the combination of logic g ates?
A: flip-flops
Q: What are the two types of flip-flops?
A: logic g ates
Q: What types of flip-flops are illustrated in figure 8.33?
A: propagation delays
Q: What are the types of flip-flops?
A: combination of logic g ates
Q: What types of flip-flops are illustrated in figure 8.33?
A: propagation delays
Q: What are the two types of flip-flops?
A: logic g ates
Q: What types of flip-flops are illustrated in figure 8.33?
A: propagation delays
Q: What are the types of flip-flops?
A: combination of logic g ates
Q: What types of flip-flops are illustrated in figure 8. 33?
A: propagation delays
Q: What types of flip-flops are illustrated in figure 8. 33?
A: propagation delays
Q: What is the minimum time required for the inputs to settle before the triggering
edge of
A: Set-up Time
Q: What is the minimum time required for inputs to settle before the triggering
edge of the
A: Set-up Time
Q: What is the minimum time needed for the inputs to settle before the triggering
edge of
A: Set-up Time
Q: What is the maximum frequency at which a flip-flop can be reliably triggered?
A: Maximum Clock Frequency
Q: What is the minimum time required for the inputs to settle before triggering
edge of the
A: Set-up Time
Q: What is the minimum time necessary for the inputs to settle before the
triggering edge of
A: Set-up Time
Q: What is the minimum time required for inputs to settle before triggering edge of
the clock
A: Set-up Time
Q: What is the minimum time required for inputs to settle before triggering edge of
clock?
A: Set-up Time
Q: What is the minimum time for the inputs to settle before the triggering edge of
the
A: Set-up Time
Q: What is the minimum time needed for inputs to settle before the triggering edge
of the
A: Set-up Time
Q: What is the difference between asynchronous and syn chronous flip-flops?
A: clocked R S flip-flop with NOR latch
Q: What are the minimum pulse widths for the clock and a synchronous inputs
specified by
A:
Pulse Widths
Q: What are the minimum pulse widths for the clock and the a synchronous inputs
specified
A:
Pulse Widths
Q: What is the difference between asynchronous and syn chronous flip flops?
A: clocked R S flip-flop with NOR latch
Q: What is the minimum pulse widths for the clock and a synchronous inputs
specified by
A:
Pulse Widths
Q: What is the difference between asynchronous and syn chronous flip-flops?
A: clocked R S flip-flop with NOR latch
Q: What is the minimum pulse widths for the clock and the a synchronous inputs
specified
A:
Pulse Widths
Q: What is the minimum pulse width for the clock and a synchronous inputs specified
by the
A:
Pulse Widths
Q: What are the pulse widths for the clock and a synchronous inputs specified by
the
A: The minimum
Q: What are the minimum pulse widths for the clock and the asynchronous inputs
specified by
A:
Pulse Widths
Q: What is the purpose of asynchronous inputs in flip-flop?
A: How these inputs work
Q: How does a J K flip-flop differ from an S R flip-flop?
A: its basic operation
Q: What is the difference between a J K flip-flop and S R flip-flop?
A: basic operation
Q: How does a J K flip-flop differ from S R flip-flop?
A: its basic operation
Q: What is the main difference between a J K flip-flop and S R flip-flop
A: basic operation
Q: How does a J K flip-flop differ from an S R flip-flop in its
A: basic operation
Q: What is a master slave flip-flop?
A: Discuss its working
Q: What is the basic operation of a J K flip-flop?
A: Hold time
Q: How does a J K flip-flop differ from S R flip-flop in its basic
A: advantages
Q: What is the purpose of asynchronous inputs in flip-flop?
A: How these inputs work
Q: What can be used as R S flip-flop?
A: J K flip-flop
Q: What type of flip-flop can be used as R S flip-flop?
A: J K
Q: What type of flip-flop can be used as R S flip-flop?
A: J K
Q: What type of flip flop can be used as R S flip-flop?
A: J K
Q: What can a J K flip-flop be used as?
A: R S flip-flop
Q: What type of flip-flop can be used as R S flip-flop?
A: J K
Q: What type of flip flop can be used as R S flip-flop?
A: J K
Q: What can a J K flip flop be used as?
A: R S flip-flop
Q: What type of flip-flop can be used as a R S flip-flop?
A: J K
Q: What type of flip-flop can be used as R S flip-flop?
A: J K
Q: What is another form of a sequential circuit that can be set to a specific state
and
A: A register
Q: What is another form of a sequential circuit that can be set to a specific
state?
A: A register
Q: What is another form of a sequential circuit that can be set to a certain state
and
A: A register
Q: What is another form of a sequential circuit?
A: A register
Q: What is a shift regist er?
A: A register is used to manipulate data for
computational purposes
Q: What is another form of a sequential circuit that can be set to a particular
state and
A: A register
Q: What is another form of a sequential circuit that can be set to a specified
state and
A: A register
Q: In computers, a string of bits are normally stored and processed. What is a unit
A: A register
Q: What is another form of a sequential circuit called?
A: Shift Registers
Q: What is a shift regist er?
A: A register is used to manipulate data for
computational purposes
Q: What is a set of n flip-flops with a common clock?
A: An n-bit Register
Q: A single bit register is designed using a single D flip-flop as shown in figure
9.
A: negative
edge triggered D flip-flop
Q: What type of flip-flop is designed using a single D flip-flop?
A: single bit register
Q: What is designed using a single D flip-flop?
A: A single bit register
Q: What is used to design a single bit register?
A: single D flip-flop
Q: What is designed using a single D flip-flop?
A: A single bit register
Q: What can be used to design a single bit register?
A: D flip-flop
Q: How is a single bit register designed?
A: using a single D flip-flop
Q: What type of flip-flop is designed using a single D flip-flop?
A: single bit register
Q: What can be used to design a single bit register?
A: D flip-flop
Q: What is the process of information in a register called?
A:
loading the register
Q: What is the process of information in a register called?
A:
loading the register
Q: The process of information in a register is ca lled loading the register. Shif
A:
9.2 Classifications of Registers
Q: What is the process of information in a register called?
A:
loading the register
Q: Data inputs are given at D inputs of the flip-flops. Shifting
A:
9.2 Classifications of Registers
Q: What is the process of information in a register called?
A:
loading the register
Q: What is the process of information in a register ca lled loading the register?
A: shift register
Q: What is the process of information in a register called?
A:
loading the register
Q: What is the process of information in a register called?
A:
loading the register
Q: What is the process of information in a register called?
A:
loading the register
Q: What is the name of the type of register where data is loaded serially, one bit
at
A: Serial In Parallel Out
Q: What type of register is loaded serially, one bit at a time?
A: Serial In Parallel Out
Q: What is the name of the type of register in which data is loaded serially, one
bit
A: Serial In Parallel Out
Q: What is the name of the type of register where the data is loaded serially, one
bit
A: Serial In Parallel Out
Q: What type of register allows data to be moved serially in and out of the
register
A: Serial In Serial Out
Q: What is the name of the type of register in which the data is loaded serially,
one
A: Serial In Parallel Out
Q: What is the name of the type of register where data is loaded serially one bit
at
A: Serial In Parallel Out
Q: What type of register allows data to be moved serially in and out of the regist
A: Serial In Serial Out
Q: What type of register is loaded serially, one bit at a time?
A: Serial In Parallel Out
Q: What is the name of the type of register in which data is loaded serially one
bit at
A: Serial In Parallel Out
Q: What is serial loading of regi sters?
A: Serial In).
Q: What is serial loading of regi sters?
A: Serial In).
Q: What is serial loading of regi sters?
A: Serial In).
Q: What type of flip-flops are chosen for simplification purposes?
A: D type
Q: What is serial loading of regi sters?
A: Serial In).
Q: What type of flip-flops are used for simplification purposes?
A: D type
Q: What is a serial loading of regi sters?
A: Serial In).
Q: What is a serial loading of regi sters?
A: Serial In).
Q: What is serial loading of regi sters?
A: Serial In).
Q: What is serial loading of regi sters?
A: Serial In).
Q: What is serial in parallel out (SIPO) s hift register?
A:
fashion
Q: What are serial in parallel out (SIPO) s hift registers called
A:
fashion
Q: What are serial in parallel out (SIPO) s hift registers?
A:
fashion
Q: In parallel fashion, are called serial in parallel out (SIPO) s hif
A:
Q: What is a serial in parallel out (SIPO) s hift register
A:
fashion
Q: What is serial in parallel out (SIPO) s hift register called?
A:
fashion
Q: What is the serial in parallel out (SIPO) s hift register called
A:
fashion
Q: What is the serial in parallel out (SIPO) s hift register?
A:
fashion
Q: What are serial in parallel out (SIPO) s hift registers also
A: parallel
fashion
Q: What are serial in parallel out (SIPO) shift registers called?
A:
fashion
Q: How can a basic four-bit serial in serial out shift register be constructed?
A: using four D flip-flops
Q: How many D flip-flops can be used to construct a basic four-bit serial
A: four
Q: How many D flip-flops are used to construct a basic four-bit serial in
A: four
Q: How is a basic four-bit serial in serial out shift register constructed?
A: four D flip-flops
Q: How many D flip-flops can be used to build a basic four-bit serial
A: four
Q: How many D flip-flops can be used in a basic four-bit serial in
A: four
Q: How can a basic four-bit serial in serial out shift register be constructed?
A: using four D flip-flops
Q: How many D flip-flops are used to build a basic four-bit serial in
A: four
Q: How many D flip-flops can be used to make a basic four-bit serial
A: four
Q: How is a basic four-bit serial in serial out shift register constructed?
A: four D flip-flops
Q: What is to be entered serially and taken at the output Q 0 bit by bit?
A: d 1101
Q: What is to be entered serially and taken at the output Q0 bit by bit?
A: d 1101
Q: Fig. 9.6 Consider a data word 1101 is to be loaded serially and
A:
Q: What is to be entered serially?
A: 1101
Q: What is to be entered serially and taken at the output Q 0 bit by bit by
A: d 1101
Q: What is to be entered serially and taken at the output Q 0 bit by bit and
A: d 1101
Q: What is to be entered serially and taken at the output Q 0 bit by bit.
A: d 1101
Q: What is to be entered serially and taken at the output Q 0 bit by bit
A: d 1101
Q: How are the flip-flops cleared?
A: by applying CLR
signal
Q: Fig. 9.6 Consider a data word 1101 is to be loaded serially.
A:
Q: The systematic shifting of data is illustrated in table 9.12. The four-bit
parallel in -
A:
Q: When the parallel transfer signal is high all the AND gates will be enabled and
the data bits gets
A:
connected to their respective flip-flop
Q: The systematic shifting of data is illustrated in table 9.12. The logic block
diagram of SISO shift
A:
Q: When the parallel transfer signal is high all the AND gates will be enabled and
the data bits get
A:
connected to their respective flip-flop
Q: The systematic shifting of data is illustrated in table 9.12. The four-bit
parallel in- parallel
A:
Q: The systematic shifting of data is illustrated in table 9.12. The four-bit
parallel in-par
A:
Q: The systematic shifting of data is illustrated in table 9.12. The four-bit
parallel in parallel out
A:
Q: The systematic shifting of data is illustrated in table 9.12. The logic block
diagram of PIPO shift
A:
Q: What is the logic block diagram of SISO shift register?
A: figure 9.7
Q: When the parallel transfer signal is high all the AND gates will be enabled and
the data bits will
A:
Q: What is the name of the four-bit parallel in-serial out shift register?
A: Parallel In Serial Out (PISO) Shift Register
Q: What is the name of the four-bit parallel in - serial out shift register?
A: Parallel In Serial Out (PISO) Shift Register
Q: What is a four-bit parallel in - serial out shift register shown in figure 9.
A: Parallel In Serial Out (PISO) Shift Register
Q: A four-bit parallel in-serial out shift register is shown in figure 9.9
A:
Q: A four-bit parallel in-serial out shift register is shown in figure 9.9.
A:
Q: What is a four-bit parallel in serial out shift register shown in figure 9.9?
A:
9.6
Q: What is a four-bit parallel in-serial out shift register shown in figure
A: 9.10
Q: What is the name of the four-bit parallel in serial out shift register?
A: Parallel In Serial Out (PISO) Shift Register
Q: A four-bit parallel in-serial out shift register is shown in figure 9.6
A:
Q: A four-bit parallel in - serial out shift register is shown in figure 9.6.
A:
Q: What will force the data to be shifted from their present state to next state af
A: NAND gates 6 through 8
Q: What is the name of the logic block diagram of the PISO shift register?
A: figure 9 .11
Q: What is the name of the logic block diagram of PISO shift register?
A: figure 9 .11
Q: What is the logic block diagram of PISO shift register shown in figure 9.11?
A: Table 9.3
Q: The logic block diagram of PISO shift register is shown in figure 9 .11. Table
A: Table 9.3
Q: The logic block diagram of PISO shift register is shown in figure 9.11 9.7.
A:
Q: What is said to be stored in the register after the application of clock pulse?
A: The data
Q: The logic block diagram of PISO shift register is shown in figure 9.11 9.7 Bi
A: Bidirectional Shift Register
Q: What will force the data to be shifted from their present state to next state?
A: NAND gates 6 through 8
Q: What is the name of the logic block diagram of PISO shift register?
A: figure 9 .11
Q: What is reve rsed?
A: left shift
Q: What is reve sed (right shift)?
A: Left Right
Q: What is the effect of reve rsed?
A: multiplying the number by two
Q: What is reve rsed (right shift)?
A: Left Right
Q: What is reve sed (right shift)?
A: Left Right
Q: What is the effect of reve rsed?
A: multiplying the number by two
Q: What is reve rsed (right shift)?
A: Left Right
Q: What is the effect of reve rsed (left shift)?
A: multiplying the number by two
Q: What is the effect of reve rsed (left shift)?
A: multiplying the number by two
Q: What is the effect of reve rsed (left shift)?
A: multiplying the number by two
Q: The output Q of all the flip-flops gets connected to the D input of the
following
A: Universal Shift Register
Q: When the SHL SHR / control line is low, the configuration of logic gates makes
A: the data bit to connect to D input of 4th flip-flop
Q: When the SHL SHR is low, the configuration of logic gates makes the data bit to
A: connect to D input
Q: How are data bits shifted after the application clock pulse to the CLK terminal?
A: one place to th e right
Q: The output Q of all the flip-flops gets connected to the D input of the next
A: flip-flop
Q: When the SHL SHR is low, the configuration of logic gates makes the data bit
connect
A: D input of 4th flip-flop
Q: When the SHL SHR / control line is low, the configuration of logic gates make
A: the data bit to connect to D input of 4th flip-flop
Q: How are data bits shifted after the application clock pulse to the CLK terminal?
A: one place to th e right
Q: When the SHL SHR / control line is low, data bits are shifted one
A:
configuration of logic gates
Q: What circuit works as the le ft shift register?
A: Universal Shift Register
Q: How many D flip-flops does a 4-bit universal shift register have?
A: four
Q: How many D flip-flops does the 4-bit universal shift register have?
A: four
Q: How many D flip-flops are in a 4-bit universal shift register?
A: four
Q: How many D flip-flops does the 4-bit universal shift register have?
A: four
Q: How many D flip-flops does a 4-bit universal shift register have?
A: four
Q: What is a universal shift register called?
A: shift register
Q: What is a universal shift register called?
A: shift register
Q: What is a universal shift register called?
A: shift register
Q: What is a universal shift register?
A: bi-directional shifting of data
Q: How many D flip-flops does the 4-bit universal shift register have?
A: four
Q: What is used to clear or reset the register?
A: asynchronous input CLR
Q: What is used to clear or reset the register?
A: asynchronous input CLR
Q: What is used to clear or reset the register?
A: asynchronous input CLR
Q: What is used to clear or reset the register?
A: asynchronous input CLR
Q: What is used to clear or reset the register?
A: asynchronous input CLR
Q: What is used to clear or reset the register?
A: asynchronous input CLR
Q: What is the asynchronous input CLR used to clear or reset the register?
A: clock pulse
Q: How many types of cyclic shift registers are there?
A: two
Q: What are the two types of cyclic shift registers?
A: 1. Ring Counter
2. Johnson Counter or Twisted Ring Counter
Q: What is used to clear or reset the register?
A: asynchronous input CLR
Q: The ring counter, constructed using the D flip-flops is shown in figure 9.14
A:
Q: The ring counter, constructed using the D flip-flops, is shown in figure 9.
A:
Q: The ring counter is constructed using the D flip-flops as shown in figure 9.14
A:
Q: How are the contents of each register shifted to the ri ght?
A: by one bit
Q: What is connected to the D input of the first flip-flop by connecting the Q0
output
A: the l ast flip-flop
Q: How are the contents of each register shifted to the ri ght by
A: by one bit
Q: How are the contents of each register shifted to the ri ght after
A: by one bit
Q: What is connected to the D input of the first flip-flop?
A: Q0 output of the l ast flip-flop
Q: Where is the ring counter constructed using the D flip-flops?
A: figure 9.14
Q: Where is the ring counter constructed using the D flip-flops?
A: figure 9.14
Q: What is the basic difference between the Joh nson counter and ring counter?
A: the complement of the
output of the last flip flop
Q: What can be used to switch on a sequence of machines, one after another?
A: The 1
Q: What can be used to switch on a sequence of machines?
A: The 1
Q: What can be used to switch on a sequence of machines?
A: The 1
Q: What is used to switch on a sequence of machines?
A: The 1
Q: What can be used to switch on a sequence of machines?
A: The 1
Q: What is the basic difference between the Johnson counter and ring counter?
A: the complement of the
output of the last flip flop
Q: What is used to switch on a sequence of machines, one after another?
A: The 1
Q: What can be used to switch on a sequence of machines, one after another?
A: The 1
Q: What is the basic difference between the Johnson counter and ring counter?
A: the complement of the
output of the last flip flop
Q: How many states does the four bit Johnson counter have?
A: 8
Q: How many states does the four bit Johnson counter have?
A: 8
Q: How many states does the four bit Johnson counter have?
A: 8
Q: How many states does the four bit Johnson counter have?
A: 8
Q: How many states does the four bit Johnson counter have?
A: 8
Q: What is another name for the 4 bit Johnson counter?
A: twisted ring
Q: How many states does the four bit Johnson counter have?
A: 8
Q: How many states does the four bit Johnson counter have?
A: 8
Q: What is another name for the 4 bit Johnson counter?
A: twisted ring
Q: How many states does the four bit Johnson counter have?
A: 8
Q: What are the current Shift register IC’s available in the table 9.7?
A:
7495
Q: What are the currently available Shift register IC’s given in the table 9.7
A:
7495
Q: What are the currently available Shift register IC's given in the table 9.7
A:
7495
Q: What are the current Shift register IC’s available for?
A: the table 9.7
Q: What are the current Shift register IC’s available for?
A: the table 9.7
Q: How many Shift register IC's are currently available?
A:
7495
Q: How many Shift register IC's are currently available?
A:
7495
Q: How many Shift register IC's are currently available?
A:
7495
Q: How many Shift register ICs are currently available?
A:
7495
Q: How many Shift register IC's are currently available?
A:
7495
Q: What is the pin diagram of the IC7491?
A: figure 9.18
Q: What is the logic diagram of the IC7491?
A: 8 S – R flip flops
Q: What is the pin diagram of the IC7491 shown in?
A: figure 9.18
Q: What is the pin diagram of IC7491?
A: figure 9.18
Q: The pin diagram of IC7491 is shown in figure 9.18. The IC74
A:
IC 74194
Q: What is an 8 bit serial in serial out shift register?
A:
IC 7491
Q: What is an 8-bit serial in serial out shift register?
A:
IC 7491
Q: What is the logic diagram of IC 7491?
A: 8 S – R flip flops
Q: What is the pin diagram of IC7491?
A: figure 9.18
Q: What is the logic diagram of IC 7491?
A: 8 S – R flip flops
Q: The IC 74195 is a 4 bit Serial/Parallel-in Par
A: Paralle l-out shift register
Q: What is a 4 bit Serial/Parallel-in Paralle l-out
A: IC 74195: The IC 74195
Q: What is the pin diagram of the IC 74195?
A: figure 3.17
Q: What is the IC 74195?
A: 4 bit Serial/Parallel-in Paralle l-out shift register
Q: What is the IC 74195?
A: 4 bit Serial/Parallel-in Paralle l-out shift register
Q: What is the pin diagram of the IC 74195?
A: figure 3.17
Q: When S 0 is high and S 1 is low, shift right operation is performed with the
A: positive
edge of the clock pulse
Q: What is the pin diagram of the IC 74195?
A: figure 3.17
Q: What is the pin diagram of the IC 74195?
A: figure 3.17
Q: When S 0 is high and S 1 is low, shift right operation is performed with
A: th e positive
edge of the clock pulse
Q: Shift registers are primarily used for temporary storage of data and bit
manipulations,
A:
9.11
Q: The most important application of shift registers is the serial adder. Shift
registers
A:
9.11.1 Serial Adder
Q: What is the most important application of shift registers?
A: serial adder
Q: What is the most important application of shift registers?
A: serial adder
Q: What are shift registers primarily used for?
A: temporary storage of data and bit manipulations
Q: What is the most important application of shift registers?
A: serial adder
Q: Shift registers are primarily used for temporary storage of data and bit
manipulations.
A:
9.11
Q: What is the most important application of shift registers?
A: serial adder
Q: What is the most important application of shift registers?
A: serial adder
Q: What is the most important application of shift registers?
A: serial adder
Q: How many D - flip flops are connected to the carry bit of the full add
A: One more
Q: How many D- flip flops are connected to the carry bit of the full adder
A: One more
Q: How many data words each of 4 bits can a full adder add?
A: two
Q: How many data words each of 4 bits can be added?
A: two
Q: How many data words each of 4 bits can be added to a circuit diagram?
A: two
Q: How many data words each of 4 bits can be added to a circuit diagram?
A: two
Q: How many data words each of 4 bits can be added?
A: two
Q: How many data words each of 4 bits is possible to add?
A: two
Q: How many data words is it possible to add each of 4 bits?
A: two
Q: How many D - flip flops are in the circuit diagram?
A: four
Q: What is another application to generate and check the parity bit of 4 bit number
will be discussed
A: 9.11.2 Parity Generator cum Checker
Q: What is another application to generate and check the parity bit of 4 bit
number?
A: Parity Generator cum Checker
Q: What is another application to generate and check the parity bit of 4 bit
number?
A: Parity Generator cum Checker
Q: What is another application to generate and check the parity bit of 4 bit number
to be discussed
A: 9.11.2 Parity Generator cum Checker
Q: What is another application to generate and check the parity bit of 4 bit
number?
A: Parity Generator cum Checker
Q: What is another application to generate and check the parity bit of 4 bit
number?
A: Parity Generator cum Checker
Q: How many flip flops are in the circuit shown in figure 9.25?
A: five
Q: What is another application to generate and check the parity bit of 4 bit
number?
A: Parity Generator cum Checker
Q: How many flip flops are in the circuit shown in figure 9.25?
A: five
Q: What is stored in carry flip flop?
A: carry bit generated
Q: What is set to 1 during the f irst clock pulse?
A: Load the data signal
Q: To use the circuit as parity checker, the parit y generator signal is set
A: 0
Q: To use the circuit as parity checker, the parit y generator signal (PG
A: 0
Q: What signal is set to 1 during the f irst clock pulse?
A: Load the data signal (LD)
Q: What is set to 1 during the f irst clock pulse?
A: Load the data signal
Q: What is the control signal for the parity generator cum checker shown in?
A: figure9.26
Q: What is the control signal for the parity generator cum checker shown in figure
9.26
A: to store the
parity bit
Q: What is set to 1 during the f irst clock pulse to use the
A: Load the data signal
Q: What is the control signal for the parity gener ator cum checker shown in?
A: figure9.26
Q: What is set to 1 during the f irst clock pulse?
A: Load the data signal
Q: When parity generator signal is set to 1 and P is reset to 0, then parity check
A: For parity generator
Q: When parity generator signal ( PG) is set to 1 and P is reset to 0,
A: For parity generator
Q: When parity generator signal is set to 1 and P is reset to 0, error flip flop
A: For parity generator
Q: When parity generator signal is set to 1 and P is reset to 0, parity check is
A: For parity generator
Q: Parity generator signal is set to 1 and P is reset to 0. If parity bit P
A: For parity generator
Q: When parity generator signal (PG) is set to 1 and P is reset to 0, then
A: For parity generator
Q: Parity generator signal ( PG) is set to 1 and P is reset to 0. If
A: For parity generator
Q: When parity generator signal (PG) is set to 1 and P is reset to 0, par
A: For parity generator
Q: When parity generator signal (PG) is set to 1 and P is reset to 0, error
A: error flip flop
Q: When parity generator signal (PG) is set to 1 and P is reset to 0, what
A: For parity generator
Q: What can be used to introduce time delay in digital signals from input to
output?
A: Serial In Serial Out (SISO) shift register
Q: What is used to introduce time delay in digital signals from input to output?
A: Serial In Serial Out (SISO) shift register
Q: What can be used to introduce time delay in digital signals from input to
output?
A: Serial In Serial Out (SISO) shift register
Q: What is used to introduce time delay in digital signals from input to output
given by: CLK
A: Serial In Serial Out (SISO) shift register
Q: What can be used to introduce time delay in digital signals from input to output
given by: CL
A: Serial In Serial Out (SISO) shift register
Q: What can be used to introduce time delay in digital signals from input to output
given by
A: Serial In Serial Out (SISO) shift register
Q: What is SISO?
A: Serial In Serial Out
Q: What is used to introduce time delay in digital signals from input to output?
A: Serial In Serial Out (SISO) shift register
Q: What is used to introduce time delay in digital signals from input to output
given by:
A: Serial In Serial Out (SISO) shift register
Q: What can be used to introduce time delay in digital signals from input to output
given by CLK
A: Serial In Serial Out (SISO) shift register
Q: What is an important use of shift register?
A: sequence generator
Q: What is an important use of the shift register?
A: sequence generator
Q: What is an important use of shift register?
A: sequence generator
Q: What is an important use of a shift register?
A: sequence generator
Q: What is an important use of shift register?
A: sequence generator
Q: What is an important use of shift register?
A: sequence generator
Q: What is an important use of shift register?
A: sequence generator
Q: What is an important use of shift register?
A: sequence generator
Q: What is an important use of shift register?
A: sequence generator
Q: What is an important use of shift register?
A: sequence generator
Q: How many combinations of three bits are required to generate the gi ven
sequence?
A: six
Q: How many combinations of three bits are needed to generate the gi ven sequence?
A: six
Q: What is needed since Np2?
A: state shift
register
Q: What is needed since Np2?
A: state shift
register
Q: How many combinations of 3 bits are required to generate the gi ven sequence?
A: six
Q: What is needed since Np2?
A: state shift
register
Q: What is needed since Np2?
A: state shift
register
Q: What is needed since Np2?
A: state shift
register
Q: What is needed since Np2?
A: state shift
register
Q: What is needed since Np2?
A: state shift
register
Q: How can a flip-flop be used to st ore a bit?
A: register
Q: What is a flip-flop used to do?
A: st ore a bit
Q: What is a flip-flop used to do?
A: st ore a bit
Q: What is a flip-flop used for?
A: to st ore a bit
Q: What is a flip-flop used for?
A: to st ore a bit
Q: What is a flip-flop used to do?
A: st ore a bit
Q: How can a flip-flop be used to stop a bit?
A: register
Q: What is a flip-flop used to do?
A: st ore a bit
Q: What is a flip-flop used for?
A: to st ore a bit
Q: What is a flip-flop used to do?
A: st ore a bit
Q: What is the difference between a ring counter and t wisted ring counter?
A:
9
Q: What is the difference between a ring counter and a t wisted ring
A:
9
Q: What are the differences between a ring counter and t wisted ring counter?
A:
9
Q: What is the main advantage of a universal shift register?
A: 11
Q: What is the main advantage of a universal shift register?
A: 11
Q: What is the main advantage of a universal shift register?
A: 11
Q: What is the main advantage of a universal shift register?
A: 11
Q: What is the main advantage of a universal shift register?
A: 11
Q: What is the main advantage of a universal shift register?
A: 11
Q: What is the difference between ring counter and t wisted ring counter?
A:
9
Q: Counters are the important building block of digit al systems. Counters are used
to count
A: pulses
Q: Counters are the important building block of digit al systems. These are used to
count the
A:
___________
10
Q: Counters are the important building block of digit al systems. Counters are the
important building
A:
___________
10
Q: What are the important building block of digit al systems?
A: Counters
Q: What is the important building block of digit al systems?
A: Counters
Q: What are the important building blocks of digit al systems?
A: Counters
Q: Counters are the important building block of digit al systems. They are used to
count the
A:
___________
10
Q: What is the important building block of digit al systems?
A: Counters
Q: What are the important building block of digit al systems?
A: Counters
Q: Counters are the important building block of digit al systems. These are used to
count pulse
A: Counters
Q: How many unique states will a counter with n number of flip-flops have?
A: n2
Q: What is a frequency division called?
A: count er
Q: What is a frequency division called?
A: count er
Q: How many unique states will a counter with n number of flip flops have?
A: n2
Q: How many unique states does a ripple counter have?
A: two bit
Q: What is a frequency division called?
A: count er
Q: How many unique states does a ripple counter have?
A: two bit
Q: What is a frequency division called?
A: count er
Q: What is a frequency division called?
A: count er
Q: What is a frequency division called?
A: count er
Q: The modulus of a counter represents the total number of states through which the
counter can move
A: n2counter
Q: When an input pulse is applied to a flip-flop, it gives an output after some
A: time delay
Q: What represents the total number of states through which a counter can move?
A: The modulus of a counter
Q: The modulus of a counter represents the total number of states through which a
counter can
A: n2counter
Q: What is the modulus of a counter?
A: the total number of states through which the counter can move
Q: How many states does the modulus of a counter represent?
A: the total number of states through which the counter can move
Q: When an input pulse is applied to a flip-flop, it gives an output after
A: some time delay
Q: What does the modulus of a counter represent?
A: the total number of states through which the counter can move
Q: How many states does the modulus of a counter represent?
A: the total number of states through which the counter can move
Q: What represents the total number of states through which a counter can move?
A: The modulus of a counter
Q: What does each flip-flop toggled by the changing state of the preceding flip-
flop
A: the delay accumulates with the number of flip-flops
Q: What can cause the asynchronous counter to become too slow for carrying out the
counting?
A: number of flip-flo ps are increased
Q: How long is the propagation delay of each flip-flop?
A: 20 nsec
Q: When the number of flip-flops is increased, the delay accumulates with the
number of
A:
delay ripples through the flip-flops
Q: What can cause the asynchronous counter to become too slow for carrying out
counting?
A: number of flip-flo ps are increased
Q: How long is the propagation delay of each flip-flop?
A: 20 nsec
Q: What happens to the delay when the number of flip-flops is increased?
A: ripples through the flip-flops and becomes qu ite appreciable
Q: How long is the propagation delay of each flip-flop?
A: 20 nsec
Q: How long is the propagation delay of each flip-flop?
A: 20 nsec
Q: What can cause the asynchronous counter to become too slow for carrying out
counting?
A: number of flip-flo ps are increased
Q: How many unique states will a Mod-16 counter have?
A: 16
Q: How many unique states does a Mod-16 counter have?
A: 16
Q: How many flip-flops are needed to design a Mod-16 counter?
A: 4
Q: How many unique states does the Mod-16 counter have?
A: 16
Q: How many unique states does a Mod-16 counter need?
A: 16
Q: How many flip-flops are needed to design this circuit?
A: 4
Q: How many unique states does a Mod-16 counter need to have?
A: 16
Q: How many flip-flops are required to design a Mod-16 counter?
A: 4
Q: How many flip-flops are needed to design a Mod-16 counter circuit?
A: 4
Q: How many flip-flops are needed to design this circuit?
A: 4
Q: How many possible states can a mod-8 counter have?
A: 8
Q: How many states can a mod-8 counter have?
A: 8
Q: How many states can a mod-8 asynchronous counter have?
A: 8
Q: What is another name for a mod-8 asynchronous counter?
A: divide-by-8 counter
Q: How many possible states can a mod-8 asynchronous counter have?
A: 8
Q: What type of counter can be designed using 3 T flip-flops?
A: mod-8
Q: What is another name for a mod-8 counter?
A: divide-by-8 counter
Q: What type of counter can be designed using 3 T flip-flops?
A: mod-8
Q: What is another name for a mod-8 asynchronous counter?
A: divide-by-8 counter
Q: What type of counter can be designed using 3 T flip-flops?
A: mod-8
Q: Where are the waveforms at the input and outputs of all the flip-flops
A:
figure 10.8
Q: What are the waveforms at the input and outputs of all the flip-flops
A:
figure 10.8
Q: The waveforms at the input and outputs of all the flip-flops are shown
A:
figure 10.8
Q: Where are the waveforms at the input and output of all the flip-flops shown
A:
figure 10.8
Q: What are the waveforms at the input and output of all the flip-flops shown
A:
figure 10.8
Q: In the up counter, the external clock is applied to the clock terminal of the
first flip-
A:
figure 10.7
Q: What do the waveforms at the input and outputs of all the flip-flops
A:
figure 10.8
Q: The waveforms at the input and output of all the flip-flops are shown in
A:
figure 10.7
Q: How are the waveforms at the input and outputs of all the flip-flops
A:
figure 10.8
Q: Where are the waveforms at the input and outputs of all the flip flops
A:
figure 10.8
Q: What are the out put waveforms of the asynchronous Mod-4 down counter shown in
A: figure 10.9(b), which are in the down sequ ence
Q: What are the out put waveforms of the asynchronous mod-4 down counter shown in
A: figure 10.9(b), which are in the down sequ ence
Q: How many T flip-flops does the asynchronous mod-16 down counter need?
A: 4
Q: How many states does the asynchronous mod-16 down counter count in?
A: 16
Q: How many states does the asynchronous mod-16 down counter have?
A: 16
Q: What is the ram of the asynchronous Mod-4 down counter?
A: out put waveforms
Q: How many distinct states does the asynchronous mod-16 down counter count in?
A: 16
Q: How many states does the asynchronous mod-16 down counter count in the down
sequence having?
A: 16
Q: How many states does the asynchronous mod-16 down counter count in?
A: 16
Q: What is the ram of the asynchronous Mod-4 down counter?
A: out put waveforms
Q: What is the circuit for a mod-16 up / down asynchronous counter?
A: Figure 10.13
Q: What is the name of the circuit for a mod-16 up / down asynchronous
A: Figure 10.13
Q: What is the circuit for a mod-16 up / down asynchronous counter shown in
A: Figure 10.13
Q: What are AND-OR control gates used for connecting the Q’s and Q’s output
A:
stage to the input of the next stage
Q: What can a mod-16 up / down counter do?
A: A counter can work both as Up counter and down cou nter
Q: What is a mod-16 up / down counter?
A: Up counter and down cou nter
Q: What are AND-OR control gates used for connecting?
A: Q ’s and Q’s outputs
Q: What is a mod-16 up / down counter?
A: Up counter and down cou nter
Q: What is a mod-16 up / down counter?
A: Up counter and down cou nter
Q: What can a mod-16 up / down counter do?
A: A counter can work both as Up counter and down cou nter
Q: What are the waveforms taken at Q's outputs for Up and down counter?
A: Figures 10.14 (a) and (b)
Q: How many states can an Asynchronous Decade Counter have?
A: 10
Q: How many states can a decade counter have?
A: 10
Q: What shows the waveforms taken at Q's outputs for Up and down counter
respectively
A: Figures 10.14 (a) and (b)
Q: How many states can the decade counter have?
A: 10
Q: What shows the waveforms taken at Q's outputs for Up and down counter?
A: Figures 10.14 (a) and (b)
Q: What are the waveforms taken at Q's outputs for Up and down counter respectively
A: Figures 10.14 (a) and (b)
Q: What are the waveforms taken at Q’s outputs for Up and down counter?
A: Figures 10.14 (a) and (b)
Q: What are the waveforms taken at Q's outputs for Up and down counters
A: Figures 10.14 (a) and (b)
Q: What shows the waveforms taken at Q’s outputs for Up and down counter
respectively
A: Figures 10.14 (a) and (b)
Q: What should be generated when Q 3 Q2 Q1 Q0 becomes 1 0 1
A: a low pulse
Q: When should a low pulse be generated when Q 3 Q2 Q1 Q0 becomes 1
A: Q 3 Q1 = 11
Q: What happens when Q 3 Q2 Q1 Q0 becomes 1 0 1 0?
A: a low pulse should be generate d
Q: What should be generated when Q3 Q2 Q1 Q0 becomes 1 0 1
A: a low pulse
Q: What happens when Q3 Q2 Q1 Q0 becomes 1 0 1 0?
A: a low pulse should be generate d when Q 3 Q1 = 11
Q: What is the logic diagram of the ripple decade counter?
A: Figure 10.15
Q: When Q3 Q2 Q1 Q0 becomes 1 0 1 0, what should
A: a low pulse should be generate d when Q 3 Q1 = 11
Q: When Q3 Q2 Q1 Q0 becomes 1 0 1 0, a
A:
Q: When Q 3 Q2 Q1 Q0 becomes 1 0 1 0, what should
A: a low pulse should be generate d
Q: When Q 3 Q2 Q1 Q0 becomes 1 0 1 0, a
A:
Q: How many flip-flops are needed to design a binar y counter?
A: Four T flip-flops
Q: How many T flip-flops are needed to design a binar y counter?
A: Four
Q: What can be designed by using JK, D or T type flip-flops?
A: Synchronous counters
Q: How many flip flops are needed to design a binar y counter?
A: Four T flip-flops
Q: How many T flip-flops are needed to design a binary counter?
A: Four
Q: How many flip-flops are needed to design a binary counter?
A: Four
Q: How many flip-flops are needed to design a binary counter?
A: Four
Q: How many T flip-flops are needed to design a binary counter?
A: Four
Q: How many flip-flops are needed to design a binary counter?
A: Four
Q: How many T flip-flops are needed to design a binary counter?
A: Four
Q: How many flip-flops are needed for the design of the counter?
A: four
Q: How many flip-flops are needed for the design of the counter?
A: four
Q: For the design of this counter it needs four flip-flops.
A:
Q: For the design of this counter it needs four flip-flops.
A:
Q: How many flip-flops are needed for the design of this counter?
A: four
Q: How many flip-flops are needed for the design of the counter?
A: four
Q: How many flip-flops are needed for the design of the counter?
A: four
Q: How many flip-flops are needed for the design of this counter?
A: four
Q: How many flip-flops are needed for the design of this counter?
A: four
Q: For the design of this counter it needs four flip-flops.
A:
Q: How many J K flip-flops are used in a synchronous binary counter?
A: 4
Q: How many J and K flip-flops are used in a synchronous binary counter?
A: 4
Q: How many J K flip-flops are used in synchronous binary counters?
A: 4
Q: How many J K flip-flops are shown in figure 10.18?
A: 4
Q: How many flip-flops are used in a synchronous binary counter?
A: 4
Q: How many J and K flip-flops are shown in figure 10.18?
A: 4
Q: How many J K flip-flops are used in a synchronous counter?
A: 4
Q: How many J K flip-flops are used in synchronous binary counter?
A: 4
Q: How many flip-flops are used in a synchronous binary counter?
A: 4
Q: How many J K flip-flops are shown in figure 10.18?
A: 4
Q: Where is the excitation table for R S, D, J K and T type f
A: table
10.7
Q: What is formed for each flip-flop input in terms of flip-flop outputs as the
A: Karnaugh map
Q: What is required to design a counter of Mod – N?
A: flip-flops
Q: What is formed for each flip-flop input in terms of flip-flop outputs?
A: Karnaugh map
Q: What is required to design a counter of Mod – N?
A: flip-flops
Q: What is formed for each flip-flop input in terms of flip-flop outputs as input
A: Karnaugh map
Q: What is the required counter circuit obtained by connecting the flip-flops and
other gates?
A: expressions obtained abo ve
Q: What is the required counter circuit obtained by connecting the flip-flops and
other gates as per
A: expressions obtained abo ve
Q: What is formed for each flip-flop input in terms of the flip-flop outputs as
A: Karnaugh map
Q: What is required to design a counter of Mod - N?
A: flip-flops
Q: What is another name for the divide-by-ten counter?
A: Mod-10
Q: What is another name for a decade counter?
A: Mod-10
Q: How many flip-flops are needed for the design of a synchronous Mod-N
A: four
Q: How many flip-flops are needed for the design of the synchronous Mod-N counter
A: four
Q: What is another name for a decade counter?
A: Mod-10
Q: What is another name for a decade counter?
A: Mod-10
Q: What is another name for a decade counter?
A: Mod-10
Q: What is another name for a decade counter?
A: Mod-10
Q: What is another name for a decade counter?
A: Mod-10
Q: What is another name for a decade counter?
A: Mod-10
Q: Where are the waveforms at the outputs of all the flip-flops shown?
A: Figure 10.21
Q: What may be taken as: 031QQK= Since it become equal to J
A: The expression for K 1
Q: Where can the sequence of the counter be verified from the wa veforms?
A: At the trailing edge of the clock pulse Q 0 output toggles
Q: Where can the sequence of the counter be verified?
A: from the wa veforms
Q: Where can the sequence of the counter be verified from the wa veforms?
A: At the trailing edge of the clock pulse Q 0 output toggles
Q: Where can the sequence of the counter be verified?
A: from the wa veforms
Q: What can be verified from the wa veforms?
A: The
sequence of the counter
Q: Where can the sequence of the counter be verified from?
A: wa veforms
Q: What is given as 012 3 QQQJ?
A: les of J K flip-flops
Q: Where are the waveforms at the outputs of all the flip-flops shown in
A: Figure 10.21
Q: How many flip-flops are needed to design a synchronous Mod-12 up counter?
A: four
Q: What is used to design a synchronous Mod-12 up counter?
A: T flip-flops
Q: How many fl ip-flops does a synchronous Mod-12 up
A: four
Q: How many flip-flops are needed for the design of the Mod-12 up counter?
A: four
Q: How many fl ip-flops are needed to design a synchronous
A: four
Q: What is used to design a synchronous Mod-12 up counter?
A: T flip-flops
Q: How many flip-flops are needed to design a Mod-12 up counter?
A: four
Q: How many flip-flops does a synchronous Mod-12 up counter need?
A: four
Q: How many flip-flops does a synchronous Mod-12 up counter need to design?
A: four
Q: How many flip-flops are needed to design a Mod-12 up counter?
A: four
Q: What is the logic circuit diagram of synchronous Mod.-12 c ounter?
A: figure 10.23
Q: The logic circuit diagram of synchronous Mod.-12 c ounter is given in figure
A: 10.23
Q: Where is the logic circuit diagram of synchronous Mod.-12 c ounter given?
A: figure 10.23
Q: What is the logic circuit diagram of synchronous Mod.-12 c ounter given in
A: figure 10.23
Q: What can be obtained directly from the table 10.9?
A: 0
Q: What is the logic circuit diagram for synchronous Mod.-12 c ounter?
A: figure 10.23
Q: Where can one obtain the logic circuit diagram of synchronous Mod.-12 c ounter
A: figure 10.23
Q: Where is the logic circuit diagram of synchronous Mod.-12 c ounter shown?
A: figure 10.23
Q: The logic circuit diagram of synchronous Mod.-12 c ounter is shown in figure
A: 10.23
Q: What can be obtained directly from the table 10.9?
A: 0
Q: How many J K flip-flops are required for the design of a decade counter?
A: four
Q: How many J K flip-flops are required for the design of a synchronous Mod
A: four
Q: How many JK flip-flops are required for the design of a decade counter?
A: four
Q: How many J K flip-flops are required for a synchronous Mod-10 counter?
A: four
Q: How many JK flip-flops are required for the design of a synchronous Mod
A: four
Q: How many J K flip-flops are required to design a synchronous Mod-10 counter
A: four
Q: How many JK flip-flops are required for a synchronous Mod-10 counter?
A: four
Q: How many JK flip-flops are required to design a synchronous Mod-10 counter
A: four
Q: How many J K flip-flops are required to design a decade counter?
A: four
Q: How many J K flip-flops are required for a synchronous Mod-10 counter to
A: four
Q: What is another class of synchronous counters called?
A: contro lled counters
Q: What is another class of synchronous counters called?
A: contro lled counters
Q: What is another class of synchronous counters called?
A: contro lled counters
Q: What is another class of synchronous counters called?
A: contro lled counters
Q: What is another class of synchronous counters called?
A: contro lled counters
Q: What is another class of synchronous counters called?
A: contro lled counters
Q: What is another class of synchronous counters called?
A: contro lled counters
Q: What is another class of synchronous counters called?
A: contro lled counters
Q: What is another class of synchronous counters called?
A: contro lled counters
Q: What is another class of synchronous counters called?
A: contro lled counters
Q: How many J K flip-flo ps are required for the design of the
A: three
Q: How many flip-flops are required for the design of the counter in sequence wise?
A: three
Q: How many flip-flo ps are required for the design of the counter in
A: three
Q: How many JK flip-flo ps are required for the design of the
A: three
Q: When the control input S is 0 or 1, the counter works as a mod-4 counter
A:
Q: When the control input S is 0 or 1 the counter works as a mod-4 counter
A:
Q: When the control input S is 0 or 1 the counter works as a mod-8 counter
A:
Q: How many flip-flo ps are required for the design of this counter?
A: three
Q: When the control input S is 0 or 1, the counter works as a mod-8 counter
A:
Q: How many J K flip-flo ps are required for the design of this
A: three
Q: What shows the waveforms at the outputs of all the flip-flops?
A: Figure 10.32
Q: What shows the waveforms at the outputs of all the flip flops?
A: Figure 10.32
Q: What is used to design a synchronous Mod-8 up down counter?
A: T flip-
flops
Q: How many flip-flops are used to design a synchronous Mod-8 up down counter
A: T flip-
flops
Q: When the counter is reset and the control input S is zero, it will follow the
sequence of
A: mod – 4
Q: When the counter is reset and the control input S is zero, the counter will
follow the sequence
A: mod – 4
Q: What is used to design a synchronous Mod-8 up down counter?
A: T flip-
flops
Q: What is used to design a synchronous Mod-8 up down counter?
A: T flip-
flops
Q: What is used to design a synchronous Mod-8 up down counter?
A: T flip-
flops
Q: What is used to design a synchronous Mod-8 up down counter?
A: T flip-
flops
Q: How many flip-flops are required for the design of the counter?
A: three
Q: How many flip-flops are required for the design of this counter?
A: three
Q: How many T flip-flip-ps are required for the design of this counter?
A: three
Q: How many T flip-flo ps are required for the design of this counter
A: three
Q: How many flip-flip-ps are required for the design of the counter?
A: three
Q: How many T flip-flops are required for the design of this counter?
A: three
Q: How many flip-flops are required for the design of the counter?
A: three
Q: How many T flip-flo ps are required for the design of the counter
A: three
Q: How many flip-flops are required for the design of this counter?
A: three
Q: How many T flip-flops are required for the design of the counter?
A: three
Q: What shows the waveforms at the outputs of all the flip-flops?
A: Figure 10.36
Q: What figure shows the waveforms at the outputs of all the flip-flops?
A: Figure 10.36
Q: What shows the waveforms at the outputs of all the flip flops?
A: Figure 10.36
Q: What figure shows the waveforms at the outputs of all the flip flops?
A: Figure 10.36
Q: The logic circuit diagram of this synchronous count er is shown in figure 10.35.
Figure
A:
Q: What is the logic circuit diagram of this synchronous count er shown in?
A: figure 10.35
Q: Where is the logic circuit diagram of this synchronous count er shown?
A: figure 10.35
Q: What is the logic circuit diagram of this synchronous count er shown in?
A: figure 10.35
Q: Where is the logic circuit diagram of the synchronous count er shown?
A: figure 10.35
Q: Where is the logic circuit diagram of this synchronous count er shown?
A: figure 10.35
Q: How many T flips are required for the design of a mod -7 counter?
A: Three
Q: The procedure for designing the count er is the same as discussed above in this
chapter.
A:
asynchronous
Q: How many T flips are required for the design of mod -7 counter?
A: Three
Q: What is to be generated which gives the periodic pulse train of 0 111101 and
then
A: a contro l signal
Q: How many T flips are required for the design of mod -7 counter?
A: Three
Q: Where is the block diagram for generating the control signal shown?
A: figure 10.37
Q: How many T flips are required for the design of mod-7 counter?
A: Three
Q: How many T flips are required for the design of the mod -7 counter?
A: Three
Q: How many T flips are required for the design of a mod-7 counter?
A: Three
Q: How many T flips are required for the design of the mod -7 counter?
A: Three
Q: What are the expressions for inputs of T flip-flops obtained from?
A: K –
maps
Q: What are the expressions for inputs of T flip-flops given as?
A:
Q: How are the expressions for inputs of T flip-flops obtained?
A: from the K –
maps
Q: In figure 10.39, the expressions for inputs of T flip-flops are given
A: K –
maps
Q: What is the Boolean expression for the output S of decoder obtained using?
A: K-map
Q: What is the Boolean expression for the output S of decoder?
A:
the output S of decoder is obtained using the K-map
Q: How are the expressions for inputs of T flip-flops obtained?
A: from the K –
maps
Q: What are the expressions for inputs of T flip-flops obtained from?
A: K –
maps
Q: What are the expressions for inputs of T flip flops obtained from?
A: K –
maps
Q: What are the expressions for inputs of T flip-flops obtained from?
A: K –
maps
Q: How many master slave flip-flops are in IC 7490 Decade Counter?
A: four
Q: How many master slave flip-flops are in the IC 7490 Decade Counter
A: four
Q: How many master slave flip-flops are included in the IC 7490 Decade
A: four
Q: How many master slave flip-flops are included in IC 7490 Decade Counter
A: four
Q: How many master slave flip-flops are inside the IC 7490 Decade Counter
A: four
Q: How many master slave flip-flops does the IC 7490 Decade Counter consist
A: four
Q: How many master slave flip-flops are present in the IC 7490 Decade
A: four
Q: How many master slave flip-flops are contained in the IC 7490 Decade
A: four
Q: What is IC 7490 Decade Counter?
A: divide-by-two and divide-by -five
Q: How many master slave flip-flops does the IC 7490 Decade Counter have
A: four
Q: What is used as a binary element for the divide-by-two function?
A: Flip-flop
Q: What is used as a binary element for the divide-by-two function?
A: Flip-flop
Q: How many bits is the IC 7492 Divide-by-twelve Counter?
A: 4
Q: What is the IC 7492 Divide-by-twelve Counter consisting of
A: a 4-bit binary counter
Q: What is the IC 7492 Divide-by-twelve Counter?
A: a 4-bit binary counter
Q: What is used as a binary element for divide-by-two function?
A: Flip-flop
Q: What is used as a binary element for the divide-by-two function?
A: Flip-flop
Q: What is used as a binary element for the divide-by-two function?
A: Flip-flop
Q: How many bits does the IC 7492 divide-by-twelve counter consist
A: 4
Q: What is used as a binary element for the divide-by-two function?
A: Flip-flop
Q: What is provided to inhibit the count inputs and return the four flip-flop
outputs to
A: A
gated direct reset line
Q: What is provided which inhibits the count inputs and returns the four flip-flop
outputs
A: A
gated direct reset line
Q: What is provided to inhibit the count inputs and returns the four flip-flop
outputs to
A: A
gated direct reset line
Q: When used as divide-by-twelve counter, the input count pulses are applied
A:
input CLK
Q: What is provided to inhibit the count inputs and simultaneously returns the four
flip-flop outputs
A: A
gated direct reset line
Q: When used as divide-by-twelve counter, output Q 0 must be external
A:
(i
Q: What can be operated into two independent count modes?
A: the counter
Q: What can be operated into two independent count modes?
A: the counter
Q: When used as divide-by-twelve counter, output Q must be externally connected
A:
(i
Q: What is provided which inhibits the count inputs and returns the four flip flop
outputs
A: A
gated direct reset line
Q: What is a 4-bit binary counter consisting of fo ur master slave flip-flop
A:
IC 7493 Divide-by-sixteen Counter
Q: What is the logic diagram of the IC 7493 Divide-by-sixteen
A:
figure 10.45(a)
Q: What is the logic diagram of the IC shown in figure 10.45(a)?
A: pin diagram and logic symb ol
Q: The logic diagram of the IC is given in figure 10.45(a) and 10.45
A:
Q: The logic diagram of the IC is given in figure 10.45(a) and its pin
A:
Q: How many flip-flops are in the IC 7493 Divide-by-s
A: four
Q: The logic diagram of the IC is given in figure 10.45(a) with its pin
A:
Q: What is the logic diagram of the IC shown in figure 10.45(a) and 10.
A: pin diagram and logic symb ol
Q: How many flip-flops are in the IC 7493?
A: four
Q: What is the logic diagram of the IC shown in figure 10.45?
A: pin diagram
Q: What is the logic pin diagram of IC 74160 Synchronous Decade Counter with
A: figure 10.46
Q: What is the logic pin diagram of the IC shown in figure 10.46?
A: Synchronous Decade Counter with Clear
Q: IC 74160 Synchronous Decade Counter with Clear: The logic pin diagram of
A:
Q: What is IC 74160 Synchronous Decade Counter with Clear?
A: logic pin diagram
Q: What is the logic pin diagram of the IC shown in figure 10.46?
A: Synchronous Decade Counter with Clear
Q: What is the logic pin diagram of the IC?
A: figure 10.46
Q: The logic pin diagram of the IC is shown in figure 10.46 . The input count
A:
IC 74160
Q: The logic pin diagram of this IC is shown in figure 10.46. The input count pulse
A:
IC 74160
Q: What is the logic pin diagram of this IC shown in?
A: figure 10.46
Q: What is the logic pin diagram of the IC shown in figure 10.46?
A: Synchronous Decade Counter with Clear
Q: What is the logic pin diagram of IC 74163 Synchronous Four-bit Binary
A: Fig. 10.46
Q: The logic pin diagram of the IC is shown in figure 10.47. The logic pin diagram
A:
Q: What is the logic pin diagram of the IC 74163 Synchronous Four-bit
A: Fig. 10.46
Q: What is the logic pin diagram of the IC shown in figure 10.47?
A: Synchronous Four-bit Binary Counter
Q: The logic pin diagram of IC 74163 is shown in figure 10.47. The logic
A:
Q: What is the logic pin diagram of the IC shown in figure 10.47?
A: Synchronous Four-bit Binary Counter
Q: The logic pin diagram of this IC is shown in figure 10.47. The logic pin diagram
A:
Q: What is the logic pin diagram of the IC shown in figure 10.47?
A: Synchronous Four-bit Binary Counter
Q: The logic pin diagram of the IC is shown in figure 10.46. The logic pin diagram
A:
Q: What is the logic pin diagram of the IC shown in figure 10.47?
A: Synchronous Four-bit Binary Counter
Q: What is the IC 74190 Synchronous UP/Down Decade Counter
A: logic pin
diagram
Q: What is the logic pin diagram of the IC 74190?
A: up direction or down ward direction
Q: What is the logic pin diagram of the IC 74190?
A: up direction or down ward direction
Q: What is the IC 74190 Synchronous Up/Down Decade Counter?
A: logic pin
diagram
Q: What is the logic pin diagram of the IC 74190?
A: up direction or down ward direction
Q: What is the logic pin diagram of the IC 74190?
A: up direction or down ward direction
Q: What is the name of the logic pin diagram of the IC 74190?
A: Figure 10.48
Q: What is the logic pin diagram of the IC 74190 that can work in either up
A: up direction or down ward direction
Q: What is the IC 74190 Synchronous Up/Down Decade Counter shown
A: logic pin
diagram
Q: What is the IC 74190 Synchronous UP/Down Decade counter
A: logic pin
diagram
Q: What is one that can count and display physical counts?
A: Event Counter
Q: What is one that can count and display physical counts?
A: Event Counter
Q: What is one which can count and display physical counts?
A: Event Counter
Q: What is one which can count and display physical counts?
A: Event Counter
Q: What is one that can count and display t he physical counts?
A: Event Counter
Q: What is one that can count and display the physical counts?
A: Event Counter
Q: What is one which can count and display t he physical counts?
A: Event Counter
Q: What is one which can count and display the physical counts?
A: Event Counter
Q: What is one that can count and display the physical counts?
A: Event Counter
Q: What is one that can count and display t he physical counts?
A: Event Counter
Q: The IC9 (7413) produces a positive going pulse whenever a beam of
A:
Q: What device produces a positive going pulse whenever a beam of light is
interrupted by the
A: The IC9
Q: What does the IC9 (7413) produce when a beam of light is interrupted
A: a positive going pulse
Q: What is an electronic instr ument used to measure the frequency of a
A: Digital Frequency Meter
The digital frequency meter
Q: What does the IC9 (7413) produce whenever a beam of light is interrupted
A: a positive going pulse
Q: What device produces a positive going pulse whenever a beam of light is
interrupted by ent
A: The IC9 (7413)
Q: When a beam of light is interrupted by the entrants in the hall, the
A:
Q: What does the IC9 produce when a beam of light is interrupted by the ent
A: a positive going pulse
Q: What device produces a positive going pulse whenever a beam of light is
interrupted?
A: The IC9 (7413)
Q: When a beam of light is interrupted by the entrants in the hall, what
A: The IC9 (7413) produces a positive going pulse
Q: What controls how long the pulse train is allowed to pass through the AND gate
to the digital counter
A: The sample pulse
Q: What controls for how long the pulse train is allowed to pass through the AND
gate to the digital
A: sample pulse
Q: How long is the pulse train allowed to pass through the AND gate to the digital
counter?
A: 1 secon d
Q: What controls how long a pulse train is allowed to pass through the AND gate to
the digital
A: sample pulse
Q: What controls how long the pulse train can pass through the AND gate to the
digital counter?
A: sample pulse
Q: What controls the length of the pulse train allowed to pass through the AND gate
to the digital counter
A: The sample pulse
Q: What controls how long the pulse train passes through the AND gate to the
digital counter?
A: sample pulse
Q: What controls for how long the pulse train is allowed to pass through the AND
gate?
A: sample pulse
Q: How long does the pulse train pass through the AND gate to the digital counter?
A: 1 secon d
Q: What controls for how long the pulse train is allowed to pass through the AND
gate?
A: sample pulse
Q: The accuracy of the counter will depend on the accuracy of the width of the
sample
A: Fig. 10.50
Q: What is applied to reset the counter?
A: A positive going pulse
Q: What is applied to reset the counter?
A: A positive going pulse
Q: What is applied to reset the counter?
A: A positive going pulse
Q: Where is the sample pulse of standard time per iod obtained?
A: a high frequency quartz crystal oscillator
Q: What is applied to reset the counter?
A: A positive going pulse
Q: What is applied to res et the counter?
A: A positive going pulse
Q: Where is the sample pulse of standard time per iod obtained from?
A: a high frequency quartz crystal oscillator
Q: Where is the sample pulse of standard time per iod obtained from?
A: a high frequency quartz crystal oscillator
Q: What is applied to res et the counter?
A: A positive going pulse
Q: The frequency to be measured is applied to one input of Schmitt trigger NAND
gate 3
A: counter and decoding circuits
Q: What is the frequency applied to one input of Schmitt trigger NAND gate 3?
A: The frequency to be measured
Q: What frequency is applied to one input of Schmitt trigger NAND gate 3?
A: The frequency to be measured
Q: What is controlled by a square wave (12 Hz sample pulse) connected to the
A: The gate period
Q: What is controlled by a square wave?
A: The gate period
Q: What frequency is applied to one input of Schmitt trigger NAND gate 3?
A: The frequency to be measured
Q: The frequency to be measured is applied to one input of Schmitt trigger NAND
gate 3.
A: counter and decoding circuits
Q: What is controlled by a square wave?
A: The gate period
Q: What frequency is applied to one input of Schmitt trigger NAND gate 3?
A: The frequency to be measured
Q: What is controlled by a square wave (12 Hz sample pulse)?
A: The gate period
Q: What is displayed in real time in the digital form?
A: Hours, minutes and seconds
Q: What is displayed in the digital form of the clock?
A: real time
Q: How is real time displayed in the digital form?
A: It disp lays Hours, minutes and seconds
Q: What is displayed in the digital form of the clock?
A: real time
Q: How is the real time displayed in the digital form?
A: It disp lays Hours, minutes and seconds
Q: How is the real time displayed in the digital form?
A: It disp lays Hours, minutes and seconds
Q: What is displayed in real time in the digital form?
A: Hours, minutes and seconds
Q: What is displayed in the digital form in the digital form?
A: real time
Q: How is the real time displayed in the digital form?
A: It disp lays Hours, minutes and seconds
Q: What is displayed in the digital form in the digital form?
A: real time
Q: What is shown in figure 10.53?
A: complete circuit diagram of digital clock
Q: What is shown in figure 10.53?
A: complete circuit diagram of digital clock
Q: How many hours does the digital clock use?
A: twe nty hours
Q: Where is the complete circuit diagram of a digital clock shown in figure 10.53?
A:
Q: The complete circuit diagram of a digital clock is shown in figure 10.53. The
decade counter
A: IC1
is wired in divide-by-ten mode
Q: What is shown in figure 10.53?
A: complete circuit diagram of digital clock
Q: What is the complete circuit diagram of a digital clock shown in figure 10.53?
A: twe nty hours
Q: The complete circuit diagram of digital clock is shown in figure 10.53. The
decade counter IC
A: IC1
is wired in divide-by-ten mode
Q: Where is the complete circuit diagram of a digital clock shown?
A: figure
10.53
Q: What is shown in figure 10.53?
A: complete circuit diagram of digital clock
Q: The IC 5 and IC 6 are wired in divide-by-twenty
A:
in divide by ten mode
Q: How are the IC 5 and IC 6 wired?
A: divide-by-twenty fou r counter
Q: What mode are the IC5 and IC6 wired in?
A: divide by ten
Q: What mode are the IC5 and IC6 wired in?
A: divide by ten
Q: What mode are the IC 5 and IC 6 wired in?
A: divide by ten
Q: How are the IC5 and IC6 wired?
A: divide-by-twenty fou r counter
Q: What mode are the IC 5 and IC 6 wired in?
A: divide by ten
Q: How are the IC 5 and IC 6 wired?
A: divide-by-twenty fou r counter
Q: What mode are the IC5 and IC6 wired in?
A: divide by ten
Q: What mode are the IC5 and IC6 wired in?
A: divide by ten
Q: What is connected to the data select terminal s of the multiplexer?
A: counter circuits
Q: How is data i n binary from 000 to 111 on every clock pulse?
A: mod-8 counter
Q: What is connected to the data select terminals of the multiplexer?
A: counter circuits
Q: What is connected to the data select terminals of the multiplexer?
A: counter circuits
Q: How is the data i n binary from 000 to 111 on every clock pulse?
A: mod-8 counter
Q: What is connected to the data select terminal s of a multiplexer?
A: counter circuits
Q: What is connected to the data select terminal s of the multiplexer?
A: counter circuits
Q: What is connected to the data select terminal s of the multiplexer to a counter
A: counter circuits
Q: What is connected to the data select terminals of the multiplexer?
A: counter circuits
Q: What is connected to a counter circuits?
A: The data select terminal s of the multiplexer
Q: What is asynchronous binary counter?
A: Mod-16
Q: What is the circuit of asynchronous binary counter?
A: Mod-16
Q: What is the name of the circuit of asynchronous binary counter?
A: Mod-16
Q: What is the name of the asynchronous binary counter?
A: Mod-16
Q: What is a synchronous binary counter?
A: Mod-16
Q: What is the circuit of the asynchronous binary counter?
A: Mod-16
Q: What is Mod-16?
A: asynchronous binary counter
Q: What is a synchronous binary counter?
A: Mod-16
Q: What is the circuit of asynchronous binary counter called?
A: Mod-16
Q: What is the name of the circuit of asynchronous binary counter?
A: Mod-16
Q: What is the counting made in 2421 code?
A:
17
Q: What are the output states and wave forms of each flip-flop?
A: p- flops
Q: What are the output states and wave forms of each flip-flop?
A: p- flops
Q: How many flip-flops are used in the problem 12?
A: T
Q: What is a synchronous decade counter?
A: Mod-16
Q: What is the design of a synchronous decade counter using?
A: R S flip-flops
Q: What is a synchronous decade counter using?
A: R S flip-flops
Q: What flip-flops are used to design a synchronous decade counter?
A: R S
Q: What is the design of a synchronous decade counter?
A:
17
Q: What flip-flops are used to design a synchronous decade counter?
A: R S
Q: What can count Mod-5 if the control input is 0?
A: Design a controlled counter
Q: What do you use to realize the circuit?
A: T
flip-flops
Q: What can count Mod-5 if the control input is 0 and count Mod-8 if
A: Design a controlled counter
Q: What can count Mod-5 if the control input is 0 and Mod-8 if the
A: Design a controlled counter
Q: How do you show the output states and wave forms of each flip-flop?
A: Use T
flip-flops to realize the circuit
Q: What do you use to realize the circuit?
A: T
flip-flops
Q: How do you design a synchronous Mod-8 up/down counter?
A: use J K flip-flops
Q: How do you design a synchronous Mod-5 up/down counter?
A: use J K flip-flops
Q: What are the output states and wave forms of each flip-flop?
A:
26
Q: How do you show the output states and wave forms of each flip-flop?
A: Use T
flip-flops to realize the circuit
Q: What is used to convert the parall el data to serial data?
A: a counter
Q: What is used to generate the fo llowing pulse train 110100 and repeats?
A: a counter
Q: What is the design principle of digital frequency m eter?
A: 36
Q: How does a synchronous Mod-6 up/down counter work?
A:
32
Q: How do you design a synchronous Mod-6 up/down counter?
A:
32
Q: What does a synchronous Mod-6 up/down counter use to realize the circuit?
A: J K flip-flops
Q: What does a synchronous Mod-6 up/down counter use?
A: J K flip-flops
Q: What is a design principle of digital frequency m eter?
A: 36
Q: What is used to convert parall el data to serial data?
A: a counter
Q: What is used to convert the parall el data to serial data?
A: a counter
Q: What is a transducer used to convert the physical quantity to electrical
quantity?
A: thermocouple or thermister
Q: What is an analog to digital converter?
A: digital
form
Q: What is a transducer used to convert a physical quantity to electrical quantity?
A: thermocouple or thermister
Q: What is an analog to digital converter?
A: digital
form
Q: What is the name of a transducer used to convert the physical quantity to
electrical quantity
A: thermocouple or thermister
Q: What is an analog to digital converter?
A: digital
form
Q: What is the name of a transducer used to convert a physical quantity to
electrical
A: thermocouple or thermister
Q: What is a transducer used to convert the physical quantity to electrical
quantity?
A: thermocouple or thermister
Q: What is an analog to digital converter?
A: digital
form
Q: What is used to convert a physical quantity to electrical quantity?
A: a transducer
Q: How many types of A/D and D/A converters will be discussed in this chapter
A: various
Q: What is a resistive divider D/A converter?
A: The converter which comprises the resistive divid er network
Q: How many types of A/D and D/A converters will be discussed?
A: various
Q: What is a resistive divider D/A converter known as?
A: Binary Ladder Network
Q: What is an example of a resistive divider D/A converter?
A: Binary Ladder Network
Q: What is the name of the resistive divider D/A converter?
A:
Resistive divider D/A converter
Q: What is another name for Resistive Divider D/A converter?
A: Binary Ladder Network
Q: How many types of A/D and D/A converters are discussed in this chapter?
A: various
Q: What is another name for Resistive Divider Network?
A: weighted resistor netw ork
Q: How many types of A/D and D/A converters will be discussed?
A: various
Q: What consists of a resistive divider network?
A: resistive divider D/A conver ter
Q: The resistive divider network changes each of the n-bit digital level into its
equivalent
A: analog
output
Q: The resistive divider D/A converter consists of a resistive
A: divider network
Q: What does the resistive divider network change each of the n-bit digital level
into
A: its equivalent analog
output
Q: What is the resistive divider D/A converter consists of?
A: a resistive
divider network
Q: What consists of a resistive divider network?
A: resistive divider D/A conver ter
Q: The resistive divider D/A converter consists of what?
A: a resistive
divider network
Q: What is a resistive divider D/A converter composed of?
A: resistive
divider network
Q: What is the resistive divider D/A converter consists of?
A: a resistive
divider network
Q: What is the resistive divider D/A converter composed of?
A: a resistive
divider network
Q: If V REF is assumed to be 15 volts in a 4 bit digital system
A: 1
volt
Q: In a four bit binary system there will be 16 possible input combinations in a
four bit
A:
15 2
122
41
Q: How many possible input combinations are there in a four bit binary system?
A: 16
Q: In a four bit binary system there will be 16 possible input combinations in
which the analog signal
A:
15 2
122
41
Q: In a four bit binary system there will be 16 different input combinations in a
four bit
A:
15 2
122
41
Q: How many possible input combinations are there in a four bit binary system?
A: 16
Q: If V REF is assumed to be 15 volts in a four bit digital system
A: 1
volt
Q: How many different input combinations are there in a four bit binary system?
A: 16
Q: In a four bit binary system, there will be 16 possible input combinations in
which the analog
A:
15 2
122
41
Q: In a four bit binary system, there will be 16 possible input combinations in a
four
A:
15 2
122
41
Q: What is used for converting di gital inputs to analog outputs?
A: Resistive divider network
Q: What network is used for converting di gital inputs to analog outputs?
A: Resistive divider network
Q: What is the network used for converting di gital inputs to analog outputs?
A: Resistive divider network
Q: What is used to convert di gital inputs to analog outputs?
A: Resistive divider network
Q: What is the network for 6 bit binary system shown in figure 11.2 known as?
A: weighted
network
Q: What is used for converting di gital inputs to analog outputs?
A: Resistive divider network
Q: What is used for converting di gital inputs to analog outputs?
A: Resistive divider network
Q: What network is used to convert di gital inputs to analog outputs?
A: Resistive divider network
Q: What is the network used to convert di gital inputs to analog outputs?
A: Resistive divider network
Q: What is used for conversion of di gital inputs to analog outputs?
A: Resistive divider network
Q: How can the voltage V L across the load resistance R L be obtained?
A: by using
Millman’s theorem
Q: What is the voltage V L across the load resistance R L?
A: 11.1
Q: What network is also known as the resisti ve divider network?
A:
++++++++++
=VVVVVV
Q: How can the voltage V L across the load resistance R L be obtained by using
Millman’
A: Millman’s theorem
Q: What network is also called as the resisti ve divider network?
A: VVVVVV
Q: How can the voltage V L across the load resistance R L be obtained by using
Millman'
A:
55
111111
Q: What is the voltage V L across the load resistance R L obtained by using?
A:
Millman’s theorem
Q: How can the voltage V L across the load resistance R L be obtained?
A: by using
Millman’s theorem
Q: How can the voltage V L across the load resistance R L be obtained?
A: by using
Millman’s theorem
Q: How can the voltage V L across the load resistance R L be obtained?
A: by using
Millman’s theorem
Q: What is another name for a resistive divider D/A converter?
A: binary weighted D/A
converter
Q: What is a D/A converter called?
A: binary weighted D/A
converter
Q: What is another name for a resistive divider D/A converter?
A: binary weighted D/A
converter
Q: What is another name for Resistive divider D/A converter?
A: binary weighted D/A
converter
Q: What is another name for resistive divider D/A converter?
A: binary weighted D/A
converter
Q: What is a D/A converter called?
A: binary weighted D/A
converter
Q: What is a D/A converter called?
A: binary weighted D/A
converter
Q: What is a D/A converter called?
A: binary weighted D/A
converter
Q: What is another name for Resistive divider D/A converter?
A: binary weighted D/A
converter
Q: What is a D/A converter called?
A: binary weighted D/A
converter
Q: What is a summing amplifier that adds the currents flowing in the resistor
A: network to develop a signal that is proportional to the digital input
Q: A summing amplifier that adds the currents flowing in the resistors of the
A:
00
11
Q: What type of amplifier adds the currents flowing in the resistors of the network
to
A: summing amplifier
Q: How many switches are connected to each bi nary bit?
A: one
Q: How many switches are connected to each bi nary bit?
A: one
Q: How many switches are connected to each bi nary bit?
A: one
Q: What is a summing amplifier that adds the currents flowing in resistors
A: network to develop a signal that is proportional to the digital input
Q: How many switches are connected to each bi nary bit?
A: one
Q: How many switches are connected to each bi nary bit?
A: one
Q: What does a summing amplifier add to the resistors of the network to develop
A: currents flowing
Q: The resistor Rf is the feed back resistance in the operational amplifier.
A:
Q: What is the resistor Rf?
A: the feed back resistance in the operational ampl ifier
Q: The voltage at the output of operational amplifier will be given by: IRVf out
A: .−
Q: When the bit is at logic 1, the corresponding transistor conducts and the
current flows through
A: voltages
Q: What is the resistor Rf?
A: the feed back resistance in the operational ampl ifier
Q: The resistor Rf is the feed back resistance in the operational amplifier.
A:
Q: What is the resistor Rf in the operational amplifier?
A: the feed back resistance
Q: What is the resistor Rf?
A: the feed back resistance in the operational ampl ifier
Q: What is the general equation of current I for 6 input bits?
A: 55
44
33
22
11
00
5222222
Q: The resistor Rf is the feed back resistance in the operational amplifier.
A:
Q: When the bit is at logic 0 the transistor goes into cutoff and no collector
current flows
A:
33
Q: How many volts is the output voltage for a 6 bit resistive divider network
A: 10 volts
Q: What is the output voltage for a 6 bit resistive divider ne t
A: 222222
Q: When the bit is at logic 0, the transistor goes into cutoff and no collector
current
A:
33
Q: What is the output voltage for a 6 bit resistive divider network?
A: 10 volts
Q: What is the output voltage for a 6 bit resistive divider network
A: 10 volts
Q: What is the output voltage for a 6 bit resistive divider network given by?
A: 222222
Q: What is the output voltage for 6 bit resistive divider ne twork?
A: 222222
Q: How many volts is the output voltage for a 6 bit resistive divider
A: 10 volts
Q: What is the output voltage for 6 bit resistive divider ne twork given
A: 222222
Q: What is the reference voltage for a 5-bit resistive divider D/A converter?
A: 10 volts
Q: What is the reference voltage of a 5-bit resistive divider D/A converter?
A: 10 volts
Q: What is the reference voltage of the 5-bit resistive divider D/A converter?
A: 10 volts
Q: What is the reference voltage in the MSB branch of a 5-bit resistive divider
A: 10 volts
Q: What is the reference voltage in the feedback path of the operational amplifier?
A: 10 volts
Q: What is the reference voltage for the 5-bit resistive divider D/A converter?
A: 10 volts
Q: What is a more commonly used D/A converter?
A: a binary ladd er D/A converter
Q: What is the reference voltage in the feedback path of the operational amplifier?
A: 10 volts
Q: What is the reference voltage in MSB branch of a 5-bit resistive divider D
A: 10 volts
Q: What is the reference voltage for a 5-bit resistive divider?
A: 10 volts
Q: What network gives the output a weighted sum of digital inputs?
A: R-2R resistive ladder network
Q: What is the R-2R ladder network?
A: resistive
Q: What does the R-2R resistive ladder network give the output a weighted sum
A: digital inputs
Q: How many resistor values does the R-2R resistive ladder network have?
A: two
Q: What network gives the output a weighted sum of digital inputs?
A: R-2R resistive ladder network
Q: How many resistor values are present in the R-2R ladder network?
A: two
Q: What network gives the output a weighted sum of digital inputs?
A: R-2R resistive ladder network
Q: What is the R-2R ladder network?
A: resistive
Q: What network gives the output a weighted sum of digital inputs?
A: R-2R resistive ladder network
Q: How many resistor values does the R-2R ladder network have?
A: two
Q: What is the output voltage at the point W due to bit b 3 assumed at V RE
A: 2R
Q: What is the output voltage V 0 due to the binary input 1000?
A: half of
the reference voltage
Q: What is the output voltage due to bit b 3 assumed at V REF potential?
A: W
Q: What is shown in figure 11.6(c)?
A: R
Q: What is the resistance looking at the point Y and ground?
A: R
Q: What is the output voltage due to the binary input 1000?
A: V 0
Q: What is shown in figure 11.6(d)?
A: 2R
Q: What is the output voltage V 0 due to?
A: binary input 1000
Q: What is the output voltage V 0 due to the binary input 1000 due to?
A: half of
the reference voltage
Q: What is the output voltage V 0 due to the binary input 1000?
A: half of
the reference voltage
Q: What is the resistance between the point Z and ground?
A: 2R
Q: What is the resistance between point Z and ground?
A: 2R
Q: What is the output voltage due to second MSB?
A: 4REF Vwith
Q: What is the resistance bet ween the point Z and ground?
A: 2R
Q: What is the resistance between the point Z and ground?
A: 2R
Q: What is the resistance between the point Z and ground shown in figure 11.7(
A: 2R
Q: What is the resistance between the point Z and ground?
A: 2R
Q: What is shown in figure 11.7(b)?
A: king at the point Y and ground
is R
Q: What is the resistance between point Z and ground?
A: 2R
Q: What is the resistance between the point Z and ground?
A: 2R
Q: What is the equation for voltage at the output of 4 bit binary ladder network?
A: 11.4
Q: What is the equation for voltage at the output of 4 bit binary ladder network?
A: 11.4
Q: The equation (11.4) is the equation for voltage at the output of 4 bit binary
ladder network
A: 33
22
11
00
42222
Q: What is the equation for voltage at the output of a 4 bit binary ladder network?
A: 11.4
Q: What equation is the equation for voltage at the output of 4 bit binary ladder
network?
A: 11.4
Q: What is the equation for voltage at the output of 4 bit binary ladder network?
A: 11.4
Q: What is the equation for the voltage at the output of 4 bit binary ladder
network?
A: 11.4
Q: What is the equation for voltage at the output of the 4 bit binary ladder
network?
A: 11.4
Q: What is the equation for voltage at the output of 4 bit binary ladder network?
A: 11.4
Q: What is the equation for voltage at the output of 4 bit binary ladder network?
A: 11.4
Q: What is the output voltage V out of this D/A converter due to MSB?
A: 1000 binary inpu t
Q: What is the voltage at the point W due to MSB?
A: V REF / 2
Q: What is the output voltage of the D/A converter due to MSB?
A: V REF / 2
Q: What is the output voltage of a D/A converter due to MSB?
A: V REF / 2
Q: What is the output voltage due to MSB?
A: V REF / 2
Q: What is shown in figure 11.8?
A: t D/A converter
Q: What is the output voltage due to MSB?
A: V REF / 2
Q: What is the name of the D/A converter shown in figure 11.8?
A: A binary ladder network
Q: What is the voltage at the point W due to MSB?
A: V REF / 2
Q: What is the output voltage of the D/A converter due to MSB?
A: V REF / 2
Q: What are the resistors in the ladder network either R or 2R?
A:
resistances matters rather than the absolute value of resistances
Q: Why is the ladder network widely used in D/A converters?
A: Because of these adva ntages
Q: What are the resistors in the ladder network?
A: R or 2R
Q: What do the resistors in the ladder network are either R or 2R?
A:
resistances matters rather than the absolute value of resistances
Q: What do the resistors in the ladder network are either R or 2R?
A:
resistances matters rather than the absolute value of resistances
Q: How many resistors are in the ladder network?
A: R or 2R
Q: What are the resistors in the ladder network either R or 2R?
A:
resistances matters rather than the absolute value of resistances
Q: What do the resistors in the ladder network are either R or 2R?
A:
resistances matters rather than the absolute value of resistances
Q: Why is the ladder network widely used in D/A converters?
A: Because of these adva ntages
Q: What are the resistors in the ladder network either R or 2R?
A:
resistances matters rather than the absolute value of resistances
Q: What is the output voltage caused by 3 rd MSB volts VREF 25
A:
8− =− =− =
Q: The full scale output voltage is given by: 016 10 16 = =
A:
Q: What are available in the form of ICs with different specifications for their
performances?
A: D/A converters
Q: What type of converters are available in the form of ICs with different
specifications for their
A: D/A converters
Q: What is the output voltage caused by 3rd MSB volts VREF 25?
A:
8− =− =− =
Q: The full scale output voltage is give n by: 016 10 16 =
A:
Q: What is the full scale output voltage given by?
A:
Q: What is the output voltage caused by 3 rd MSB volts VREF 5
A:
8− =− =− =
Q: What are D/A converters available in the form of?
A: ICs
Q: What is the full scale output voltage given by?
A:
Q: What is a measure of quality of D/A converter?
A: The resolution
Q: What is the ratio of the LSB increment to the ma ximum output?
A: resolution
Q: What is the ratio of the LSB increment to the ma ximum output of
A: resolution
Q: What is a measure of quality of a D/A converter?
A: The resolution
Q: What is a measure of quality of D/A converter?
A: The resolution
Q: What is the measure of quality of a D/A converter?
A: resolution
Q: What is the ratio of the LSB increment to the ma ximum output for
A: resolution
Q: What is the measure of quality of D/A converter?
A: The resolution
Q: What is a measure of quality of D/A converter?
A: The resolution
Q: What is the resolution of a D/A converter?
A: the ratio of the LSB increment to the ma ximum output
Q: What is a D/A converter said to be monotonic if it gi
A: Monotonicity
Q: A D/A converter is said to be monotonic if it giv
A: Monotonicity
Q: What is said to be monotonic if it giv es an analog
A: A D/A converter
Q: What is a D/A converter said to be monotonic if it has an analog
A: Monotonicity
Q: What type of converter is said to be monotonic if it giv e
A: D/A converter
Q: A D/A converter is said to be monotonic if it has an analog output voltage
A: Monotonicity
Q: What is a D/A converter said to be if it giv
A: monotonic
Q: What is a D/A converter said to be?
A: monotonic
Q: What is the name of the quality of a D/A converter?
A: monoto nicity
Q: What is said to be monotonic if it giv es a
A: A D/A converter
Q: What is important because it places a limit on how fast one can change the
digital input?
A: The settling time
Q: What is the settling time of a D/A converter?
A: ± ½ LSB
of its final value
Q: How long does it take for a D/A converter to produce a correct output?
A: about few nanoseconds to microseconds
Q: How long does it take a D/A converter to produce a correct output?
A: about few nanoseconds to microseconds
Q: What does monotonicity require of the output waveform after the application of
digital input to
A: the output waveform should be a perfect staircase
Q: What does monotonicity require of the output waveform?
A: a perfect staircase
Q: How long does it take a D/A converter to produce the correct output?
A: about few nanoseconds to microseconds
Q: What is the settling time of a D/A converter?
A: ± ½ LSB
of its final value
Q: What does Monotonicity require of the output waveform?
A: a perfect staircase
Q: What is the settling time of a D/A converter?
A: ± ½ LSB
of its final value
Q: How many bits are required at the input of a D/A co nverter
A: 10 11.3
Q: What is the step size of a 12 bit D/A converter?
A: resolution in volts
Q: What is the step size of a 12 bit D/A converter if the full scale
A: +10 volts
Q: What is the step size of a 12 bit D/A converter, if the full
A: +10 volts
Q: What is the step size in volts of a 12 bit D/A converter?
A: +10 volts
Q: How many bits are required at the input of a D/A converter to achieve a
A: 10 11.3
Q: How many bits are needed at the input of a D/A co nverter
A: 10 11.3
Q: What is the resolution in volts of a 12 bit D/A converter?
A: +10 volts
Q: What is the step size or resolution in volts of a 12 bit D/A
A: +10 volts
Q: What is the step size of a 12 bit D/A converter?
A: resolution in volts
Q: What is the pin configuration of the D/A converter IC 0808?
A:
Q: What is the pin configuration of this D/A converter IC 0808?
A:
Q: What is the pin configuration of this D/A converter?
A: IC 0808
Q: What is the pin configuration of this D/A converter IC 0808?
A:
Q: What is the pin configuration of the D/A converter IC 0808?
A:
Q: What is the pin configuration of the D/A converter IC 0808?
A:
Q: What is the pin configuration of this D/A converter IC 0808?
A:
Q: What is the pin configuration of this D/A converter IC 0808?
A:
Q: What is the pin configuration of the D/A converter IC 0808?
A:
Q: What is the pin configuration of the D/A converter IC 0808?
A:
Q: What is the fastest and simplest method of converting an analog signal to
digital signal?
A: 11.5 SIMULTANEOUS A/D CONVERTER
Q: What is the fastest and easiest method of converting an analog signal to digital
signal?
A: 11.5 SIMULTANEOUS A/D CONVERTER
Q: What is the fastest and simplest way of converting an analog signal to digital
signal?
A: 11.5 SIMULTANEOUS A/D CONVERTER
Q: What is the fastest and simplest method of converting an analog signal to
digital signal?
A: 11.5 SIMULTANEOUS A/D CONVERTER
Q: What is the fastest and simplest way to convert an analog signal to digital
signal?
A: 11.5 SIMULTANEOUS A/D CONVERTER
Q: What is the fastest and simplest method of convertin an analog signal to digital
signal?
A: 11.5 SIMULTANEOUS A/D CONVERTER
Q: What is the fastest and simplest method of converting an analog signal to
digital signal?
A: 11.5 SIMULTANEOUS A/D CONVERTER
Q: What is the fastest and simplest method to convert an analog signal to digital
signal?
A: 11.5 SIMULTANEOUS A/D CONVERTER
Q: What is the fastest and simplest method of converting an analog signal to
digital signal called
A: 11.5 SIMULTANEOUS A/D CONVERTER
Q: What is the fastest and simplest method of converting an analog signal to
digital?
A: SIMULTANEOUS A/D CONVERTER
Q: How many comparators are required for the conversion of analog voltage ranging
between
A: three
Q: How many comparators are required for the conversion of analog voltage into two
bit digital output?
A: three
Q: When the input is less than the reference voltage, the low output is called
what?
A: logic 0
Q: How many comparators are needed for the conversion of analog voltage ranging
between
A: three
Q: How many comparators are required for conversion of analog voltage ranging
between 0
A: three
Q: How many comparators are required for the conversion of analog voltage ranging
from 0 to V
A: three
Q: When the input is less than the reference voltage, the low output is called
what?
A: logic 0
Q: How many comparators are required for the conversion of analog voltage ranging
betwe en
A: three
Q: How many comparators are required to convert analog voltage ranging between 0 to
A: three
Q: How many comparators are needed for conversion of analog voltage ranging between
0
A: three
Q: If the input analog voltage exceeds the reference voltage to any comparator, the
comparator gives
A: high output
Q: When the input analog voltage exceeds the reference voltage to any comparator,
the comparator gives
A: high output
Q: What happens if the input analog voltage exceeds the reference voltage to any
comparator?
A: the comparator gives high output
Q: What does the comparator give if the input analog voltage exceeds the reference
voltage to any
A: high output
Q: If the input analog voltage exceeds the reference voltage of any comparator, the
comparator gives
A: high output
Q: What are used to rea d the digital output?
A: The read gates and output registers
Q: The read gates and output registers are used to rea d the digital output if
A: binary output
Q: The read gates and output registers are used to rea d the digital output of the
A:
Q: The read gates and output registers are used to rea d the digital output of
A: desired binary output
Q: The read gates and output registers are used to rea d the digital output. What
A: 00
Q: Table 11.2 summarizes outputs of the comparators. Table 11.2 summarizes outputs
A:
Q: By drawing the K-maps, the express ions for b 0 and
A: Table 11.2
Q: By drawing the K -maps, the express ions for b 0 and
A: Table 11.2
summarizes outputs of the comparators
Q: Table 11.2 summarizes the outputs of the comparators. Table 11.2 summarizes the
A:
Q: Table 11.2 summarizes outputs of the comparators. Table 11.3 The expressions of
A:
Q: Table 11.2 summarizes outputs of the comparators. Table 11.2 sums outputs
A:
Q: What summarizes outputs of the comparators?
A: Table 11.2
Q: What summarizes outputs of the comparators?
A: Table 11.2
Q: Table 11.2 summarizes the outputs of the comparators. Table 11.2 summarizes
output
A:
Q: Table 11.2 summarizes outputs of the comparators. Table 11.2 summarizes the
output
A:
Q: What gives the high output whenever the output of the c omparator C 3
A: The bit b 2
Q: The design of a simultaneous A/D converter is quite straight forward and
relatively easy to understand
A:
11.3
Q: What gives the high output whenever the output of c omparator C 3 is
A: The bit b 2
Q: The design of a simultaneous A/D converter is fairly straight forward and
relatively easy to understand
A:
11.3
Q: The design of a simultaneous A/D converter is relatively straight forward and
relatively easy to understand
A:
11.3
Q: What is the design of a simultaneous A/D converter relatively easy to
understand?
A: straight forward
Q: What gives the high output whenever the output of the c omparator is high
A: The bit b 2
Q: What can be easily obtained by examining the table 11.3?
A: its can easily be ob tained
Q: The design of a simultaneous A/D converter is relatively straight forward and
easy to understand.
A:
11.3
Q: What is the design of a simultaneous A/D converter?
A: quite straight forward
Q: How many bits of D/A convert er are enabled one by one?
A: four
Q: How are the bits of D/A convert er enabled one by one?
A:
starting with the most significant bit (MSB).
Q: What are the bits of D/A convert er enabled one by one?
A:
starting with the most significant bit (MSB).
Q: What is the most useful and commonly used method of A/D converter?
A: successive approximation method
Q: What are the bits of D/A converter enabled one by one?
A: most significant bit (MSB).
Q: How are the bits of D/A converter enabled one by one?
A:
starting with the most significant bit (MSB).
Q: How are the bits of D/A converted one by one?
A: enabled
Q: What is the most useful and commonly used method?
A: successive approximation method
Q: What are the bits of D/A converter enabled one by one?
A: most significant bit (MSB).
Q: What is the most useful and commonly used method?
A: successive approximation method
Q: What is the process of approximating the analog voltage bit by bit starting with
A: pro cess
Q: The successive approximation method is the process of approximating the analog
A: MSB
Q: What is the output of D/A converter compared with the input voltage for all the
bits
A: d
Q: What is the output of D/A converter compare d with the input voltage for all the
A:
bits starting with the most significant bit
Q: How is the output of D/A converter compared with the input voltage for all the
bits
A: compare d
Q: How is the output of D/A converter compared with the input voltage?
A: compare d
Q: What is the process of approximating the analog voltage bit by bit beginning
with
A: pro cess
Q: What is the successive approximation method?
A: approximating the
analog voltage bit by bit starting with MSB
Q: What is the successive approximation method?
A: approximating the
analog voltage bit by bit starting with MSB
Q: How is the output of D/A converter compared with the input voltage?
A: compare d
Q: What is retained in SAR?
A: The
binary code 0110
Q: The binary code 0110 is retained in SAR, which is binar y value of
A: input voltage
Q: What does the counter or digital ramp type A/D converter utilize to count a
continuous pulse
A: a bi nary counter
Q: What is the binary code 0110 retained in?
A: SAR
Q: What code is retained in SAR?
A: 0110
Q: What is retained in the SAR?
A: The
binary code 0110
Q: What is a counter or digital ramp type A/D converter?
A: utilizes a bi nary counter
Q: What is a counter or digital ramp type A/D converter?
A: utilizes a bi nary counter
Q: What is retained in SAR?
A: The
binary code 0110
Q: What is retained in SAR?
A: The
binary code 0110
Q: When a start of conversion pulse is applied to the control unit it resets the
binary co
A:
counter
Q: What shows the schematic diagram of this ty pe of A/D converter?
A: Figure 11.21
Q: When a start of conversion pulse is applied to the control unit, it resets the
binary
A:
counter
Q: What diagram shows the schematic diagram of this ty pe of A/D converter?
A: Figure 11.21
Q: What shows the schematic diagram of the ty pe of A/D converter?
A: Figure 11.21
Q: What is the schematic diagram of this ty pe of A/D converter?
A: Figure 11.21
Q: What shows the schematic diagram of this ty pe of A/D converter?
A: Figure 11.21
Q: What shows the schematic diagram of this ty pe of A/D converter?
A: Figure 11.21
Q: What shows the schematic diagram of the ty pe of A/D converter?
A: Figure 11.21
Q: What shows the schematic diagram of this ty pe of A/D converter?
A: Figure 11.21
Q: When the analog output of D/A convert er exceeds the input analog voltage, the
A: the comparator provides a low output
Q: When the analog output exceeds the input analog voltage, the comparator provides
a low output
A: disabling the gate and the
counter stops counting
Q: When the analog output of D/A converter exceeds the input analog voltage, the
comparat
A: low output
Q: What happens when the analog output of D/A convert er exceeds the input analog
voltage
A: the comparator provides a low output disabling the gate
Q: What happens when the analog output of D/A converter exceeds the input analog
voltage?
A: the comparator provides a low output disabling the gate
Q: When does the comparator provide a low output?
A: The moment
Q: When the analog output of D/A convert er exceeds the input analog voltage the
comparat
A: low output
Q: When the analog output of D/A converter exceeds the input analog voltage the
comparator
A: low output
Q: What happens when the analog output exceeds the input analog voltage?
A: the comparator provides a low output disabling the gate
Q: When the analog output exceeds the input analog voltage the comparator provides
a low output dis
A: disabling the gate
Q: The up/down counter is operated by up or down signals from the control unit. The
digital
A:
Q: What can be constructed as shown in figure 11.23?
A: input waveform
Q: What can be constructed as shown in figure 11.23?
A: input waveform
Q: The up/down counter is operated by up or down signals from the control unit.
A:
counter
Q: The up/down counter is operated by up or down signals from the control unit.
What controls
A: The digital to analog
converter output
Q: What can be constructed as shown in figure 11.23?
A: input waveform
Q: What can be constructed as shown in figure 11.23?
A: input waveform
Q: What may be used in place of the up counter?
A: an up/down coun ter
Q: What can be constructed as shown in figure 11.23?
A: input waveform
Q: The up/down counter is operated by up or down signals from the control unit and
controls the
A:
counter
Q: What type of converter is similar to counter or digita l ramp type A/D
A: SINGLE SLOPE A/D CONVERTER
Q: When the analog input falls, the down signal is enabled and the counter starts
reverse counting giving an
A: SINGLE SLOPE A/D CONVERTER
Q: What type of A/D converter is similar to counter or digita l ramp type
A: SINGLE SLOPE A/D CONVERTER
Q: What type of converter is similar to digita l ramp type A/D converter?
A: SINGLE SLOPE A/D CONVERTER
Q: What is another name for digita l ramp type A/D converter?
A: counter
Q: What type of converter is similar to counter or digita l ramp type?
A: SINGLE SLOPE A/D CONVERTER
Q: What type of converter is similar to the counter or digita l ramp type A/
A: SINGLE SLOPE A/D CONVERTER
Q: When the analog input falls, the down signal is enabled and the counter starts
reverse counting .
A: SINGLE SLOPE A/D CONVERTER
Q: What type of converter is similar to counter or digita l ramp type?
A: SINGLE SLOPE A/D CONVERTER
Q: What type of converter is similar to the counter or digita l ramp type?
A: SINGLE SLOPE A/D CONVERTER
Q: The integrator produces a linearly risi ng ramp voltage, whose
A: resistance R and capaci tor C
Q: What is applied wh ich clears the counter and resets the integrator?
A: a reset pulse
Q: The integrator produces a linearly rising ramp voltage, whose slope
A: resistance R and capaci tor C
Q: What happens when the integrator produces a linearly risi ng ramp voltage
A: depend on the values of the resistance R and capaci tor C
Q: What happens when the integrator produces a linearly rising ramp voltage?
A: disabling the
AND gate
Q: What is applied wh ich clears the counter and resets the integrator?
A: a reset pulse
Q: What happens when a reset pulse is applied wh ich clears the counter and resets
A:
integrator
Q: What is applied when the integrator produces a linearly risi ng ramp
A: a reset pulse
Q: What is applied wh ich clears the counter and resets the integrator?
A: a reset pulse
Q: The integrator produces a linearly risi ng ramp voltage. whose
A: resistance R and capaci tor C
Q: What determines the ortionality between the gate duration and the magnitude of
the input analog signal
A: the linearity of
the ramp voltage
Q: What is the linearity of the ramp voltage obtained at the output of the oper
ational amplifier
A: ortionality
Q: What depends on the stability of referenc e source, the off-set of the
A: accuracy
Q: What determines ortionality between the gate duration and the magnitude of the
input analog signal?
A: the linearity of
the ramp voltage
Q: What depends upon the stability of referenc e source, the off-set of the
A: accuracy
Q: What is the linearity of ramp voltage obtained at the output of the oper ational
amplifier?
A: ortionality
Q: What depends on the stability of referenc e source and off-set of the
operational
A: accuracy
Q: What is the linearity of the ramp voltage obtained at the output of the oper
ional amplifier
A: ortionality
Q: The linearity of the ramp voltage obtained at the output of the oper ational
amplifier will depend
A: ortionality
Q: What depends on the stability of referenc e source?
A: accuracy
Q: The logic diagram of the dual slope A/D converter is given in figure 11.27.
A:
Q: What is the logic diagram of the dual slope A/D converter given in figure 11.27?
A:
Q: How many ramps does the integrator form in the dual slope A/D converter?
A: two
Q: What is the logic diagram of the dual slope A/D converter?
A: Fig. 11.27
Q: What is the logic diagram of the dual slope A/D converter?
A: Fig. 11.27
Q: The logic diagram of the dual slope A/D converter is given in figure 11.27 .
A:
Q: What is the logic diagram of the dual slope A/D converter given in Fig. 11.
A:
Fig. 11.27
Q: What is the basic operation of the dual slope A/D converter?
A: standard clock pulses a pplied to the gate
Q: What is the basic operation of the dual slope A/D converter?
A: standard clock pulses a pplied to the gate
Q: What type of converter is similar to the single slope A/D converter?
A: dual slope A/D converter
Q: What causes a negative going ramp at the output of the integrator?
A: The capacitor C will charge
linearly with this constant current
Q: When the counter reaches the fixed count at t1, the control logic generate a
pulse
A: to clear the counter to zero
Q: What causes a negative going ramp at the output of the integrator?
A: The capacitor C will charge
linearly with this constant current
Q: What causes a negative going ramp at the output of the integrator?
A: The capacitor C will charge
linearly with this constant current
Q: What causes a negative going ramp at the output of the integrator?
A: The capacitor C will charge
linearly with this constant current
Q: When the counter reaches the fixed count at t 1, the control logic generate a
pulse
A: to clear the counter to zero
Q: What causes a negative ramp at the output of the integrator?
A: The capacitor C will charge
linearly with this constant current
Q: What causes a negative going ramp at the output of the integrator?
A: The capacitor C will charge
linearly with this constant current
Q: What causes a negative going ramp at the output of the integrator?
A: The capacitor C will charge
linearly with this constant current
Q: Where does a constant current equal to RVin flow through the capacitor C?
A: as the inverting inp ut of the
operational amplifier
Q: The integrator starts discharging linearly due to the constant current from – V
RE
A:
Fig. 11.28
Q: The integrator starts discharging linearly due to the constant current from –V
RE
A: 2tVin ∝
Q: Where does the integrator start discharging linearly due to the constant current
from –
A: V REF
Q: Where does the integrator start discharging linearly?
A: -V C
Q: The integrator starts discharging linearly because of the constant current from
– V RE
A:
Fig. 11.28
Q: When does the integrator start discharging linearly?
A: constant current from – V REF
Q: The integrator starts discharging linearly due to the constant current from -V
RE
A: 2tVin ∝
Q: When does the integrator start discharging linearly?
A: constant current from – V REF
Q: When does the integrator start discharging linearly?
A: constant current from – V REF
Q: How does the integrator start discharging linearly?
A: constant current from – V REF
Q: What is the most popular, inexpensive and widely used 8 bit A/D converter IC?
A: IC 0801
Q: What is the most popular and widely used 8 bit A/D converter IC?
A: IC 0801
Q: What is the most popular 8 bit A/D converter IC?
A: IC 0801
Q: What is the most popular, inexpensive and widely used A/D converter IC?
A: IC 0801
Q: What is the most popular 8 bit A/D converter IC?
A: IC 0801
Q: What is the most popular A/D converter IC?
A: IC 0801
Q: What is the most popular A/D converter IC?
A: IC 0801
Q: What is the most popular 8 bit A/D converter IC?
A: IC 0801
Q: What is the most popular, inexpensive and widely used 8 bit A/D converter?
A: IC 0801
Q: What is the most widely used 8 bit A/D converter IC?
A: IC 0801
Q: What is to be connected between this pin and CLK IN for internal clock?
A: A resistance
Q: What is to be connected between this pin and CLK IN for internal clock?
A: A resistance
Q: What is the frequency of the internal clock of this converter IC?
A: 100 to 800
KHz
Q: What is to be connected between this pin and CLK IN for internal clock?
A: A resistance
Q: What is to be connected between this pin and CLK IN for internal clock?
A: A resistance
Q: The frequency of the internal clock is given by the expression: CRf.1.11=
A: 100 to 800
KHz
Q: What is the frequency of the internal clock of this converter IC?
A: 100 to 800
KHz
Q: What does WR stand for?
A: Start of conversion
Q: What is to be connected between this pin and CLK IN for internal clock?
A: A resistance
Q: What is to be connected between the CLK IN and ground for internal clock?
A: Capacitor
Q: What is the reference voltage for a 6 bit resistive divider D/A converter?
A: 15 V
Q: What is the reference voltage of a 6 bit resistive divider D/A converter?
A: 15 V
Q: What is a general expression for the output voltage of a resistive divider
network?
A: 2
Q: What is the reference voltage for a 6 bit resistive divider network?
A: 10 V
Q: What is the general expression for the output voltage of a resistive divider
network?
A: 2
Q: What is the reference voltage of a 6 bit resistive divider network?
A: 10 V
Q: What is the reference voltage in the feed back path of the operational
amplifier?
A: 15 V
Q: What is the output voltage of a resistive divider network?
A: 10 V
Q: What is the reference voltage of a 6 bit resistive divider D/A converter in
A: 15 V
Q: What is the reference voltage for a 6 bit resistive divider D/A converter in
A: 15 V
Q: What are the performance criteria for a D/A c onverter?
A: Full Scale output voltage
Q: What are the performance criteria for the D/A c onverter?
A: Full Scale output voltage
Q: What are the performance criteria for the D/A c onverter?
A: Full Scale output voltage
Q: What are the performance criteria for a D/A converter?
A: Full Scale output voltage
Q: What are the performance criteria for a D/A converter?
A: Full Scale output voltage
Q: What is the output voltage for a digital input of 010011?
A: analog
Q: What are the performance criteria for a D/A converter?
A: Full Scale output voltage
Q: What are the performance criteria for the D/A converter?
A: Full Scale output voltage
Q: What are the performance criteria for the D/A converter?
A: Full Scale output voltage
Q: What are the performance criteria for a D/A c onverter?
A: Full Scale output voltage
Q: How many bits are required at the input of a D/A converter to achieve a
A: 15mV
Q: What is the step size of a 10 bit binary ladder D/A converter?
A: +10 volts
Q: What is the step size of a 10 bit D/A converter?
A: +10 volts
Q: How many bits are required at the input of a 10 bit D/A converter?
A: 10 bits
Q: What is the step size of a 10-bit binary ladder D/A converter?
A: +10 volts
Q: How many bits are needed at the input of a D/A converter to achieve a
A: 15mV
Q: How many bits are required at the input of a 10 bit D/A converter to achieve
A: 15mV
Q: What is the step size or resolution in volts of a 10 bit D/A
A: +10 volts
Q: What is the step size of a 10 bit D/A converter if the full scale
A: +10 volts
Q: How many bits are required at the input of a D/A converter?
A: 10 bits
Q: What can a flip-flop be used for?
A: to st ore the binary bit
Q: What can flip-flops be used for?
A: to st ore the binary bit
Q: What can a flip-flop be used to store?
A: registers
Q: Describe the successive approximation method for r A/D conversion. 19.
A:
20
Q: What can flip-flops be organized to form?
A: storage registers
Q: Describe the successive approximation method for r A/D conversion. 18.
A:
19
Q: Describe the successive approximation method fo r A/D conversion. 19.
A:
20
Q: What can be used to store the binary bit (0 or 1)?
A: flip-flop
Q: Describe the successive approximation method for r A/D conversion. 17.
A:
19
Q: Describe the successive approximation method fo r A/D conversion. 18.
A:
19
Q: Memory registers are normally used for temporary storage of a few bits of
information.
A:
Q: Memory registers are normally used for temporary storage of a few bits of
information.
A:
Q: What are typically used for temporary storage of a few bits of information?
A: memory registers
Q: What are usually used for temporary storage of a few bits of information?
A: memory registers
Q: What are memory registers normally used for?
A: temporary st orage of a few bits of information
Q: Memory registers are usually used for temporary storage of a few bits of
information.
A:
Q: What are memory registers normally used for?
A: temporary st orage of a few bits of information
Q: What are typically used for temporary storage of a few bits of information?
A: memory registers
Q: What are usually used for temporary storage of a few bits of information?
A: memory registers
Q: What are memory registers normally used for?
A: temporary st orage of a few bits of information
Q: What must the device have to represent the binary information 0 or 1?
A: two stable states
Q: How many stable states must a device have to represent the binary information 0
or 1?
A: two
Q: The device must have two stable states to represent the binary information 0 or
1. 1. The device
A:
Q: What must a device have to represent the binary information 0 or 1?
A: two stable states
Q: What must the device have to represent the binary information 0 or 1?
A: two stable states
Q: What must a device have to represent the binary information 0 or 1?
A: two stable states
Q: What must the device have to represent the binary information 0 or 1?
A: two stable states
Q: What must the device have to represent the binary information 0 or 1?
A: two stable states
Q: What must the device have to represent the binary information 0 or 1?
A: two stable states
Q: The device must have two stable states to represent the binary information 0 or
1. What should the
A: aract eristics
Q: How many binary memory cells are combined to store a word?
A: eight
Q: What is the length of the MBR equal to?
A: the word length of the syste m
Q: What is the location of the memory unit where a word is to be s tored
A: the address
of the word
Q: How many binary memory cells are combined to store a word?
A: eight
Q: How many binary memory cells are combined to store a word?
A: eight
Q: How many binary memory cells are combined to store a word?
A: eight
Q: What is the location of the memory unit where a word is to be stored
A: the address
of the word
Q: What is the length of the MBR equal to the word length of the syste
A: The length
Q: How many binary memory cells are combined to store a word?
A: eight
Q: How many binary memory cells are combined to store a word?
A: eight
Q: When a memory unit has the capacity to store m words, the length of MAR
A: the length of MAR will be of 12 bits
Q: What is the length of MAR if a memory unit has the capacity to store
A: 12 bits
Q: How many words does a memory unit have the capacity to store?
A: 4096
Q: When a memory unit has the capacity to store m words, what is the length of
A: the length of MAR will be of n bits
Q: What determines the capacity of a memory unit?
A: capacity of the memory locations
Q: How many words can a memory unit store?
A: 4096
Q: What depends on the capacity of the memory locations?
A: If a memory unit has the capacity to
store m words
Q: What depends on the capacity of the memory locations?
A: If a memory unit has the capacity to
store m words
Q: How many words does a memory unit have the capacity to store?
A: 4096
Q: How many words can a memory unit store?
A: 4096
Q: What is the read out process known as?
A: non-destructive read
out
Q: What is non-destructive read out?
A: The read out process in the
flip-flop binary cells
Q: What is the time interval between the initiation of the READ signal and the
availability of the
A: Access Time of Memory
Q: What is the read out process known as?
A: non-destructive read
out
Q: What is a non-destructive read out?
A: The read out process in the
flip-flop binary cells
Q: What is the read out process known as?
A: non-destructive read
out
Q: What is the read out process known as?
A: non-destructive read
out
Q: What is the read out process known as?
A: non-destructive read
out
Q: What is the read out process known as?
A: non-destructive read
out
Q: What is the time interval between the initiation of the READ signal and the
availability of stored
A: access time of memory
Q: What is the tim e taken for reading the content and rewriting back in the
A: memory
cycle time
Q: What is the memory unit in which the stored content is lost when the power is
turned off?
A: volatile memory
Q: What is the name of the memory unit in which the stored content is lost when the
power is
A: volatile memory
Q: What is a memory unit in which the stored content is lost when the power is
turned off
A: volatile memory
Q: What is the memory unit in which the stored content is lost when the power is
turned off known
A: volatile memory
Q: What is the memory unit in which the stored content is lost when the power is
turned off called
A: volatile memory
Q: What is volatile memory?
A: The memory unit in which the stored
content is lost
Q: What is the tim e taken for reading and rewriting back in the same memory
A: memory
cycle time
Q: What is the memory unit in which the stored content is lost when the power is
turned off
A: volatile memory
Q: What is the memory unit in which the stored content is lost when the power is
turned on?
A: volatile memory
Q: What is the size of MBR for a 16K x 32 bit memory?
A: 32 bits
Q: What is the capacity of a 16K x 32 bit memory?
A: 16 K words and each word is of 32 bits
Q: How many words can be stored in a 16K x 32 bit memory?
A: 16 K words and each word is of 32 bits
Q: What is the apacity of 40960 bits memory?
A:
5120 bytes
Q: How many words can a 16K x 32 bit memory store?
A: 16 K words
Q: What is the size of MBR?
A: 32 bits
Q: What is the capacity of a 16K x 32 bit memory?
A: 16 K words and each word is of 32 bits
Q: How many words can a 16K x 32 bit memory store?
A: 16 K words
Q: What are the two basic types of semiconductor memories?
A: The Read Only Memory (ROM) and the Random Access M emory
Q: How many words can a 16K x 32 bit memory store?
A: 16 K words
Q: How many words are stored in a read only memory?
A: 8
Q: How many words are stored in a read only memory?
A: 8
Q: How many words are stored in a read only memory?
A: 8
Q: What are nonvolatile memories?
A: information or
the data is permanently stored
Q: How many words are stored in a read only memory?
A: 8
Q: How many words are stored in a read only memory?
A: 8
Q: What are nonvolatile memories?
A: information or
the data is permanently stored
Q: How many words are stored in a read only memory?
A: 8
Q: How many words are stored in a read only memory?
A: 8
Q: How many words are stored in a read only memory?
A: 8
Q: How many words are stored in 8 locations of the diode matrix ROM?
A: 8
Q: How many words are stored in 8 locations of this diode matrix ROM?
A: 8
Q: What is the name of the diode matrix ROM?
A: T he 8 words stored in 8 locations of
Q: How many words are stored in 8 locations of the diode matrix ROM?
A: 8
Q: How many words are stored in 8 locations of this diode matrix ROM?
A: 8
Q: How many words are stored in 8 locations of the diode matrix ROM?
A: 8
Q: What is a diode matrix ROM?
A: 8 words stored in 8 locations
Q: How many words are stored in 8 locations of the diode matrix ROM?
A: 8
Q: How many words are stored in 8 locations of this diode matrix ROM?
A: 8
Q: What is the diode matrix ROM?
A: 8 words stored in 8 locations
Q: Most ROMs available in the market are made with bi polar transistors or MOS
A: transistors instead of diodes
Q: Most ROMs are made with bi polar transistors or MOS transistors instead of
A: diodes
Q: Most ROMs in the market are made with bi polar transistors or MOS transistor
A:
transistors
Q: Most ROMs available in the market are made with bipolar transistors or MOS
transistor
A: bi polar transistors or MOS
transistors
Q: Most ROMs are made with bipolar transistors or MOS transistors instead of di
A: diodes
Q: Most ROMs available on the market are made with bi polar transistors or MOS
A: transistors instead of diodes
Q: Most ROMs available in the market are made with bi polar transistors instead of
di
A: diodes
Q: Most ROMs in the market are made with bipolar transistors or MOS transistors
A: bi polar transistors or MOS
transistors
Q: Most ROMs are made with bi polar transistors or MOS transistors rather than
A: diodes
Q: Most ROMs are made with bi polar transistors instead of diodes. What
A: MOS
transistors
Q: What is another name for PROGRAMMABLE READ ONLY MEMORY?
A: PROM
Q: In ROM's the data is fixed at the time of manufacture and the
A: the user can simply
read the stored content
Q: What is PROGRAMMABLE READ ONLY MEMORY (PROM)?
A: 12.3.1
Q: What is another term for PROGRAMMABLE READ ONLY MEMORY?
A: PROM
Q: In ROM's, the data is fixed at the time of manufacture and
A: the user can simply
read the stored content
Q: In ROM's the data is fixed at the time of manufactur re
A: the user can simply
read the stored content
Q: In ROM's the data is fixed at the time of manufactu re
A: the user can simply
read the stored content
Q: What is another name for PROGRAMMABLE READ ONLY MEMORY?
A: PROM
Q: In ROM's, the data is fixed at the time of manufactur
A: the user can simply
read the stored content
Q: What is another name for PROGRAMMABLE READ ONLY MEMORY?
A: PROM
Q: What can be erased and reprogrammed in EPROM's?
A: the data
Q: What does EPRO M stand for?
A: Erasable Programmable Read Only Memory
Q: What can be erased and reprogrammed in EPROM?
A: the data
Q: What can be erased and reprogrammed in EPROM?
A: the data
Q: What can be erased and reprogrammed in EPROMs?
A: the data
Q: What is the name of the special device used to program EPROM?
A: PROM programmer
Q: What can be erased and reprogrammed in EPROM's?
A: the data
Q: What can be erased and reprogrammed in EPROM?
A: the data
Q: What is EPRO M?
A: Erasable Programmable Read Only Memory
Q: What can be erased and reprogrammed in EPROM?
A: the data
Q: Where are high energy electrons injected into the transistor?
A: the floating
gate
Q: Where are high energy electrons injected into the transistor?
A: the floating
gate
Q: Where are high energy electrons injected into the floating gate?
A: the transistor
Q: Where are high energy electrons injected into the transistor?
A: the floating
gate
Q: What is injected into the floating gate of the transistor?
A: high energy electrons
Q: Where are high energy electrons injected into the floating gate?
A: the transistor
Q: What happens if EPROM chip is exposed to ultraviolet light?
A: The data can be erased
Q: Where are high energy electrons injected into the transistor?
A: the floating
gate
Q: Where are high energy electrons injected into the floating gate?
A: the transistor
Q: Where are high energy electrons injected into the transistor?
A: the floating
gate
Q: What is another name for Electrically Erasable Programmable Read Only Memory?
A: EEPROM
Q: What is the current popular series of EPROM chips?
A: 27XX
Q: What is the current popular series of EPROM chips?
A: 27XX
Q: What is the current popular series of EPROM chips?
A: 27XX
Q: What is another name for Electrically Erasable Programmable Read Only Memory
(EEPROM
A: E2PROMs
Q: What is the current popular series of EPROM chips?
A: 27XX
Q: What is another name for EEPROM?
A: E2PROMs
Q: What is another name for Electrically Erasable Programmable Read Only Memory?
A: EEPROM
Q: What is another name for Electrically Erasable Programmable Read Only Memor ies
A: EEPROMs
Q: What is the current popular series of EPROM chips?
A: 27XX
Q: E2PROMs utilize MOS transistors with floating gate structur e similar
A: EPROMs
Q: What type of transistors are used in memory cells of E2PROMs?
A: MOS transistors
Q: How can E2PROMs be erased in negligibly small time?
A: The application of
reversed voltage
Q: What type of transistors are used in memory cells of E2PROMs?
A: MOS transistors
Q: How can E2PROMs be erased?
A: in negligibly small time of 10 msec
Q: E2PROMs utilize MOS transistors with floating gate structur e like
A: EPROMs
Q: How can E2PROMs be erased in negligibly small time?
A: The application of
reversed voltage
Q: How long can E2PROMs be erased?
A: 10 msec
Q: E2PROMs utilize MOS transistors with floating gate structur e,
A: very thin oxide region above the drain
Q: How long can E2PROMs be erased?
A: 10 msec
Q: How many variables can a 32 x 8 bipolar PROM form?
A: five
Q: How many variables can a 32 x 8 bipolar PROM form functions of?
A: five
Q: How many variables can a 32 x 8 bipolar PROM form?
A: five
Q: How many variables can a 32 x 8 bipolar PROM form the following functions of
A: five
Q: What is the capacity of a 32 x 8 bipolar PROM?
A: 32 words of 8 bit long
Q: What is the capacity of a 32 x 8 bipolar PROM?
A: 32 words of 8 bit long
Q: How many variables can a PROM form?
A: five
Q: How many variables does a 32 x 8 bipolar PROM form?
A: five
Q: How many variables can a 32 x 8 bipolar PROM form?
A: five
Q: How many variables can a 32 x 8 bipolar PROM form?
A: five
Q: What is a common practice to use ROMs as look-up tables for routine calculations
A: Look-up tables
Q: What is a common practice to use ROMs for routine calculations in a computer?
A: look-up ta bles
Q: What is a common practice to use ROMs as look-up tables in a
A: routine
calculations in a computer
Q: What is a common practice to use ROMs as look-up tables?
A: routine
calculations in a computer
Q: What is a common practice to use ROMs as look-up tables for?
A: routine
calculations in a computer
Q: What is a usual practice to use ROMs as look-up tables for routine calculations
A: Look-up tables
Q: ROMs can be used as code converter circuits for routine calculations in a
computer.
A: Code Converters
Q: What can ROMs be used as for routine calculations in a computer?
A: look-up ta bles
Q: What is a common practice to use ROMs as lookup tables for routine calculations
in
A: a computer
Q: What is a common practice to use ROMs as look-up tables?
A: routine
calculations in a computer
Q: The diode matrix ROM for the conversion of binary nu mber to gray code
A: figure 12.9
Q: Where is the diode matrix ROM for the conversion of binary nu mber to
A: figure 12.9
Q: What is the name of the diode matrix ROM that converts four bit binary numbers
A: Example 12.4
Q: How many data lines does a diode matrix ROM need?
A: eight
Q: How many data lines does a diode matrix ROM need?
A: eight
Q: How many data lines does the diode matrix ROM need?
A: eight
Q: How many data lines does a diode matrix ROM require?
A: eight
Q: How many data lines does a diode matrix ROM require?
A: eight
Q: How many data lines do a diode matrix ROM need?
A: eight
Q: How many data lines does a diode matrix ROM need?
A: eight
Q: ROMs can also be used to generate alphanumeric characters on the video screen of
A: Character Generators
Q: What format is generally used for di splay systems?
A: 5 x 7 dot-
matrix
Q: ROMs can be used to generate alphanumeric characters on the video screen of co
A: Character Generators
Q: What is used to generate alphanumeric characters on the video screen of a co
A: ROMs
Q: What format is generally used for di splay systems?
A: 5 x 7 dot-
matrix
Q: What can be used to generate alphanumeric characters on the video screen of a co
A: ROMs
Q: What can be used to generate alphanumeric characters on a co mputer monitor
A: ROMs
Q: What format is generally used for di splay systems?
A: 5 x 7 dot-
matrix
Q: ROMs can be used to generate alphanumeric characters on the video screen of
A: Character Generators
Q: What format is generally used for di splay systems?
A: 5 x 7 dot-
matrix
Q: What type of generator produces sine, saw tooth, triangular and square
waveforms?
A: nction
Q: What is another name for Random Access Memory?
A: Read/w rite memory
Q: What is another name for Random Access Memory?
A: Read/w rite memory
Q: How many different 8 bit values does ROM store?
A: 256
Q: What is another name for Random Access Memory?
A: Read/w rite memory
Q: What is also known as Read/write memory?
A: Random Access Memory
Q: What is another name for Random Access Memory?
A: Read/w rite memory
Q: What is another name for Random Access Memory?
A: Read/w rite memory
Q: How many different 8 bit values does the ROM store?
A: 256
Q: How many different 8 bit values does ROM store?
A: 256
Q: What is one method of addressing a RAM known as?
A: Linear Sele ction
Q: What is one method of addressing a RAM known as?
A: Linear Sele ction
Q: What is one method of addressing a RAM known as?
A: Linear Sele ction
Q: What is one method of addressing a RAM known as?
A: Linear Sele ction
Q: What is one method of addressing a RAM called?
A: Linear Sele ction
Q: What is one method of addressing a RAM called?
A: Linear Sele ction
Q: What is one method of addressing a RAM called?
A: Linear Sele ction
Q: How many methods of memory cell addressing are there?
A: two
Q: What is one method of addressing a RAM known as?
A: Linear Sele ction
Q: How many methods of memory cell addressing are there?
A: two
Q: What is the other addressing system known as?
A:
coincident selection
Q: What is the other addressing system known as?
A:
coincident selection
Q: What is the other addressing system known as?
A:
coincident selection
Q: What is the other addressing system known as?
A:
coincident selection
Q: What is the other addressing system known as?
A:
coincident selection
Q: What is the other addressing system known as?
A:
coincident selection
Q: What is another addressing system known as X-Y Selection?
A: Coincident Selection
Q: What is another addressing system known as X-Y selection?
A:
Coincident Selection
Q: What is the other addressing system known as?
A:
coincident selection
Q: What is another addressing system known as X-Y Selection?
A: Coincident Selection
Q: What transistors are used in second type of RAM cells?
A: Triple emitter
transistors
Q: What type of transistors are used in second type of RAM cells?
A: Triple emitter
transistors
Q: What transistors are used in second type of RAM cells?
A: Triple emitter
transistors
Q: What is used in second type of RAM cells?
A: Triple emitter
transistors
Q: What type of transistors are used in second type of RAM cells?
A: Triple emitter
transistors
Q: What type of transistors are used in second type of RAM cells?
A: Triple emitter
transistors
Q: What type of cell is used for coincident selection?
A: second type of RAM cells
Q: What type of transistors are used in second type of RAM cells?
A: Triple emitter
transistors
Q: What type of transistors are used in second type of RAM cells?
A: Triple emitter
transistors
Q: What type of transistors are used in second type of RAM cells?
A: Triple emitter
transistors
Q: What is kept high for writing or storing operation?
A: the select line S
Q: How many select terminals are obtained for connecting them to X and Y lines?
A: two
Q: When writing or storing operation, the select line S is kept high. For storing
logic
A:
storing
Q: What is kept high for writing or storing operation?
A: the select line S
Q: How many select terminals are obtained for connecting them to X and Y lines o
A: two
Q: What is kept high for writing or storing operations?
A: the select line S
Q: The working of a triple emitter RAM cell is similar to what type of RAM cell?
A: dual emitter RAM cell
Q: The working of a triple emitter RAM cell is similar to what type of cell?
A: dual emitter RAM cell
Q: What is the working of a triple emitter RAM cell similar to?
A: dual emitter RAM cell
Q: What is the working of a triple emitter RAM cell similar to?
A: dual emitter RAM cell
Q: What is a static MOS RAM cell also known as SRAM cell?
A:
12.5.2
Q: What is a static MOS RAM cell also known as?
A: SRAM cell
Q: What is a static MOS RAM cell also known as?
A: SRAM cell
Q: What is a static MOS RAM cell also known as SRAM cell?
A:
12.5.2
Q: What does a static MOS RAM cell also known as SRAM cell consist of?
A: flip-flop f ormed by n-channel MOS transistors
Q: What is another name for a static MOS RAM cell?
A: SRAM cell
Q: What is a static MOS RAM cell also known as SRAM cell?
A:
12.5.2
Q: What is a static MOS RAM cell also known as?
A: SRAM cell
Q: What is a static MOS RAM cell also known as?
A: SRAM cell
Q: What is a static MOS RAM cell also known as?
A: SRAM cell
Q: What is a dynamic MOS RAM cell also called?
A: DRAM cell
Q: What is a dynamic MOS RAM cell also called?
A: DRAM cell
Q: What is a dynamic MOS RAM cell also called?
A: DRAM cell
Q: What is a dynamic MOS RAM cell also called?
A: DRAM cell
Q: What is a dynamic MOS RAM cell also called?
A: DRAM cell
Q: What is a dynamic MOS RAM cell also known as DRAM cell?
A: 12.5.3
Q: What is another name for a dynamic MOS RAM cell?
A: DRAM cell
Q: What is another name for a dynamic MOS RAM cell?
A: DRAM cell
Q: What is a dynamic MOS RAM cell also called?
A: DRAM cell
Q: What is another name for a dynamic MOS RAM cell?
A: DRAM cell
Q: The transistor is switched ON and the capacitor is charged. What is stored in
the cell?
A: The logic ‘1’
Q: When logic 1 is stored in a cell, 0 volt is applied to the sense
A: to
write a bit ‘0’,
Q: The transistor is switched ON and the capacitor is charged. The transistor is
switched ON and the capacitor
A:
Q: When logic 1 is stored in the cell, 0 volt is applied to the sense
A: to
write a bit ‘0’,
Q: The transistor is switched ON and the capacitor is charged. The logic ‘1’ is
stored in
A:
Q: The transistor is switched ON and the capacitor is charged. The capacitor has a
very large leak
A:
Q: When logic 1 is stored in the cell, the voltage of the bit /sense line
A: high
voltage
Q: When logic 1 is stored in the cell, 0 volt is applied to the sense line
A: to
write a bit ‘0’,
Q: When logic 1 is stored in a cell, the voltage of the bit /sense
A: high
voltage
Q: The transistor is switched ON and the capacitor is charged. What is stored in
the cell when logic
A: The logic ‘1’
Q: What RAMs are much cheaper than SRAMs?
A: dynamic RAMs
Q: What RAM is much cheaper than SRAMs?
A: dynamic RAMs
Q: What is much cheaper than SRAMs?
A: dynamic RAMs
Q: What RAMs are much cheaper than SRAMs?
A: dynamic RAMs
Q: What is the power consumption of DRAMs compared to SRAMs?
A: very small
Q: What RAMs are much cheaper than SRAMs?
A: dynamic RAMs
Q: Why are dynamic RAMs much cheaper than SRAMs?
A: th ey allow high packing
density (bits/chip)
Q: What type of RAMs are much cheaper than SRAMs?
A: dynamic RAMs
Q: What is the power consumption of DRAMs compared to SRAMs?
A: very small
Q: What is the power consumption of DRAMs compared to SRAMs?
A: very small
Q: How many RAM ICs can be connected in parallel to increase word size?
A: 12.19
Q: How many RAM ICs can be connected in parallel?
A: Two
Q: How many RAM ICs can be connected in parallel?
A: Two
Q: How many RAM ICs can be connected in parallel to increase word size?
A: 12.19
Q: How many RAM ICs can be connected in parallel to increase the word size?
A: Two
Q: How many RAM ICs can be connected in parallel?
A: Two
Q: What can be connected in parallel to increase the word size?
A: RAM ICs
Q: How many RAM ICs can be connected in parallel to increase the word size?
A: Two
Q: What can be connected in parallel to increase word size?
A: RAM ICs
Q: How can RAM ICs be connected in parallel to increase word size?
A: Fig. 12.19
Q: How many address lines does the PROM 1K x 8 have?
A: 10
Q: How many address lines does a PROM 1K x 8 have?
A: 10
Q: How many address lines does 1K x 8 have?
A: 10
Q: What is the memory arrangement for 256 x 256 shown in?
A: fi gure 12.23
Q: How many address lines does the PROM 1K x 8 have?
A: 10
Q: How many addresses does the PROM 1K x 8 have?
A: 10
Q: How many address lines does PROM 1K x 8 have?
A: 10
Q: How many address lines does a PROM 1K x 8 have?
A: 10
Q: How many address lines does the PROM 1K x 8 have?
A: 10
Q: How many address lines does the PROM 1K x 8 have?
A: 10
Q: What can be magnetized by passing a current through a ferromagnetic material
A: omagnetic material
Q: What type of material can be magnetized by passing a current through it?
A: omagnetic material
Q: What is used as a storage element in magnetic core memory?
A: a core of a ferromagn etic
material
Q: What type of magnetic material can be magnetized by passing a current through
it?
A: omagnetic material
Q: What can be magnetized by passing a current through it?
A: omagnetic material
Q: What can be magnetized by passing a current through it?
A: omagnetic material
Q: What can be magnetized by passing a current through a magnetic material?
A: omagnetic material
Q: What type of material can be magnetized by passing a current through it?
A: omagnetic material
Q: What type of material can be magnetized by passing a current through it?
A: omagnetic material
Q: What is used as a storage element in a magnetic core memory?
A: a core of a ferromagn etic
material
Q: What is the shape of the hyterisis curve?
A: rectangular
Q: What is the shape of ial's hyterisis curve?
A: rectangular
Q: What is the shape of the hyterisis curve used?
A: rectangular
Q: What is the shape of the hyterisis curve?
A: rectangular
Q: What shape is the hyterisis curve of ial?
A: rectangular
Q: What shape is ial's hyterisis curve?
A: rectangular
Q: What is the shape of a hyterisis curve?
A: rectangular
Q: What shape is the hyterisis curve of ial?
A: rectangular
Q: What is the shape of the hyterisis curve?
A: rectangular
Q: What shape is the hyterisis curve used?
A: rectangular
Q: When a current is passed through a wire which passes through the axis of
A: core
Q: When a current is passed through a wire which passes through the axis of the
A: core
Q: What happens when a current is passed through a wire which passes through the
axis
A: magnetic flux in the counter clockwise direc tion
Q: What is needed to read or sense the bit present in the core?
A: a sense
coil or sense winding
Q: What is needed to read or sense the bit present in the core?
A: a sense
coil or sense winding
Q: What is needed to read the bit present in the core?
A: a sense
coil or sense winding
Q: What is necessary to read or sense the bit present in the core?
A: a sense
coil or sense winding
Q: What is needed to read or sense the bit present in the core?
A: a sense
coil or sense winding
Q: What is needed to read or sense the bit present in the core?
A: a sense
coil or sense winding
Q: What is needed to read or sense the bit present in the core?
A: a sense
coil or sense winding
Q: What are non-volatile read / wri te memories?
A: Magnetic core memories
Q: What are non-volatile read/wri te memories?
A: Magnetic core memories
Q: What are nonvolatile read / wri te memories?
A: Magnetic core memories
Q: What are non-volatile read / wri te memories used
A: Magnetic core memories
Q: What are non-volatile read / write memories?
A: Magnetic core memories
Q: What is a non-volatile read / wri te
A: Magnetic core memories
Q: What is used as auxiliary memory in computers?
A: Magnetic disk storage devices include floppy disk o r Hard disk
Q: What is used as auxiliary memory in the computers?
A: Magnetic disk storage devices include floppy disk o r Hard disk
Q: What are non-volatile read / wri te memories and
A: Magnetic core memories
Q: When a bit is stored in the Fig. 12.28 core, the voltage induced
A:
Q: What is used for writing the data on the magnetic surface and retrieving the
data
A: A conducting coil na med as Read / write Head
Q: What is used for writing data on the magnetic surface and retrieving the data
from
A: A conducting coil na med as Read / write Head
Q: What is a conducting coil named as Read / write Head used for?
A:
writing the data on the magnetic surface
Q: What is used to write data on the magnetic surface and retrieve the data from
A: A conducting coil na med as Read / write Head
Q: What is used for writing data on the magnetic surface and retrieving data from
it
A: A conducting coil na med as Read / write Head
Q: What is used to write the data on the magnetic surface and retrieve the data
A: A conducting coil na med as Read / write Head
Q: What is used for writing the data on the magnetic surface and retrieving data
from
A: A conducting coil na med as Read / write Head
Q: What is used to write data on the magnetic surface and retrieve the data from
it?
A: A conducting coil na med as Read / write Head
Q: What is used to write the data on the magnetic surface and retrieve the data
from it?
A: A conducting coil na med as Read / write Head
Q: What is a conducting coil named as Read / write Head?
A: na med
Q: The direction of the output induced voltage pulse will be according to the
polarity of the
A: Return to Zero (RZ) wave form
Q: What is RZ?
A: Return to Zero
Q: What does RZ stand for?
A: Return to Zero
Q: What are some ways to represent the digital dat a on the magnetic surface?
A: Return to zero (RZ) ,
Q: What are three ways to represent the digital dat a on the magnetic surface?
A: Return to zero (RZ) ,
Q: What is a return to zero?
A: pulse always return to zero after a ‘1’ occurs
Q: What is a return to zero waveform?
A: RZ)
Q: What does RZ stand for?
A: Return to Zero
Q: What is RZ?
A: Return to Zero
Q: What is a non return to zero waveform?
A: NRZ) waveform is shown in figu re 12.32
Q: How many different frequencies are used to represent 0s or 1s in the Kansas City
method
A: Two
Q: At the start of a b it time transition from high to low represents a
A:
Q: At the start of a b it time transition from high to low represents a ‘
A: Manchester
Q: In the Manchester's waveform, at the start of a b it time transition
A:
Q: How many different frequencies are used to represent 0s and 1s in the Kansas
City method
A: Two
Q: How many frequencies are used to represent 0s or 1s in the Kansas City method?
A: Two
Q: How many frequencies are used to represent 0s or 1s in the Kansas City method
illustrated
A: Two different frequencies
Q: How many cycles of 1.2 KH z frequency are used to represent a ‘1
A: four
Q: How many different frequencies are used to represent 0s or 1s?
A: Two
Q: At the start of a b it time transition from high to low represents a "
A: Manchester
Q: What are used to represent a ‘0’?
A: cy
Q: How many tracks is the 5.2 5 inch floppy organized into?
A: 77
Q: What is used to represent a ‘0’?
A: Floppy Disk
Q: How many tracks does the 5.2 5 inch floppy have?
A: 77
Q: How many tracks are in the 5.2 5 inch floppy?
A: 77
Q: How many tracks does the 5.2 5 inch floppy have?
A: 77
Q: What are used to represent a ‘0’?
A: cy
Q: What is used to represent a ‘0’?
A: Floppy Disk
Q: What is used to represent a ‘0’?
A: Floppy Disk
Q: How many tracks are in the 5.2 5 inch floppy?
A: 77
Q: How many bytes of data can a floppy disk store?
A: 256 bytes per sector with a total c apacity of 512512 bytes
Q: How many bytes of data can a floppy disk store?
A: 256 bytes per sector with a total c apacity of 512512 bytes
Q: What can store 128 bytes of data?
A: data mark
Q: What is the average accessing time of a sector?
A: 500 ms
Q: How many bytes of data can a floppy disk store?
A: 256 bytes per sector with a total c apacity of 512512 bytes
Q: How many bytes can a floppy disk store?
A: 256 bytes per sector with a total c apacity of 512512 bytes
Q: What is the average accessing time of a sector?
A: 500 ms
Q: The format writing the data on each sector is divided into different fields as
shown in figure 12.37
A:
12.7
Q: How many bytes of data can a floppy disk store?
A: 256 bytes per sector with a total c apacity of 512512 bytes
Q: How many bytes of data can a floppy disk store?
A: 256 bytes per sector with a total c apacity of 512512 bytes
Q: In a hard disk system, magnetic disks of smooth meta l plates are coated on
A: both sides
Q: How are magnetic disks fixed to a rotating shaft in a hard disk system?
A: stacked
Q: In a hard disk system, magnetic disks of smooth meta l plates coated on both
A:
Q: In a hard disk system, magnetic disks of smooth meta l plates coated with
A: a thin film of magnetic material
Q: What are the magnetic disks of smooth meta l plates coated on both sides with a
A: thin film of magnetic material
Q: In a hard disk system, magnetic disks are coated on both sides with a thin
A: film of magnetic material
Q: In a hard disk system, magnetic disks of smooth meta l plates are coated with
A: a thin film of magnetic material
Q: What are the magnetic disks of smooth meta l plates coated on both sides with?
A: a thin film of magnetic material
Q: How are magnetic disks fixed in a hard disk system?
A: a rotating shaft
Q: How are magnetic disks stacked in a hard disk system?
A: fixed to a rotating shaft
Q: What is used to introduce bubbles and a bubble annihilator remov
A: bubble generator
Q: What is used to introduce bubbles and a bubble annihilator is used to
A: bubble generator
Q: How can bubbles be moved at high speed?
A: by applying parallel magnetic field to the surface of magnetic materials
Q: How can magnetic bubbles be moved at high speed?
A: by applying parallel magnetic field to the surface of magnetic materials
Q: What is used to introduce bubbles?
A: bubble generator
Q: How can magnetic bubbles be moved at high speed?
A: by applying parallel magnetic field to the surface of magnetic materials
Q: How can bubbles be moved at high speed?
A: by applying parallel magnetic field to the surface of magnetic materials
Q: How can magnetic bubbles be moved at high speed?
A: by applying parallel magnetic field to the surface of magnetic materials
Q: What is used to introduce bubbles?
A: bubble generator
Q: What is used to introduce bubbles and a bubble annihilator to remove the
A: bubble generator
Q: What are CCDs used to store?
A: data
Q: What are CCDs used for?
A: stor e the data
Q: What are CCDs used to store?
A: data
Q: What is another name for charge coupled devices?
A: CCDs
Q: What are the charge coupled devices used to store?
A: the data
Q: What are charge coupled devices used to store?
A: the data
Q: What are the charge coupled devices?
A: CCDs
Q: What are charge coupled devices?
A: CCDs
Q: What are the charge coupled devices?
A: CCDs
Q: What are charge coupled devices?
A: CCDs
Q: What is the name of the mass storage device capable of storing large data?
A: optical tec hnology
Q: What is a compact disk read only memory?
A: a direct extension of audio CD
Q: What is the cate gory of optical memories?
A: The compact disk read only memory
Q: What is a compact disk read only memory?
A: a direct extension of audio CD
Q: What is the cate gory of optical memories?
A: The compact disk read only memory
Q: What is the name of the mass storage device capable of storing large data?
A: optical tec hnology
Q: What is the cate gory of optical memories?
A: The compact disk read only memory
Q: What is the name of the mass storage device that can store large data?
A: optical tec hnology
Q: What is the compact disk read only memory?
A: a direct extension of audio CD
Q: What is a compact disk read only memory?
A: a direct extension of audio CD
Q: What can be reproduced by stamping a disk?
A: master disk many copies
Q: What does stamping a disk do?
A: many copies can be reproduced
Q: How can many copies of a master disk be reproduced?
A: stamping a disk
Q: What can be reproduced by stamping a disk?
A: master disk many copies
Q: How can many copies of a master disk be reproduced?
A: stamping a disk
Q: What does stamping a disk do?
A: many copies can be reproduced
Q: What does stamping a disk do?
A: many copies can be reproduced
Q: What does stamping a disk do?
A: many copies can be reproduced
Q: What can be reproduced by stamping a disk?
A: master disk many copies
Q: What is the process called that reproduces many copies of a master disk?
A: stamping a disk
Q: What is a computer memory to have 8192 words with 16 bits per word?
A:
bits
Q: What is the size of MAR and MBR?
A:
5
Q: How many words does a computer memory have?
A: 8192
Q: What are the sizes of MAR and MBR?
A:
5
Q: What are the sizes of MAR and MBR?
A:
5
Q: What is the size of MAR and MBR?
A:
5
Q: How many words is a computer memory to have?
A: 8192
Q: What are the sizes of MAR and MBR?
A:
5
Q: What are the sizes of MAR and MBR?
A:
5
Q: What is the size of MAR and MBR?
A:
5
Q: What is the diode matrix ROM for?
A: conversion of binary number to gray codes
Q: What is the diode matrix ROM used for?
A: conversion of binary number to gray codes
Q: How can ROM be used as function generator?
A: 17
Q: How can ROM be used as function generator?
A: 17
Q: How is MOS RAM programmed?
A: 18
Q: What can be used as function generator?
A: diode matrix ROM
Q: What is the diode matrix ROM for the conversion of?
A: binary number to gray codes
Q: How is MOS RAM programmed?
A: 18
Q: How is MOS RAM programmed?
A: 18
Q: What is the diode matrix ROM used for?
A: conversion of binary number to gray codes
Q: What does CCDS stand for?
A: Charge coupled Devices
Q: What does CCDS stand for?
A: Charge coupled Devices
Q: What is a CCDS?
A: Charge coupled Devices
Q: What is CDROM?
A: Compact Disk Read Only Memory
Q: What does CCDS stand for?
A: Charge coupled Devices
Q: What is a CDROM?
A: Compact Disk Read Only Memory
Q: What is CCDS?
A: Charge coupled Devices
Q: What does CCDS stand for?
A: Charge coupled Devices
Q: What is a compact disk read only memory?
A: CDROM
Q: What is a CCDS?
A: Charge coupled Devices
Q: 7408 Quad two-input AND gates 7409 Quad two-input N
A:
7410
Q: Quad two-input AND gates 7409 Quad two-input NAND gates with
A: collector
7410
Q: 7409 Quad two-input NAND gates with collector 7410 Triple three-in
A:
7411
Q: 7407 Quad two-input AND gates 7409 Quad two-input N
A:
7410
Q: Dual four-input NAND gates 7421 Dual four-input AND gates
A:
7427
Q: 7408 Quad two-input AND gates 7410 Quad two-input NAND
A:
7410
Q: 7409 Quad two-input NAND gates with collector 7410 Quad two-in
A:
7411
Q: What type of drivers open collector 7408 Quad two-input AND gates 7409
A: uffer drivers
Q: Quad two-input AND gates 7410 Quad two-input NAND gates with collector
A:
7409
Q: Dual four-input Schmitt trigger NAND gates 7414 Hex Schmit
A:
7413
Q: 7447 BCD to seven segment decoder/drivers (active low output
A:
7470
Q: 7448 BCD to seven segment decoder/drivers (active high output
A:
7470
Q: 7448 BCD to seven segment decoder/drivers (active low output
A:
7470
Q: What type of flip-flops have separate presets, clears and clocks?
A: D-type
Q: 7447 BCD to 7 segment decoder/drivers (active low output
A:
7470
Q: 7447 BCD to seven segment decoder/drivers (active high output
A:
7470
Q: What is 7447 BCD to seven segment decoder/drivers (active
A: low
outputs
Q: 7447 BCD to seven segment decoders (active low outputs)
A:
7470
Q: What is 7447 BCD to to seven segment decoder/drivers (
A: active low
outputs
Q: What type of flip-flops are 7472?
A: Edge triggered J K
Q: Input multiplexer 74151 8 – input multiplexer 74152 8
A:
74153
Q: What – II COMMONLY USED CMOS ICs Number Description 4
A: Appendix
Q: – II COMMONLY USED CMOS ICs Number Description 4000
A:
4000
Q: Input multiplexer 74151 8 - input multiplexer 74152 8
A:
74153
Q: What – II COMMONLY USED CMOS ICs Number Description
A: Appendix
Q: What is a commonly used CMOS ICs Number Description 4000 Dual 3
A: input NOR gare + inverter
Q: What – II COMMONLY USED CMOS ICs Number Description 40
A: Appendix
Q: What – II COMMONLY USED CMOS ICs Number Description 400
A: Appendix
Q: – II COMMONLY USED CMOS ICs Number Description 74
A:
4000
Q: What is a commonly used CMOS ICs Number Description?
A:
4000
Q: Input NAND gate 4012 Dual 4 – input NAND gate 4013 Dual D
A: 4033
Q: Quad analog switch/analog multiplexer 4017 Triple 3-input NAND gate
A: 4023
Q: Quad analog switch/analog multiplexer 4017 Decade counter 4018 Preset
A: 4019
Q: Dual D-type flip-flop 4014 8 –bit static shift register, synchronous
A: 4015
Q: What is the input NAND gate 4012?
A: uad 2
Q: Quad analog switch/analog multiplexer 4017 Quad analog switch/analog
A: 4016
Q: Dual D-type flip-flop 4014 8-bit static shift register, synchronous 40
A:
4015
Q: What is the input NAND gate 4012 Dual 4 – input NAND gate 4013
A: uad 2
Q: What type of switch/analog multiplexer 4017 Decade counter 4018 Pre
A: Quad analog
Q: What type of switch/analog multiplexer 4017 Triple 3-input NAND
A: Quad analog
Q: Quad NOR R S latch 4044 Quad NAND R S latch 4045 21 –
A:
4043
Q: What is a segment liquid crystal display driver 4055 BCD – to – 7
A: 4054
Q: Input multi function gate 4047 Phase locked loop 4047 Monostable /As
A:
4048
Q: Input multi function gate 4049 Hex inverter / buffer 4050 Hex
A: 4048
Q: Input multi function gate 4049 Quad analog switch 4068 8 – input NAND gate
A: 4066
Q: Input multi function gate 4049 Quad inverter / buffer 4050 Hex buffer
A: 4048
Q: What is a segment liquid crystal display driver 4055 BCD?
A: 4054
Q: Input multi function gate 4049 Dual inverter / buffer 4050 Hex buffer
A: 4048
Q: Input multi function gate 4049 Quad inverter / buffer 4050 Quad buffer 40
A: 4048
Q: – input multi function gate 4048 8 – input multi function gate 4049 Quad analog
A:
4049
Q: NBCD adder 4581 4 - bit ALU 4585 4 – bit
A:
4560
Q: – bit priority encoder 4537 256 x 1 bit RAM 4543 BCD
A: 4532
Q: What – bit priority encoder 4537 256 x 1 bit RAM 4543 B
A: 4532
Q: What is a bit priority encoder 4537 256 x 1 bit RAM 4543
A: 4532
Q: NBCD adder 4581 4 – bit ALU 4585 4 – bit
A:
4560
Q: NBCD adder 4581 4 - bit ALU 4585 4 - bit
A:
4560
Q: 4 – bit ALU 4585 4 – bit magnitude comparator 4720 256
A:
4585
Q: ALU 4585 4 – bit magnitude comparator 4720 256 x 1 bit
A:
4585
Q: NBCD adder 4581 4 - bit ALU 4556 Dual 2 –
A:
4581
Q: 4 – bit ALU 4585 4 – bit magnitude comparator 4560 Succ
A:
4585
Q: Synchronous programmable decade counter 40161 Synchronous programmable binary
counter
A:
40192
Q: ynchronous programmable decade counter 40161 Synchronous programmable
A:
40192
Q: Ynchronous programmable decade counter 40161 Synchronous programmable
A:
40192
Q: What is 40161 Synchronous programmable binary counter 40162 Synchronous
A: ynchronous programmable decade counter
Q: Synchronous programmable decade counter 40161 Synchronous programmable programm
A:
40192
Q: Synchronous programmable binary counter 40162 Synchronous programmable decade
counter
A:
40192
Q: What is 40192 Programmable up/down decade counter 40193 Programmable up/down
A: 40194 4 – bit bidirectional universal shift registe r
Q: What is 40161 Synchronous programmable decade counter 40162 Synchronous
A: 40192
Q: What is the Synchronous programmable decade counter 40161?
A:
40192
Q: What is 40192 Programmable up/down decade counter?
A: 40193
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