NE587 LED Decoder/Driver Specs
NE587 LED Decoder/Driver Specs
RBI 5 14 b
6 c
FEATURES D3 13
• Measuring instruments LE 3 18 g
D3 7 14 c
D0 8 13 d
IP 9 12 e
NOTE:
1. SOL and non-standard pinout.
ORDERING INFORMATION
DESCRIPTION TEMPERATURE RANGE ORDER CODE DWG #
20-Pin Plastic Small Outline Large (SOL) Package 0 to +70°C NE587D1 0172D
18-Pin Plastic Dual In-Line Package (DIP) 0 to +70°C NE587N 0407A
NOTES:
1. SOL and non-standard pinout
BLOCK DIAGRAM
BI/RBO (4)
VCC (18) ..
RBI (5)
D0 (7)
D1 (1) BCD TO
DATA
(2) LATCHES 7-SEGMENT
D2 DECODER
(6)
D3
LE (3)
a (15)
b (14)
c (13)
(8) BANDGAP SEGMENT
IP REFERENCE CURRENT d (12)
DRIVER
e (11)
DC ELECTRICAL CHARACTERISTICS
VCC=4.75 to 5.25V, 0°C < TA < 70°C. Typical values are at VCC=5V, TA=25°C, RP=1kΩ (±1%), unless otherwise specified.
LIMITS
SYMBOL PARAMETER TEST CONDITIONS UNIT
Min Typ Max
VCC Operating supply voltage 4.75 5.00 5.25 V
VIH Input high voltage All inputs except BI 2.0 15 V
BI 2.0 5.5
VIL Input low voltage 0.8 V
VIC Input clamp voltage IIN=-12mA, TA=25°C -1.5 V
Inputs D0-D3, LE, RBI µA
VIN=2.4V 1.0 10
IIH Input high current VIN=15V 15 15
Input BI (Pin 4) 10 100 µA
RBI=H
VIN=VCC=5.25V
VIN=0.4V, Inputs D0-D3 -5
IIL Input low current LE, RBI -200 µA
Input BI
VCC=5.25V -0.7 mA
RBI=H, VIN=0.4V
VOL Output low voltage Output RBO 0.2 0.5 V
IOUT=3.0mA
Output RBO
VOH Output high voltage IOUT=-50µA 3.5 4.5 V
RBI=H
IOUT Output segment Outputs “a” through “g” 20 25 30 mA
“ON” current VOUT=2.0V
∆IOUT Output current ratio With reference to “b” segment 0.90 1.00 1.10
(all outputs ON) VOUT=2.0V
Output segment Outputs “a” through “g”
IOFF “OFF” current VOUT=5.0V 20 250 µA
VCC=5.25V
ICCO Supply current All outputs “ON” 33 55 mA
VOUT>1V
VCC=5.25V
ICCI Supply current All outputs blanked 50 70 mA
NOTES:
NE587 Programming:
The NE587 output current can be programmed, provided a program resistor, RP, be connected between IP (Pin 8) and Ground (Pin 9). The
voltage at IP (Pin 8) is constant (≈1.3V). Thus, a current through RP is IP ≈ 1.3V/RP, as shown in Figure 5. IO/IP is 20 in the 15 to 50mA output
current range.
AC ELECTRICAL CHARACTERISTICS
VCC=5V, TA=25°C, RL=130Ω, CL=30pF including probe capacity.
LIMITS
SYMBOL PARAMETER TEST CONDITIONS UNIT
Min Typ Max
tDAV Propagation delay (Figure 2) From data to output 135 ns
tDAV Propagation delay (Figure 3) From LE to output 135 ns
tW Latch enable pulse width (Figure 4) 30 ns
tS Latch enable setup time (Figure 4) From data to LE 20 ns
tH Latch enable hold time (Figure 4) From LE to data 0 ns
NOTES:
tDAV= (tHL+tLH)
TRUTH TABLE
BINARY INPUTS OUTPUTS
DISPLAY
INPUT LE RBI D3 D2 D1 D0 a b c d e f g RBO
- H * X X X X STABLE ** STABLE
0 L L L L L L H H H H H H H L BLANK
0 L H L L L L L L L L L L H H 0
1 L X L L L H H L L H H H H H 1
2 L X L L H L L L H L L H L H 2
3 L X L L H H L L L L H H L H 3
4 L X L H L L H L L H H L L H 4
5 L X L H L H L H L L H L L H 5
6 L X L H H L L H L L L L L H 6
7 L X L H H H L L L H H H H H 7
8 L X H L L L L L L L L L L H 8
9 L X H L L H L L L L H L L H 9
10 L X H L H L H H H H H H L H -
11 L X H L H H L H H L L L L H E
12 L X H H L L H L L H L L L H H
13 L X H H L H H H H L L L H H L
14 L X H H H L L L H H L L L H P
15 L X H H H H H H H H H H H H Blank
**BI X X X X X X H H H H H H H L** Blank
NOTES:
H=HIGH voltage level, output is “OFF”
L=LOW voltage level, output is “ON”
X=Don’t care
* The RBI will blank the display only if a binary zero is stored in the latches.
** RBO/BI used as an input overrides all other input conditions.
ÉÉÉÉÉÉÉ ÉÉÉÉÉÉ
LE
LE
ÉÉÉÉÉÉÉ ÉÉÉÉÉÉ
tW
D0–D3
ÉÉÉÉÉÉÉ tS
ÉÉÉÉÉÉ
tH
D0–D3
ÉÉÉÉÉÉÉ
ÉÉÉ ÉÉÉÉÉÉ
ÉÉÉ
ÉÉÉ
OUTPUT
ÉÉÉ
OUTPUT
Figure 3. tP Latch Enable to Output
a
Figure 4. Setup and Hold Times
f b
g
e c
Segment Identification
20.0 90.0
4.0 4.4 4.8 5.2 5.6 6.0 6.4 0 1.0 2.0 3.0 4.0 5.0 10 20 30 40 50 60 70 80
VCC (VOLTS) VOUT (VOLTS) TEMP (°C)
200 10.0
95 0
4.0 4.5 5.0 5.5 6.0 0 25 50 75 0.0
0 2.0 4.0 6.0 8.0 10.0
VCC (VOLTS)
TA (°C) RP (kΩ)
These voltages are all for single-diode displays. Some early red
VCC
displays had 2 series LEDs per segment; hence the forward voltage
drop was around 3.5V. 0.01µF VS
Thus, a maximum power dissipation calculation when all segments
are on, is:
D3 a
P D + V CC x I CC ) (V S * V F) x 7 x I SEG D2
b
x K DCmW D1
D0 c
NE587 d
Assuming VS = VCC = 5.25V
VF = 2.0V e
KDC = 100% LE f
IP g
PD MAX = 5.25 × 50 + 3.25 × 7 × 30mW = 945mW
However, the average power dissipation will be considerably less
than this. Assuming 5 segments are on (the average for all output RBI RBO
However, a major portion of this power dissipation (PD MAX) is drops an appreciable voltage, rather than the saturating PNP
because the current source output is operating with 3.25V across it. transistors shown in Figure 9. For example a Darlington PNP or
In practice, the outputs operate satisfactorily down to 0.5V, and so NPN emitter-follower may be preferable. Figure 8 shows the NE591
the extra voltage may be dropped external to the integrated circuit. as the digit driver in a multiplexed display system. The NE591 output
drops about 1.8V which means that the power dissipation is evenly
Suppose the worst-case VCC/VS supply is 4.75 to 5.25V, and that
distributed between the two integrated circuits.
the maximum VE for the LED display is 2.25V. Only 2.75V is
required to keep the display active, and hence 2.0V may be dropped Where VS and VCC are two different supplies, the VS supply may be
externally with a resistor from VCC to VS. The value of this resistor is optimized for minimum system power dissipation and/or cost.
calculated by: Clearly, good regulation in the VS supply is totally unnecessary, and
so this supply can be made much cheaper than the regulated 5V
2.0 1
RS + [ 10 ( W rating) supply used in the rest of the system. In fact, a simple unsmoothed
7 x I SEG 2
full-wave rectified sine wave works extremely well if a slight loss in
brightness can be tolerated. A transformer voltage of about
assuming worst case ISEG of 30mA.
3-4.5VRMS works well in most LED display systems. Waveforms are
Hence now shown below:
PD MAX = VCC × ICC +
(VS - VV - RX × 7 × ISEG) × 7 × ISEG × KDC
= 5.25 × 50 + 1.25 × 7 × 30mW VS
= 525mW
and
PD av = 5.0 × 30 + 1.25 × 5 × 25 = 306 mW.
If a diode (or 2) is used to reduce voltage to the display, then the ISEG
voltage appearing across the display driver will be independent of
the number of “ON” segments and will be equal to
VS - VF - nVd, VD ≈ 0.8V
The duty cycle for this system depends upon VS, VF and the output
Where n is the number of diodes used, power dissipation can be characteristics of the display driver.
calculated in a similar manner.
With
In a multiplexed display system, the voltage drop across the digit VS = 4.9V peak
driver must also be considered in computing device power VF = 2.0V
dissipation. It may even be an advantage to use a digit driver which
The duty cycle is approximately 60%.
VS
VCC
D3
D2
D1
D0
A0
DIGIT
A1 DECODE
LE BRIGHTNESS CONTROL
Figure 6. 4-Digit Display with Brightness Control and Leading-Edge Ripple Blanking
DATA BUS
ADDRESS BUS
ADDRESS
DECODE
NE591
D0 D1 D2 D3 D4 D5 D6 D7
VCC
a b c d e f g
.01µF
NE587
RP
VS
DIGIT 1
DIGIT 2
DIGIT 3
DIGIT 4
VCC
D3
D2
NE587
D1
D0
LE
RP