M2794.013400.
002
Mechatronics
Lecture 13
Digital Gates and Combinational Logics
Week 13: 5/30/2024
Spring 2024
Prof. Amy Kyungwon Han
The course material was adapted from Prof. Heui Jae Pahk’s lecture notes
M2794.013400.002 Mechatronics, Lec 13, SNU
Announcements
● No in-person lecture on 6/6
→ Two lecture videos will be uploaded next week (Lec 14, 15)
● Review lecture on 6/13
● Final exam on 6/14 at 6:30pm
● Final project presentation on 6/21 at 9am
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1) Analog Comparator
Summary of Lecture 11
● Operational Amplifier (Op Amp)
2) Voltage Follower
● Rules:
○ Zin=∞ (or i- ≒ i+ ≒ 0) and Zout ≒ 0
○ In open loop (or no feedback)
■ If V+ > V- then Vout = +Vcc
3) Current Source
■ If V+ < V- then Vout = -Vcc
○ In closed loop (or negative feedback or feedback
4) Inverting Amplifier
to V-)
■ V- ≒ V+
○ |Vout| ≤ +Vcc
● 8 Applications
5) Summing Amplifier 6) Non-inverting Amplifier 7) C/V Converter
8) Differential Amplifier
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Summary of Lecture 12
9) Integrator
Additional 4 Applications:
1 Example: Large R2 to
prevent OP Amp
saturation
10) Differentiator
Roll-off
function
circuit
12) Analog to Digital Converter
11) Digital to Analog Converter
ii - Ladder method or R-2R resistors method
i - Binary weighed resistor method
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Digital Gates and Combinational Logics
We will be dealing with digital signals in today’s lecture.
Combinational logic circuits are made up from basic logic digital gates.
Let’s first learn what digital is:
Analog Digital
A Single line Multiple lines
Rich analog information Digital H/L information
Weak immunity against noise Strong immunity against noise
Limited resource for computation Large resource (μP, Digital Device)
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Three logic states
H = 1 = True = 5V (for CMOS and TTL)
L = 0 = False = 0V
Open = Disable/High-Impedance ∴ Q = [0, 1, Open]
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Data Width: Number of Bits for data representation
1 = Bit, 4 = Nibble, 8 = Byte, 16 = Word, 32 = Long Word
∴ 1 Long Word = 2 Word = 4 Bytes = 8 Nibbles = 32 Bits
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Number Representation
Binary [0,1]: 1101B =11012 = 1∙23 + 1∙22 + 1 = 1310
Decimal [0,1,2,3,4,5,6,7,8,9]: 36D = 3610
Hexadecimal [0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F]: 3AH = 3A16 = 3∙16 +10 = 5810
0 = 0000 1 = 0001 2 = 0010 3 = 0011 4 = 0100
5 = 0101 6 = 0110 7 = 0111
8 = 1000 9 = 1001 A = 1010 B = 1011 C = 1100
D = 1101 E = 1110 F = 1111
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Relay (계전기,繼電器)
: Electro-Magnet connected to multiple switches for various functions
KA or KB
● Multiple points connected to
magnet
● 1, 2 : a(NO) Type, 3 : b(NC) Type
○ NO=Normally Open
○ NC=Normally Closed
● A1 , A2 : Terminals for Electro-Magnet
Source:
[Link]
Power-PCB-Relay/Other- [Link]
[Link] 9
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Functions of Relay:
1. Increase in number of switch points (접점, 接點)
ex) one to three
2. Voltage change
ex) 5V Switch to 12V Switch
3. Switch type conversion
ex) a Type to b Type or vice versa.
4. Logic function: Logic statement execution
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Gate and Truth Table
1. OR gate
: Q = A OR B = A∨B = A+B
Symbol Quad OR gate Relay Circuit Truth Table
A B Q
0 0 0
0 1 1
1 0 1
1 1 1
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Gate and Truth Table
2. AND gate
: Q = A AND B = A∧B = A∙B
Symbol Quad AND gate Relay Circuit Truth Table
A B Q
0 0 0
0 1 0
1 0 0
1 1 1
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Gate and Truth Table
_ _ _ _
3. NAND gate A∨B = A+B
: Q = A NAND B = Not (A∧B) = (Not A)∨(Not B) = A∨B = A+B
Symbol Quad NAND gate Relay Circuit Truth Table
A B Q
0 0 1
0 1 1
1 0 1
1 1 0
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Gate and Truth Table
_ _ _ _
4. NOR gate A∧B = A∙B
: Q = A NOR B = Not(A OR B) = Not A ∧ Not B = A∧B = A∙B
Symbol Quad NOR gate Relay Circuit Truth Table
A B Q
0 0 1
0 1 0
1 0 0
1 1 0
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Gate and Truth Table
5. Inverter gate
: Q = Not A = A
__
A
Symbol Implementation Relay Circuit Truth Table
A Q
0 1
1 0
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Gate and Truth Table
6. XOR (Exclusive OR) gate, Digital comparator
: Q = A XOR B = 1 (if A and B are different), 0 (if A and B are same)
= (A ∧ B) ∨ (A ∧ B) = A∙B + A∙B
Symbol Combinational Relay Circuit Truth Table
Logic Gate
A B Q
0 0 0
0 1 1
1 0 1
1 1 0
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How are logic gates made?
Logic gates are implemented using diodes or transistors.
For example, OR gates can be made with:
Note: No need to know how to
build logic gates in this course.
[Link]
hbase/Electronic/[Link] 17
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Logic Statement/Logic Function - Case 1
: Logic statement can be converted to Logic function. Then, the logic circuit can be drawn
accordingly.
Case 1) Self-Holding Circuit
: To hold the Switch function (‘ON’) even when the Switch is released. It is widely applied to
M/C operation.
Relay Circuit
Logic Gate
A + K A = KA
Logic: A + Q = Q KA = Q
∴A+Q=Q
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Logic Statement/Logic Function - Case 1 (Cont’d)
For OFF function, we need a OFF S/W (B signal) pressed.
Two modes of circuit configuration: Dominant ON mode and Dominant OFF mode.
(1) Dominant ON
: Insert OFF S/W, B, in front of OR gate. This gives ON even when both A and B switches
are pressed. Then, the logic function is, A + B∙Q=Q
Relay Circuit
Logic Gate
A + KA⋅B = KA
KA = Q
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Logic Statement/Logic Function - Case 1 (Cont’d)
(2) Dominant OFF
: Insert OFF S/W, B, in front of AND gate. This gives OFF when both A and B are pressed. The
logic function is, (A + Q)∙B = Q
Relay Circuit
Logic Gate
(A + KA)⋅B = KA
KA = Q
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Logic Statement/Logic Function - Case 2
Case2) Interlock Circuit (or Quiz Circuit)
: To interlock each other. This gives the fastest signal to pass while others are locked. Also
called ’Quiz Circuit’.
Logic Function: A∙Q = P, B∙P = Q
Relay Circuit
Logic Gate
A ⋅ KB = KA
B ⋅ KA = KB
KA = P
KB = Q
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Homework 10
HW10) Design a Quiz circuit for 3 inputs
(Show the logic function, logic gate, and relay circuit)
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Karnaugh Map
: To derive logic function from the logic statement or truth table
Step 1: Make a Truth Table
Step 2: Make a Karnaugh Map by changing only one bit to the next location in the
sequence
Step 3: Identify the location of 1’s on the map and get the Logic function
Step 4: Verify the Karnaugh Map by checking the Truth table
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Ex) Design an Electronic Voting System of 3 inputs (A, B, C) such
that when at least two inputs are 1, then output(Q) is 1.
Truth Table Karnaugh Map Logic Gates
A B C Q
C AB
0 0 0 0 00 01 11 10
0 0 1 0 0 0 0 1 0
0 1 0 0 1 0 1 1 1
0 1 1 1
1 0 0 0 ∴ Logic Function :
1 0 1 1 The location 1’s gives
Q = AB + AC + BC
1 1 0 1 Therefore, the logic gates are widely used for logic
1 1 1 1 calculations.
Similarly, the arithmetic gates such as Adder,
Subtractor, Multiplier, Divider gates can be used for
arithmetic calculation as follows (next page);
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Arithmetic Gates
Adder Gate, X+Y=A Subtractor Gate, X-Y=A
Multiplier Gate, X*Y=A; SHL(SHift Left) and Add Divider Gate, X/Y=A; SHR(SHift Right) and Subtract,
where quotient (lower 4bits), Remainder (higher 4bits)
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Summary of Lecture 13 Relay
Digital Gates and Combinational Logics
● Relay
● Digital Gates:
○ OR gate: Q = A OR B = A+B
○ AND gate: Q = A AND B = A∙B
○ NAND gate: Q = A NAND B = A∨B = A+B
○ NOR gate: Q = A NOR B = A∧B = A∙B
○ Inverter gate: Q = Not A = A
○ XOR gate: Q = A XOR B = A∙B + A∙B
● Logic Statement/Logic Function
○ Case 1: Self-Holding Circuit - Dominant On/Off
○ Case 2: Interlock Circuit (or Quiz Circuit)
● Karnaugh Map
● Arithmetic Gates
○ Adder, Subtractor, Multiplier, Divider
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