Subtractions by 1’s Complement: , oro a8 S subtsahend The algorithm to subtract two binary number using 1’s complement is explained as following below: Take 1’s complement of the subtrahend Add with minuend a + If the result of above addition has carry bit 1, then add it to the least significant bit (LSB) of given result If there is no carry bit 1, then take 1’s complement of the result which will be negative x Note that subtrahend is number that to be subtracted from the another number, i.e., minuend.—— eee Subtractions by 1’s Complement: 2 5 Example (Case-1: When Carry bit 1): Evaluate 10101 - 00101 1's complement of Ootet = LLoto fotoL Ans: Lo000 = (\6),Si Subtractions by 1’s Complement: 21 So + Example (Case-2: When no Carry bit): Evaluate 10101-11110 Ls complememt of 11110 = 00001 oo4 fotot F+oOooO4 Cro Lotito scomplement of eu = 01001Subtraction using 2's complement pag cB moter 7 he These are the following steps to Sublsek Lwo binary numbers using 2's complement In the first step, find the 2's complement of the subtrahend. Add the complement number with the minuend. + If we get the carry by adding both the numbers, then we discard this carry and the result is positive else take 2's complement of the result which will be negative.Subtraction using 2's complement Qu e Example 1: 10101 - 00111 discard cam Us comp of O01 = Nooo dy = Conte), 2's comp of Ooitl = Hooe . , 7 Hoo! ot0! + \lool cx OlleSubtraction using 2's complement Example 2: 10101-10111 = €2, toke 2's comp of resulk ; I's comp: 0000) 1s comp of loll = 1000 ont Q'scomp: 0000) 2's womp of loll = C1000 f 1 2 Olool lo10 1 ~ (00010), = €2), Oloo! Wilo coBinary Multiplication Binary multiplication is similar to decimal multiplication. It is simpler than decimal multiplication because only 0s and 1s are involved. There are four rules of binary multiplication. 65 mel Case AxB Multiplication ae 1 0x0 0 65 x 2 ox4 0 910 3 1x0 0 7 4 1x4 1Binary Multiplication Example: 0011010 x 001100 = 100111000 QOEIOAP «CREAR 0011010 =260 49000000 0000000% }011010xx 0011010xx» 0111000 =3120— ee Overflow + Overflow occurs when there are insufficient bits in a binary number representation to portray the result of an arithmetic operation. Overflow occurs because computer arithmetic is not closed with respect to addition, subtraction, multiplication, or division. Overflow cannot occur in addition (subtraction), if the operands have different (resp. identic4l) signs. a ee + To detect and compensate for overflow, one needs(@*i)bits if an n-bit number representation is employed. For example, in 32-bit arithmetic, 33 bits are required to detect or compensate for overflow. This can be implemented in addition (subtraction) by letting a carry (borrow) occur into (from) the sign bit. To make a pictorial example of convenient size,Overflow Figure illustrates the four possible sign combinations of differencing 7 and 6 using a number representation that is four bits long (i.e., can represent integers in the interval [-8,7]). ~** | :9!! » due to ovrsflow cigs ts 1000 Zs comp: 100) bi changus which, : 146 2s “T+ . e my ca Form Coop te qe covong rresulb- ) 0 ot 7 aay Sign bit=O 1-6 =-74-6 1001 (Ie) +1010 (64) OOTT (Ba) sip bite O+ Addition (or swe) sing U's comp L, Keep tue mumbers as it is Ly take t's tomp of -vene + Addition (or sub) using 2's comp LL Keep tue numbers a it (5 f Lo take 2's comp of Ve To:a Q1 Consider Z=X-Y, where X, Y and Z are all in sign-magnitude form. X and Y are each represented in “n” bits. To avoid overflow, the Pare of Z would require a minimum of: ‘n+1 bits (B) n-1 bits Cnt2 bits Dn bitsa Q2 The base (or radix) of the number system such that the following equation holds:is............ 312/20 = 13.1 ao @ir), = Sxte nae (20), = 2x 5) (3), M34 y Syrext2 - aot ax Spe ty eK ena pix " nlna Q3 Let X be the number of distinct 16 -bit integers in 2’s complement representation. Let Y be the number of distinct 16-bit integers in sign magnitude ee Then X-Y is ......4... 2's comp: =2" to 1 Sign ‘mag -Q® i) to Q'*-1)a Q4 Consider the number given by the decimal expression. 1659+ 16 7+16x5+3 The number of 1’s in the unsigned binary representation of the number is ~ (9453), (oo! ott! olot oot), SolsFixed and i (oye ay ke) Numbers yr—— eee Storing Real Number There are two major approaches to store real numbers (i.e., numbers with fractional component) in modern computing. Fixed Point Notation : In fixed point notation, there are a fixed number of digits after the decimal point. Floating Point Notation : Floating point number allows for a varying number of digits after the decimal point.Fixed point Representation + This representation has a fixed number of bits for the integer part and for the fractional part. For example, if the given fixed-point representation is IILFFFF, then you can store a minimum value is 0000.0001 and a maximum value is 9999.9999. + There are three parts of a fixed-point number representation: Sign field, “ Integer field “ Fractional field.”Fixed point Representation a Fe x Unsigned Fixed Point Representation: X Signed Fixed Point Representation:—— eee Range in Fixed point Representation We can represent these numbers using: Signed representation: range from -(2")-1) to (2 Sy, for k bits. 1's complement representation: range from -(2)-1) to (2-1), for k bits. + 2’scomplementation representation: range from -(2")) to (2-1), for k bits. + 2’scomplementation representation is preferred in computer system because of unambiguous property and easier for arithmetic operations. © has 0. single representationFixed-Point Representation Example : Assume number is using 32-bit format which reserve 1 bit for the sign, 16 bits for the integer part and 15 bits for the fractional part. Find the value in decimal of the min and max that can be stored, also find the Range. Represent -50.675 using the above representation scheme. vin: CD Avat vsee thd Leet (Hm EU) 26-1 wl mor: oO LEE t bye UEUE CEEbe ama tay ange: €2!® to 2)LL ©000 0000 ool! 0010. LoL Ollo Ollo Ollo ~ §0-645 Eo oc : O-6F5x2 +135 1 iD 0.35x2 = 0-40 o 25 in 1 OFox2= 1-40 L 2 O4ox2 = 0-80 c 2 6 ° 2 O8ox2~ | 60 ' é 3 ° 0-60x2+ 120 : Zz ° g 4 L ° yoo sSi Floating-Point Representation + This representation does not reserve a specific number of bits for the integer part or the fractional part. + The floating number representation of a number has two part. + Mantissa : Represents a signed fixed point number. Exponent : Represents the position of the decimal (or binary) point. + Floating -point is always interpreted to represent a number in the following form: ai exponent Qa438),, = 294-35 x10" : on ‘mantissa, 2943-8 x lo = 29438 x 108Si Floating-Point Representation x Only the mantissa m and the exponent e are physically represented in the register (including their sign). A floating-point binary number is represented in a similar manner except that is uses base 2 for the exponent. A \ Floating point number is said to be normalized if the most significant ae Signbit| Mantissa S50 : We SEL: =e Biased form ", exponent x| So, actual number isAa+my x2, where s is the sign bit, mis the mantissa, e¢ is the exponent value, and Bias is the bias number.Floating-Point Representation <4 Example : Suppose number is using 32-bit format: the 1 bit sign bit, 8 bits for signed exponent, and 23 bits for the fractional part. The leading bit 1 is not stored (as it is always 1 for a normalized number) and is referred to as a “hidden bit bit”. 3246+ 4 +1 deumal shifted © Left o™~ Then -53.5 is normalized as. -§35= (tio ee a eS ae is represented as following below, aaa Addn bit exponent ESR} 0101 Sign Exponent part Mantissa part bit 5s 4H. : : exponent volid IEEE Floating point Number Representation rome: 1 t 254 23 mantissa, 1-10 bios + The smalles}~normalized posftive number that fits into 32 bits is (1.000q)0009000q00000000000),x229-22~1.18x108 —, and largest normalized positive number that fits into 32 bits is (1.11111111111111111111111) x 22 (224-1) x2"! = 3.40x10°8 . na 8 HN 23 ee for exporant Sent | __ Eaponend Mantssa -(28 to 12#: 2s comp ichidden bit + So, actual number is (-1)*(1+m)x2¢88), where s is the sign bit, m is the mantissa, ¢ is the exponent value, and Bias is the bias number. The sign bit is 0 for positive number and 1 for negative number. Exponents are represented by or two's complement representation.IEEE Floating point Number Representation Half Precision (16 bit): 1 sign bit, 5 bit exponent, and 10 bit mantissa Single Precision (32 bit): 1 sign bit, 8 bit exponent, and 23 bit mantissa Double Precision (64 bit): 1 sign bit, 11 bit exponent, and 52 bit mantissa + Quadruple Precision (128 bit): 1 sign bit, 15 bit exponent, and 112 bit mantissaConsider the unsigned 8-bit fixed point binary number representation below bbgbsbybs . brbyby where the position of the binary point is between b, and b,. Assume 7 is the most significant bit. Some of the decimal numbers listed below cannot be represented exactly in the above representation: (i) 31.500 Bl: 16+8+4+2t1= HII Os: O01 eqiu-d (ii) 0.875, 0+. 00000 0 8f5= Os +028 +0125 iii 1D: 844= O1lo =O! o0000- 117) (iii) 12.100 x 1 Ol cee (iv) 3.001 x Which one of the following statements is true? (a) None of (i),(ii),(iii),(iv) can be exactly represented (b) Only (ii) cannot be exactly represented ly (iii) and (iv) cannot be exactly represented (d) Only (i) and (ii) cannot be exactly representedGC > Cl+m) 20e-bias) Q6 Consider three registers R1, R2 and R3 that store numbers in IEEE-754 single precision floating point format. Assume that R1 and R2 contain the values (in hexadecimal notation) 0x42200000 and | 1200000, respectively. If R3 = R1/R2, what is the value stored in R3? hexadecimal, (a) 0 x 40800000 R,: 0100 o010 Colo o- ; (b) 0 x 40800000 " / coo Single precision, 32 bit (0,9 x C8500000 sign Lot Sgr bean ‘0 x C 0800000 130-104 B bit (23 (or) 2 = 11x25 et 1 o00 o001) (000 : — 23 bit | monbisso. co 08 R,: {oo o00! Golo 00 7 = sigh iA co mantissa, Ree Ree = n 10 129-127 ze {+0.000) -( oad), -(ropxee ie MC i