MICROPROCESSOR AND MICROCONTROLLER
Mr. Anand H. D.
Department of Electronics & Communication Engineering
Dr. Ambedkar Institute of Technology
Bengaluru-56
MICROPROCESSOR AND MICROCONTROLLER: INTRODUCTION
Prepared by Prof. Anand H. D., Dept. of ECE, Dr. AIT, Bengaluru-56 1
Topics to be covered:
RISC & CISC CPU Architectures
Harvard & Von- Neumann CPU architecture
MICROPROCESSOR AND MICROCONTROLLER: INTRODUCTION
Prepared by Prof. Anand H. D., Dept. of ECE, Dr. AIT, Bengaluru-56 2
Lets look into:
RISC & CISC CPU Architectures
Harvard & Von- Neumann CPU architecture
MICROPROCESSOR AND MICROCONTROLLER: INTRODUCTION
Prepared by Prof. Anand H. D., Dept. of ECE, Dr. AIT, Bengaluru-56 3
RISC & CISC CPU Architectures
RISC Architecture
➢ The term RISC stands for ‘’Reduced Instruction Set Computer’’.
➢ This is a small or reduced set of instructions.
➢ Here, every instruction is expected to attain very small jobs.
➢ In this machine, the instruction sets are modest and simple.
➢ Each instruction is of a similar length; these are wound together to get compound tasks done in a single
operation.
➢ Most commands are completed in one machine cycle. This pipelining is a crucial technique used to speed
up RISC machines.
Characteristics
➢ Pipeline architecture
➢ The number of instructions is restricted as well as decrease
➢ The instructions like load as well as store have right of entry to memory
➢ Addressing modes are less
➢ Instruction is uniform and its format can be simplified
MICROPROCESSOR AND MICROCONTROLLER: INTRODUCTION
Prepared by Prof. Anand H. D., Dept. of ECE, Dr. AIT, Bengaluru-56 4
RISC & CISC CPU Architectures
Advantages:
➢ The performance of this processor is good because of the easy & limited no. of the
instruction set.
➢ This processor uses several transistors in the design and cheaper.
➢ it can finish its task within a single clock cycle.
Disadvantages:
➢ The performance of this processor may change based on the executed code because
the next commands may depend on the earlier instruction for their implementation
within a cycle.
➢ The complex instruction is frequently used by the compilers and programmers
MICROPROCESSOR AND MICROCONTROLLER: INTRODUCTION
Prepared by Prof. Anand H. D., Dept. of ECE, Dr. AIT, Bengaluru-56 5
RISC & CISC CPU Architectures
CISC Architecture
➢ The term CISC stands for ‘’Complex Instruction Set Computer’’.
➢ It is a CPU design plan based on single commands, which are skilled in executing multi-step
operations.
➢ CISC computers have small programs.
➢ It has a huge number of compound instructions, which takes a long time to perform.
➢ Maximum instructions are finished in two to ten machine cycles. In CISC, instruction pipelining is
not easily implemented.
Characteristics
➢ CISC may take more time to execute the code as compared with an only clock cycle.
➢ CISC supports high-level languages for simple compilation and complex data structure.
➢ It is collected with more addressing modes, fewer registers normally from 5 to 20.
➢ For writing an application, less instruction is required. The code length is very short, so it needs
extremely small RAM.
➢ Instructions are larger as compared with a single word.
MICROPROCESSOR AND MICROCONTROLLER: INTRODUCTION
Prepared by Prof. Anand H. D., Dept. of ECE, Dr. AIT, Bengaluru-56 6
RISC & CISC CPU Architectures
Advantages:
➢ In the CISC processor, the compiler needs a small effort to change the program or
statement from high-level to assembly otherwise machine language.
➢ A single instruction can be executed by using different low-level tasks
➢ It doesn’t use much memory due to a short length of code.
➢ CISC utilizes less instruction set to execute the same instruction as the RISC.
➢ The instruction can be stored within RAM on every CISC
Disadvantages:
➢ As compared with the RISC processor, CISC processors are very slow while executing
every instruction cycle on every program.
➢ The pipeline execution within the CISC will make it difficult to use.
➢ The machine performance reduces because of the low speed of the clock.
MICROPROCESSOR AND MICROCONTROLLER: INTRODUCTION
Prepared by Prof. Anand H. D., Dept. of ECE, Dr. AIT, Bengaluru-56 7
RISC & CISC CPU Architectures
RISC CISC
RISC stands for Reduced Instruction Set CISC stands for Complex Instruction Set
Computer. Computer.
RISC processors have simple instructions CSIC processor has complex instructions
taking about one clock cycle. that take up multiple clocks for execution.
Performance is optimized with more focus Performance is optimized with more focus
on software on hardware.
The instruction set is reduced i.e. it has The instruction set has a variety of different
only a few instructions in the instruction instructions that can be used for complex
set. Many of these instructions are very operations.
primitive.
Complex addressing modes are synthesized CISC already supports complex addressing
using the software. modes
Multiple register sets are present Only has a single register set
MICROPROCESSOR AND MICROCONTROLLER: INTRODUCTION
Prepared by Prof. Anand H. D., Dept. of ECE, Dr. AIT, Bengaluru-56 8
RISC & CISC CPU Architectures
RISC CISC
RISC processors are highly pipelined They are normally not pipelined or less
pipelined
Execution time is very less Execution time is very high
Code expansion can be a problem Code expansion is not a problem
The decoding of instructions is simple. It requires external memory for
calculations
The most common RISC microprocessors Examples of CISC processors are the
are Alpha, ARC, ARM, AVR, MIPS, PA- System/360, VAX, PDP-11, Motorola
RISC, PIC, Power Architecture, and 68000 family, AMD, and Intel x86 CPUs.
SPARC.
RISC architecture is used in high-end CISC architecture is used in low-end
applications such as video processing, applications such as security systems,
telecommunications, and image home automation, etc
processing.
MICROPROCESSOR AND MICROCONTROLLER: INTRODUCTION
Prepared by Prof. Anand H. D., Dept. of ECE, Dr. AIT, Bengaluru-56 9
Lets look into:
RISC & CISC CPU Architectures
Harvard & Von- Neumann CPU architecture
MICROPROCESSOR AND MICROCONTROLLER: INTRODUCTION
Prepared by Prof. Anand H. D., Dept. of ECE, Dr. AIT, Bengaluru-56 10
Harvard & Von- Neumann CPU architecture
Von Neumann Architecture:
➢ Von Neumann Architecture is a digital
computer architecture whose design is
based on the concept of stored program
computers where program and data are
stored in the same memory.
➢ This architecture was designed by the
famous mathematician and physicist John
Von Neumann in 1945.
MICROPROCESSOR AND MICROCONTROLLER: INTRODUCTION
Prepared by Prof. Anand H. D., Dept. of ECE, Dr. AIT, Bengaluru-56 11
Harvard & Von- Neumann CPU architecture
Harvard Architecture:
➢ Harvard Architecture is the digital
computer architecture whose design is
based on the concept where there are
separate storage and separate buses (signal
path) for instruction and data.
➢ It was basically developed to overcome
the bottleneck of Von Neumann
Architecture.
MICROPROCESSOR AND MICROCONTROLLER: INTRODUCTION
Prepared by Prof. Anand H. D., Dept. of ECE, Dr. AIT, Bengaluru-56 12
Harvard & Von- Neumann CPU architecture
VON NEUMANN ARCHITECTURE HARVARD ARCHITECTURE
It is ancient computer architecture based on It is modern computer architecture based on
stored program computer concept. Harvard Mark I relay based model.
Same physical memory address is used for Separate physical memory address is used for
instructions and data. instructions and data.
There is common bus for data and instruction Separate buses are used for transferring data
transfer. and instruction.
The decoding of instructions is simple. It requires external memory for calculations
It is cheaper in cost. It is costly than Von Neumann Architecture..
CPU can not access instructions and read/write CPU can access instructions and read/write at
at the same time. the same time
It is used in personal computers and small It is used in micro controllers and signal
computers. processing.
MICROPROCESSOR AND MICROCONTROLLER: INTRODUCTION
Prepared by Prof. Anand H. D., Dept. of ECE, Dr. AIT, Bengaluru-56 13
Thank You
Prof. Anand H. D.
M. Tech. (PhD.)
Assistant Professor,
Department of Electronics & Communication Engineering
Dr. Ambedkar Institute of Technology, Bengaluru-56
Email: [email protected]
Phone: 9844518832
14
