Analog and Mixed Mode VLSI Design

Analog and Mixed Mode

VLSI Design

VINEETA P. GEJJI
Professor
Department of Electronics and Communication Engineering
Gogte Institute of Technology
Belgaum, Karnataka

New Delhi-110001
2011
ANALOG AND MIXED MODE VLSI DESIGN
Vineeta P. Gejji

© 2011 by PHI Learning Private Limited, New Delhi. All rights reserved. No part of this book
may be reproduced in any form, by mimeograph or any other means, without permission in
writing from the publisher.

ISBN-978-81-203-4229-3

The export rights of this book are vested solely with the publisher.

Published by Asoke K. Ghosh, PHI Learning Private Limited, M-97, Connaught Circus,
New Delhi-110001 and Printed by Mudrak, 30-A, Patparganj, Delhi-110091.
 To
my teachers
and
my students
 Contents

Preface ............................................................................................................. xi
Acknowledgements ......................................................................................... xiii

Chapter 1: Introduction to Analog and Mixed Signal Design ....... 1–6

Learning Objectives
1.1 Challenges in Analog Design ................................................................ 1
1.2 Mixed Signal Processing Blocks ........................................................... 3
1.3 A Mixed Signal Example ....................................................................... 3
1.4 Mixed Signal Layout Issues................................................................... 4
1.4.1 Floor Planning ............................................................................. 4
1.4.2 Power Supply and Grounding Issues ........................................ 4
1.4.3 Guard Rings ................................................................................ 5
1.4.4 Shielding ...................................................................................... 5
1.5 Summary .................................................................................................. 6
Exercises ........................................................................................................... 6

Chapter 2: Basic MOS Device ............................................................ 7–19

Learning Objectives
2.1 MOS Symbols ......................................................................................... 8
2.2 MOSFET Structures ................................................................................ 9
2.3 MOS V/I Characteristics ....................................................................... 10
2.4 Large Signal Model .............................................................................. 11
2.5 Small Signal Model .............................................................................. 11
2.6 Single Stage Amplifier ......................................................................... 13
2.7 Common Source Stage with Diode-connected Load ......................... 14
2.8 CS Stage with Current Source Load ................................................... 15
2.9 Source Follower .................................................................................... 16
2.10 Common Gate Stage ............................................................................. 17
2.11 Cascode Stage........................................................................................ 18
2.12 Summary ................................................................................................ 19
Exercises ......................................................................................................... 19

vii
viii Contents

Chapter 3: Submicron CMOS Circuit Design ............................... 20–40

Learning Objectives
3.1 Submicron CMOS process flow .......................................................... 20
3.2 Capacitors and resistors ........................................................................ 22
3.3 Current Mirrors ...................................................................................... 25
3.4 Digital Circuit Design ........................................................................... 27
3.5 Delay Elements ...................................................................................... 30
3.6 Adders .................................................................................................... 32
3.7 Op-Amp .................................................................................................. 35
3.8 Op-Amp Parameters .............................................................................. 35
3.9 Op-Amp Design ..................................................................................... 38
3.10 Summary ................................................................................................ 39
Exercises ......................................................................................................... 39

Chapter 4: Data Converters .............................................................. 41–58

Learning Objectives
4.1 Characteristics of Sample and Hold .................................................... 41
4.2 Digital-to-Analog Converter (DAC) .................................................... 43
4.2.1 Differential Non-linearity (DNL) ............................................ 45
4.2.2 Integral Non-linearity (INL) .................................................... 45
4.3 Analog-to-Digital Converter (ADC) .................................................... 48
4.3.1 Differential Non-linearity ......................................................... 48
4.3.2 Integral Non-linearity ............................................................... 50
4.4 Summary ................................................................................................ 53
4.5 Solved Problems .................................................................................... 53
Exercises ......................................................................................................... 57

Chapter 5: Data Converter Architectures ...................................... 59–92

Learning Objectives
5.1 DAC Architectures ................................................................................ 59
5.2 Voltage Scaling DACs .......................................................................... 60
5.3 INL and DNL Measurements ............................................................... 61
5.4 R-2R Ladder Network .......................................................................... 64
5.5 Current Steering DAC .......................................................................... 65
5.6 INL and DNL Measurements ............................................................... 66
5.7 Charge Scaling DACs ........................................................................... 68
5.8 Cyclic DAC ........................................................................................... 72
5.9 Pipeline DAC......................................................................................... 73
5.10 ADC Architectures ................................................................................ 74
5.11 Flash ADC ............................................................................................. 74
5.12 Accuracy Issues of Flash ADC ........................................................... 76
5.13 Two-step Flash ADC ............................................................................ 77
 Contents ix

5.14 Accuracy Issues ..................................................................................... 78

5.15 Pipeline ADC......................................................................................... 79
5.16 Integrating ADCs .................................................................................. 80
5.17 Successive Approximation ADC ......................................................... 83
5.18 Oversampling ADC ............................................................................... 84
5.19 Summary ................................................................................................ 86
5.20 Solved Problems .................................................................................... 86
Exercises ......................................................................................................... 91

Chapter 6: SNR in Data Converters ............................................. 93–116

Learning Objectives
6.1 Overview of SNR of Data Converters ................................................ 93
6.2 Clock Jitter............................................................................................. 96
6.3 Improving SNR Using Averaging ....................................................... 98
6.4 Decimating Filters for ADC .............................................................. 101
6.5 Band Pass and High Pass Sinc Filters ............................................. 108
6.6 Interpolating Filters for DAC ............................................................ 110
6.7 Summary .............................................................................................. 111
6.8 Solved Problems .................................................................................. 112
Exercises ....................................................................................................... 116

Chapter 7: Introduction to Switched Capacitor Circuits ........ 117–121

Learning Objectives
7.1 Resistor ................................................................................................. 117
7.2 First Order Low Pass Circuit ............................................................. 119
7.3 Switched Capacitor Amplifier ............................................................ 119
7.4 Switched Capacitor Integrator ............................................................ 120
7.5 Summary .............................................................................................. 121
Exercises ....................................................................................................... 121

Appendix A: SPICE ............................................................................ 123–130

Appendix B: Design of Op-Amp ....................................................... 131–133

Bibliography ................................................................................................. 135

Index ..................................................................................................... 137–138

 Analog And Mixed Mode VLSI Design

Publisher : PHI Learning ISBN : 978812034 2293 Author : Vineeta P Gejji

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