Bahria University, Lahore Campus
Department of Computer Sciences
Lab Journal 06
(Spring 2024)
Course: Digital Design Lab Date: 21-03-2024
Course Code: CEL-120 Max Marks: 30
Faculty’s Name: Muhammad Shahid Lab Instructor: Muhammad Shahid
Name: Enroll No:
Title: Full Adder Circuit
Objective(s):
To understand the full adder circuit.
Lab Tasks:
Task 1:
i. Draw the truth table for a full adder circuit then simplify Sum and Carry equations using
K-Map.
ii. By utilizing two half adders, construct full adder circuit.
Task 2: Construct Full Adder using NAND and NOR gates.
Lab Grading Sheet :
Max Obtained
Task Comments(if any)
Marks Marks
1. 15
2. 15
Total 30 Signature
Note : Attempt all tasks and get them checked by your Lab Instructor
Full Adder Circuit
Objective(s):
“To understand the concept of full adder circuit ”.
Tool(s) used:
KL-31001 DLD Trainer
Any Module
Connector leads
Overview:
Full Adder is the adder which adds three inputs and produces two
outputs. The first two inputs are A and B and the third input is an input
carry as C-IN. The output carry is designated as C-OUT and the normal
output is designated as S which is SUM.
A full adder logic is designed in such a manner that can take eight inputs
together to create a byte-wide adder and cascade the carry bit from one
adder to the another.
Task 01: Time: 30 Minutes
(i) Draw the truth table for a full adder circuit then simplify Sum and Carry equations
using K-Map.
Truth Table:
INPUT OUTPUT
A B C¿ C out S
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
(ii) By utilizing two half adders, construct full adder circuit.
Circuit:
Task 02: (a)
Construct Full Adder using NAND and NOR gates. Time: 30+30 Minutes
.
NAND:
NOR:
Task 03: Time: 10 Minutes
Two 1's with NO carry-in are added using a full adder. What are the outputs?
C=1
S=0
Two 1's with a carry-in of 1 are added using a full adder. What are the outputs?
C=0
S=1
Task 04: Time: 10 Minutes
Write applications of full adder circuit.
Full Adder in Digital Logic
Full Adder is the adder that adds three inputs and produces two outputs. The first two inputs are A and
B and the third input is an input carry as C-IN. The output carry is designated as C-OUT and the normal
output is designated as S which is SUM. The C-OUT is also known as the majority 1’s detector, whose
output goes high when more than one input is high.
A full adder logic is designed in such a manner that can take eight inputs together to create a byte-wide
adder and cascade the carry bit from one adder to another.
We use a full adder because when a carry-in bit is available, another 1-bit adder must be used since a 1-
bit half-adder does not take a carry-in bit. A 1-bit full adder adds three operands and generates 2-bit
results.
Full adders are used in ALUs (arithmetic logic units) of CPUs of computers. Full adders are used in
calculators. Full adders also help in carrying out multiplication of binary numbers. Full adders are
also used to realize critic digital circuits like multiplexers.