Computer Data

Conversion
ICT – GRADE 11
 LESSON OBJECTIVES
By the end of the lesson, you should be able to:
• Define Data Conversion, Register, Address and Bus
• List the types of registers, and their functions.
• State differences between “register” and “memory”
• Explain the “fetch-decode-execute” cycle
• State factors affecting speed of data transfer
 DATA CONVERSION

Data conversion is the conversion of computer data

from one format to another. Data conversions may as
simple as the conversion of a text file from one character
encoding system to another; or more complex, such as the
conversion of office file formats, or the conversion of
image and audio file formats.
 REGISTERS
These are temporary storage areas for
instructions or data. They are not part
of memory; rather they are special
additional storage locations that offer
the advantage of speed. They are used
to quickly accept, store, and transfer
data and instructions that are being
used immediately by the CPU.
 ADDRESS
This is an identifier for a memory
location, at which a computer program
or a hardware device can store data
and later retrieve it. Each memory
location, in both ROM and RAM,
holds a binary number and only
depends on the context of the
instructions which retrieve and
manipulate it.
 BUS
The buses are media that connect the
microprocessor (CPU) to each of the
RAM, ROM, and input/output (I/0).
A bus is a link between components or
devices connected to a computer. For
example, a bus carries data between a
CPU and the system memory via the
motherboard.
 TYPES OF REGISTERS
Memory Data Register (MDR)
This is a register of a computer’s control unit that contains the data
to be stored in the computer storage (e.g. RAM), or the data after a
fetch from the computer storage. It acts like a buffer and holds
anything that is copied from the memory ready for the processor to
use it.
 TYPES OF REGISTERS
Current Instruction Register (CIR)
This register is used to store the instruction(s) that is/are currently
executed or that will be decoded. The instructions can be executed
in one single step or in multiple steps.
 TYPES OF REGISTERS
Current Instruction Register (CIR)
This register is used to store the instruction(s) that is/are currently
executed or that will be decoded. The instructions can be executed
in one single step or in multiple steps.
 TYPES OF REGISTERS
Memory Address Register (MAR)
This register holds the memory addresses of data and instructions,
and is used to access data and instructions from memory during the
execution phase of an instruction. Suppose the CPU wants to
store some data in the memory or to read the data from the
memory, it places the address of the required memory
location in the MAR.
 TYPES OF REGISTERS
System Control Register (SCR)
This is a processor register that changes or controls the general
behaviour of a CPU or other services in the system. It is also used
to regulate low-power features in a computer, such as sleep,
hibernate, etc.
 Other types include:

• User-accessible Register • Floating Point Register

• Data Register (FPRs)

• Conditional Register • Constant Register

• General Purpose Register • Vector Register
(GPRs) • Special Purpose Registers
 REGISTERS VS. MEMORY
• The primary difference between register and memory is that register holds the data
that the CPU is currently processing whereas, the memory holds the data the
that will be required for processing.
• The Register ranges from 32-bits register to 64-bits register whereas, the memory
capacity ranges from some GB to some TB.
• The processor accesses register faster than the memory.
• Computers registers include accumulator register, program counter, instruction
register, address register, etc. On the other hand, memory is referred as the main
memory of the computer which is RAM.
 FETCH-DECODE-EXECUTE CYCLE

As soon as a computer is powered on, it begins the process of executing

instructions in a cycle. The fetch – decode – execute cycle is the order of steps
that the Central Processing Unit (CPU) uses to follow instructions. The fetch
execute cycle was first proposed by John von Neumann. The cycle contains 3
main parts:
• Fetch next instruction
• Decode instruction
• Execute instruction
 FETCH-DECODE-EXECUTE CYCLE

• The processor reviews the program counter to see which command to execute next.
• The program counter gives an address value in the memory of where the next
command is.
• The processor fetches the command value from the memory location.
• Once the command has been fetched, it needs to be decoded and executed.
• Once this has been completed, the processor returns to the program counter to find
the next command.
• This cycle is replicated until the program stops.
 FACTORS AFFECTING SPEED OF
DATA TRANSFER
The factors are:
• Bus Speed
• Bus Width

BUS Speed:
The speed of the bus reflects how many bits of information can be sent across each
wire each second. Most buses transmit one bit of data per line, per clock cycle;
although newer high performance buses like AGP (compute accelerated graphics port)
may actually move two bits of data per clock cycle.
 FACTORS AFFECTING SPEED OF
DATA TRANSFER
BUS WIDTH
A bus is a channel over which information flows. The wider the bus, the more
information can flow over the channel, much as a wider highway can carry
more cars than a narrow one. The original ISA bus on the IBM PC was 8 bit
wide; the universal ISA bus used now is 16 bits. The other I/O buses including
VL-Bus (VLB) and peripheral component interconnect (PCI) are 32 bits wide.
The memory and processor buses on Pentium and higher PCs are 64 bits wide.