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STL Examples

The document contains 31 networks of logic statements using inputs and outputs. It includes basic logic functions like AND, OR, NOT, as well as timers and counters. The networks control an automation process through Boolean logic.

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methum2001
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© © All Rights Reserved
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27 views13 pages

STL Examples

The document contains 31 networks of logic statements using inputs and outputs. It includes basic logic functions like AND, OR, NOT, as well as timers and counters. The networks control an automation process through Boolean logic.

Uploaded by

methum2001
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 13

STL Examples / MAIN (OB1)

Block: MAIN
Author:
Created: 01/01/2007 12:01:01 am
Last Modified: 01/01/2007 03:40:49 am

Symbol Var Type Data Type Comment


TEMP
TEMP
TEMP
TEMP

PROGRAM COMMENTS
Network 1 Network Title
Network Comment
I0.0 Q0.0

Network 2

I0.0 I0.1 Q0.0

Network 3

I1.0 Q0.7

I0.5

Network 4

I0.5 Q0.4
/

Network 5

I0.1 I0.2 Q0.0


/

1 / 13
STL Examples / MAIN (OB1)

Network 6

I0.1 Q1.0

I0.2
/

Network 7

I0.0 I0.1 I0.2 Q0.1

Network 8

I0.3 Q0.0

I0.1

I0.2

Network 9

I0.0 I0.1 Q0.0

I1.1

Network 10

I1.1 I2.1 Q0.1


/

I1.0 I2.0
/

2 / 13
STL Examples / MAIN (OB1)

Network 11

I1.1 I2.1 I0.5 Q0.1


/

I1.0 I2.0
/

Network 12

I0.0 I0.1 I1.0 Q0.1


/

I1.1 I0.3
/

I0.7

Network 13

I0.0 I0.1 I0.2 I0.3 Q0.6

I0.4 I0.5 I0.6


/ / /

Network 14

I0.0 I0.1 I0.2 I0.3 Q0.6

I0.4 I0.5 I1.4 Q0.4


/ / /

I1.1

3 / 13
STL Examples / MAIN (OB1)

Network 15

I0.0 I0.1 Q0.1

I2.0 I2.1

Network 16

I0.0 I0.5 Q0.7

I0.6

I2.1 Q6.0

I1.3

I1.0 Q3.3

Network 17

I0.1 I0.2 I0.0 I0.5 Q0.7

I0.3 I0.6
/

I2.1 Q6.0

I1.3

I1.0 Q3.3

Q0.2

4 / 13
STL Examples / MAIN (OB1)

Network 18

I0.0 I0.1 I0.2 I0.3 Q0.0

I0.4 I0.5
/ /

I0.6 I0.7 I1.0 Q0.1

I1.1
/

I1.2 I1.3 Q0.2

I1.4

I1.5 I1.6 Q0.3


/

Network 19

I0.0 I0.1 I0.2 I0.3 Q0.0


/

I0.4 I0.7 I1.7 Q1.0


/ /

I0.5 I0.6

5 / 13
STL Examples / MAIN (OB1)

Network 20

I0.0 I0.1 I0.2 I0.3 Q0.1


/ /

I0.4 I0.7
/

Q0.1 Q0.0 M0.0


/

I0.5 I0.6 Q0.0

Q0.0 Q0.2

M0.0 I2.1 Q1.1


/

I2.0 I2.2 Q2.1


/

6 / 13
STL Examples / MAIN (OB1)

Network 21

I0.0 I0.1 I0.2 I0.3 I0.4 Q0.0


/ /

Q0.0 I0.5 M0.0

Q0.0 M0.0 I0.6 M0.1


/

M0.0 M0.1 Q0.0


/ / / 21.A

Q0.0 M0.0 I1.1 Q0.2 I3.0


/ /

Q1.2 I1.2 I1.3


/

Q0.0 M0.0
/

Q0.1
21.A

I3.1 M5.7

I3.2 I3.3
/

7 / 13
STL Examples / MAIN (OB1)

Network 22

I0.0 I0.1 I0.2 M0.0


/

M0.0 I0.4 I0.5 I0.6 I0.7 M0.1


/ /

Q0.1 I1.2 I1.0 I1.1 M0.0


/

I1.4 I1.3 I1.5 M0.1


/ /

I0.7 M7.0

M7.1

M7.2

M0.5 I0.1 I0.2 M5.3


/ 22.A

M0.6 M0.7 C0
/

I0.0 M0.1 T33 Q3.2


/ /

M0.0 T37
/

M0.0 T38 Q3.3

I2.4 C7
/

8 / 13
STL Examples / MAIN (OB1)

I2.5 Q0.1
/

T37 T38 M0.7

M0.7

C0 M1.0

M1.0
/

C1 M1.1

Q0.2

Q0.1 C0 Q1.7
/

C1 C2 I3.0 I3.1
/

I3.2
/

I3.3

22.A 22.B

9 / 13
STL Examples / MAIN (OB1)

Q3.1

10 / 13
STL Examples / MAIN (OB1)

I3.4
/

22.B

11 / 13
STL Examples / MAIN (OB1)

Network 23

I0.0 I0.1 Q0.0


I

I1.1
/I

Network 24

I0.0 Q0.0
NOT

I0.1

Network 25

I0.0 I0.1 Q0.0


P

I0.2

Network 26

I0.0 Q0.0
N

Network 27

I0.0 Q0.0
I

Network 28

I0.0 Q0.0
S
5

12 / 13
STL Examples / MAIN (OB1)

Network 29

I0.0 Q0.0
SI
4

Network 30

I0.0 Q1.0
R
2

Network 31

I0.0 Q2.0
RI
1

13 / 13

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