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Digital Computer Unit I Part5 (2022)

- The three logical connectives AND, OR, and NOT are logically complete and can be used to realize any Boolean function. Electronic circuits called integrated circuits are used to implement these connectives. - Logic gates like NOT, OR, AND, NAND, NOR, XOR, and XNOR can be used to represent any Boolean expression. Boolean expressions can be minimized using Karnaugh maps to reduce the number of gates needed. - Minimization is important to reduce the cost, increase the speed of the circuit, and minimize the complexity of the Boolean expression or function. Karnaugh maps are commonly used to graphically minimize Boolean functions with up to four variables.

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23 views20 pages

Digital Computer Unit I Part5 (2022)

- The three logical connectives AND, OR, and NOT are logically complete and can be used to realize any Boolean function. Electronic circuits called integrated circuits are used to implement these connectives. - Logic gates like NOT, OR, AND, NAND, NOR, XOR, and XNOR can be used to represent any Boolean expression. Boolean expressions can be minimized using Karnaugh maps to reduce the number of gates needed. - Minimization is important to reduce the cost, increase the speed of the circuit, and minimize the complexity of the Boolean expression or function. Karnaugh maps are commonly used to graphically minimize Boolean functions with up to four variables.

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suhelkhan900500
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Logic Gates

The three logical connectives, AND, OR and NOT


are said to be logically complete as any Boolean
function can be realized in terms of these three
connectives. In the development of computers
electronic circuits known as Integrated Circuits(IC)
are used to implement these connectives.
Logic Gates
Any boolean expression can be expressed in
terms of logic gates:
1. NOT
Logic Gates
2. OR
Logic Gates
3. AND
Logic Gates
1) Represent the following boolean exoression in
terms of logic gates
z = a.b + a’.b’.c’
Logic Gates
2) z= (a+b’).c
Logic Gates
There are more gates known as
1)NAND gate- combination of NOT and AND
2)NOR gate- combination of NOT and OR

NAND gate NOR gate


Logic Gates
NAND and NOR gates are universal gates. They are themself complete.
By using NAND and NOR gates we can implement any Boolean function.
If the equation is in SOP form then implementation is simple by using two
level NAND gate.
z = a.b + b.c’ + a.c

z=((a.b)’.(b.c’)’.(a.c)’)’
= a.b + b.c’ + a.c
Using NAND gate we
are able to implement
the circuit for the
expression.
Logic Gates
If the equation is in POS form then the implementation is
done by using NOR gate.
z=(a+b’+c).(a’+b+c’)

z=((a+b’+c)’+(a’+b+c’)’)’
=(a+b’+c).(a’+b+c’)
Logic Gates
XOR gate (exclusive OR gate)
Logic Gates
XNOR Gate (Equivalence gate)
Logic Gates
Logical networks can be implemented using NAND and NOR
gates.
While implementing a Boolean expression the number of gates
used depends upon the complexity of the expression,
The number of gates should be minimum due to following
factors:
1.Cost
2.Speed of the circuit
Minimizing the number of gates means minimization of the boolean
function or expression.
Minimization of the Boolean function
Minimization using Karnaugh Map- 3 Variable K-Map
The number of cells in 3 variable K-map is eight, since the number of variables is
three. The following figure shows 3 variable K-Map.

●
There is only one possibility of grouping 8 adjacent min terms.
●
The possible combinations of grouping 4 adjacent min terms are {(m0, m1, m3, m2),
(m4, m5, m7, m6), (m0, m1, m4, m5), (m1, m3, m5, m7), (m3, m2, m7, m6) and
(m2, m0, m6, m4)}.
●
The possible combinations of grouping 2 adjacent min terms are {(m0, m1), (m1,
m3), (m3, m2), (m2, m0), (m4, m5), (m5, m7), (m7, m6), (m6, m4), (m0, m4), (m1,
m5), (m3, m7) and (m2, m6)}.
Minimization of the Boolean function
Minimization using Karnaugh Map- Lets take 3 variable
function f(a,b,c)=Σ(1,3,6,7)
=a’.b’.c+a’.b.c+a.b.c+a.b.c’

fmin(a,b,c)=a’.c+a.b
Minimization of the Boolean function
a b c a’.b’c a’.b.c a.b.c a.b.c’ f a’.c a.b fmin

0 0 0 0 0 0 0 0 0 0 0

0 0 1 1 0 0 0 1 1 0 1

0 1 0 0 0 0 0 0 0 0 0

0 1 1 0 1 0 0 1 1 0 1

1 0 0 0 0 0 0 0 0 0 0

1 0 1 0 0 0 0 0 0 0 0

1 1 0 0 0 0 1 1 0 1 1

1 1 1 0 0 1 0 1 0 1 1
Minimization of the Boolean function

2) z = a.b + b.c + a’.b.c’


zmin = b
bc 00 01 11 10
a

0 0 0 1 1

1 0 0 1 1
Minimization of the Boolean function

3) z = a.b + b.c + a’.b.c’ + a’.b’.c’

Zmin = b + a’.c’ bc 00 01 11 10
a

0 1 0 1 1

1 0 0 1 1
Minimization of the Boolean function
cd 00 01 11 10
4-variable Kmap: ab
1) f(a,b,c,d) = Σ(0,2,4,6,12) 00 1 0 0 1
= a’.b’.c’.d’ + a’.b’.c.d’
+ a’.b.c’.d’ + a’.b.c.d’ 1 0 0 1
01
+ a.b.c’.d’
1 0 0 0
11
fmin(a,b,c,d) = b.c’.d’ + a’.d’
0 0 0 0
10
Minimization of the Boolean function

2) f(a,b,c,d) = Σ(0, 2, 6,12, 15)


cd
00 01 11 10
f(a,b,c,d) = a’.b’.d’ + a’.c.d’ ab 1 1
00
+ a.b.c’.d’ + a.b.c.d
01 1

11 1 1

10
Minimization of the Boolean function
Don’t Care Condition:
f(a,b,c,d) = Σ(0, 2, 6,12, 15) + Σ(9, 13)
Φ
cd
00 01 11 10
ab
f(a,b,c,d) = a’.b’.d’ + a’.c.d’ 00 1 1

+ a.b.c’ + a.b.d 01 1

11 1 Φ 1

10 Φ

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