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Tutorial 1

The document contains 5 questions and solutions regarding digital electronics circuits. Question 1 asks about logic voltage levels and noise margins. Question 2 explains when an LED will glow based on input signals. Question 3 calculates the output voltage of a level-shifted diode logic circuit for different input voltages. Question 4 determines the current through a diode in a simplified circuit. Question 5 derives an expression for the output of a 3-input logic circuit based on the input signals and circuit behavior.

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29 views11 pages

Tutorial 1

The document contains 5 questions and solutions regarding digital electronics circuits. Question 1 asks about logic voltage levels and noise margins. Question 2 explains when an LED will glow based on input signals. Question 3 calculates the output voltage of a level-shifted diode logic circuit for different input voltages. Question 4 determines the current through a diode in a simplified circuit. Question 5 derives an expression for the output of a 3-input logic circuit based on the input signals and circuit behavior.

Uploaded by

mrinali.minnu9
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Tutorial 1

EC31003 – Digital Electronics Circuits

12/01/2023
Question 1
• For a given logic family, consider VOL = 0.95 V and VOH = 4.51 V . For a
given circuit, VIL = 1.2 V and VIH = 3.2 V. Find the largest positive-going
and largest negative-going noise spike that can be tolerated. Also find
the transition width and logic swing value.
• Is the given circuit functionally better than a circuit with VIL = 1.5 V
and VIH = 3 V ?
Solution 1
Given, VOL = 0.95 V and VOH = 4.51 V
For 1st circuit, VIL = 1.2 V and VIH = 3.2 V
Largest positive-going noise spike that can be tolerated = NML
Largest negative-going noise spike that can be tolerated = NMH
NML = VIL – VOL = 1.2 – 0.95 = 0.25 V
NMH = VOH – VIH = 4.51– 3.2 = 1.31 V
Transition width = VIH – VIL = 3.2 – 1.2 =2 V
Logic swing = VOH – VOL = 4.51 – 0.95 = 3.56 V

For 2nd circuit, VIL = 1.5 V and VIH = 3 V


NML = VIL – VOL = 1.5 – 0.95 = 0.55 V
NMH = VOH – VIH = 4.51 – 3 = 1.51 V
No, the 2nd circuit is functionally better than the 1st circuit due to its higher noise margins.
Question 2
• In the circuit given below, For what combination of A and B does the
LED glow and why? Explain the operation of the circuit.
Solution 2
• When any of the input A or B are HIGH, the current flows to the
base of the transistor Q3 and Q4 driving the transistor Q5 to
ON state.
As Q5 is ON, the current will flow through the LED turning it ON.

Q3 Q4
• When both inputs are at logic low, transistors Q3 and Q4 are Q5
OFF which subsequently make Q5 OFF. Therefore, the diode
remains OFF only when both inputs are logic LOW.
Question 3
• In the given circuit, find the value of VOUT when:

a. VA = VB = 0 V
b. VA = VB = 5 V
c . VA = VB = 1 V

Given, VCC = 5V, RH = 2 KΩ and RL = 10KΩ. Consider drop across diodes


to be 0.7V.
Solution 3
• The given circuit is a level-shifted diode logic circuit.
a. When either input is 0V, potential at point x (Vx) is 0.7V.
Hence the voltage at VOUT is approximately 0V.

b. When VA = VB = 5V, both input diode are cutoff and voltage at VOUT is given by,

Hence, VOUT = 3.583 V.

c. When VA = VB = 1V, VX = 1.7V, then VOUT = 1.7 - 0.7 = 1V.


Question 4
• In the circuit given below, what is the value of current through diode
D5 (consider all diodes and voltage sources to be ideal)?
Solution 4
• As the diodes to be ideal, the circuit can be redrawn
as,

The two 1K resistor branches can also be removed to


further simplify the circuit,

Positive voltage at the far-end of the resistor drives the


diode into no bias state and hence no current flows
through it.
Question 5
• In the below circuit, find the expression of f. Here, logic OFF denotes
output 0 volt and logic ON denotes output VCC.
Solution 5

X Y Z Q1 f
0 0 0 OFF 0
0 0 1 OFF 1
When, either of the inputs are low,
0 1 0 OFF 0
corresponding diodes Dx or Dy
0 1 1 OFF 1 conducts.
1 0 0 OFF 0 It makes Q1 at cut-off. For such cases,
1 0 1 OFF 1 if Z=1, f terminal is at logic ON.
1 1 0 ON 0 Hence, f = X’Z + Y’Z
1 1 1 ON 0 = (X’+Y’)Z
= (XY)’Z

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