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LIC Unit 1 Notes

1. An operational amplifier is a high-gain differential amplifier consisting of multiple stages including an input stage, intermediate stage, level shifting stage, and output stage. 2. The input stage is a dual-input balanced differential amplifier that provides high input impedance and voltage gain. 3. The output of each stage is fed to the next until the final output stage, which provides a large output voltage and current capability.

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0% found this document useful (0 votes)
1K views16 pages

LIC Unit 1 Notes

1. An operational amplifier is a high-gain differential amplifier consisting of multiple stages including an input stage, intermediate stage, level shifting stage, and output stage. 2. The input stage is a dual-input balanced differential amplifier that provides high input impedance and voltage gain. 3. The output of each stage is fed to the next until the final output stage, which provides a large output voltage and current capability.

Uploaded by

Omkar Vanjari
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Unit No

FiUMDA mENTALS oF
OPERATIONAL AMPLIE IERS 08makl

C0Deop-Amp in lineal ElPdttoj qt ytf


11 mportance OP- Amp
An
operational amplifier is a direct
coupledhigh-qain
One more
amplifieT
differential
usually censisting
amplifiers uSUally
lloused
ollouedby a level ranslatoi an outputStae
The ojP Stage is qenerally a push-pu comple
mentarysymmety pair
It is designed or performinqmadhemcatical
operations Such as addifion, ubtraction,
Caion multipli
caion inteqmtion Thus he name "apera ape Tahional
fiona
Amplh fier i s abbreviated fo op-amp

LL Block iaqram Op-Amp function d each


block :
Non-nVeY tinq
Tnpu Inter Lerel Outpato
Staqe mediate shif ting Staqe
inyey tinq Stage Stage
P Dual IIp Pual I|p Emitter Cemplementar-
balanced op nbalanced olp tollower wth Smmehy
dufferential dufferential Constant Push-Pull
amplifie amplifier CuYTEnt Scunce amplitier
Fiq:1 Block iagram Op-Amp
Inpu Stage
I t is_dual input balanced output
differential ampliher. This
Stage
providesmost o, the
voltage
voltaqegain high inputimpedance the op-am
I has tuo input invertinq non-inverting
Intermediate Stage I i s d u a l
unbalanced
dpu
i n p u t _ u n b a l a n c e d

u n p u t sla
The output
cufferenticl amplitier.
intermediate tage T
to
is direct coupled
gain
to fhe ilp Sis

provided additional voltaqe

level Shulting Stage used


the ini
after the
affer inter.
is
This circuit level
level at
af the
the olp
shift he dc
mediatestage to downwatd
to
to zen
ZeTo Vol
Volk
the intermediate stage emitfer ellower
oith respect to ground. TE is
Gource
Cth consfant cuTYentt

Output Stage is usually push a


The nal stage
symmetry amplifier The oupu
The outpu
pull complementary
increases output
he yøltage Gwing Taist
Stage op-amp: It
Capability
the_current aupplyinq
the resistance
also provides Jo output

* TnputStage: ( Sual I1pbalanced olp diff amp


+Vcc

Re
-6 Vo

W- w
Vin Vinz
TEI
R
Constunt wWw-
w-

CurTenf7 We3
SouTCe
Jhis snqe provides most
It has d the qain a n op-amp.
I
twoinputs (invertinq
has two non- inve1ting)
ouputs called bala nced. o)p
provides hiqh ip impe dance Jow oJp
umpedance
Thas is directHy coupled amplifier
Ney high CMRR. has
Constant current source provides cusent stabili
Ztion
assure stable operatinq pointe1 the
duEFerentia
amplifier&aso incease CMRR
Intermediate Staqe Dual ilp Unbalancecd op)
+Vce

Re
Single ended Olp
to the level
rom input Shifhnq Stcge
Staqe ww
Rs

VEE
Fiq I 3 Bual IlpUnbalancedojp BIferential Amp

This stage provides an addlitional voltage gain to


the input siqnal
Culput d ip stnge is applie d do iyp
jntermediädte stage
C p 1s takenom one o the collector toith espec
to qYound applied-asa input to level
shifting stage
Level_Shiiting Staqe FVcc
DC In termecliate Emitter
ShuiT Stage o followeY stage

Fiq 14 Level Shifter


Stage VEE
Thas high inputimpedance low olp impedance
The devel shifting stage this de
uged to bring thas
is de
Jevel to the gero volt with Tespect to qround.
Here a simple emitter dellower is used as
level shifter with voltage divider.
The gain emitter ollower s unity. (1).
OupuB Staqe +Vec

om
tevet shutter
staqe
a,ON
OfF 60ff
ON
VEE
Fiq -5 Output Stage an Op amp
This Stage pTDvides o output impedanee, Jarge
output voltage p cuT1ent geing capability
Output stage incTeases magnitude voltage
nises cuTent supplying capability an op
gp-am
amp

al sc prvides shert circwt protec hon


Equivalent Civcu Jolagnom Op Amp

nver hng
TIf
Outp
Vid N - VoA Vid
Nen-inver ting AVi

VEE
Fig :6:Equivalent Circuil an Op-amp
he euivalentcircut is Useul in anadzing the
basic aperating principles op-amp
The output voltage is,
Vo = A Vid

A (V V2)
This
This inclicate that the olp vta Vo is directly
pro potional to he alaebraic dee nce between
the
he two input voltages
cohere,
Ri Input Resistance
Ro Qukput Resistance
AT = Open loop gain
Vid =differential inpuk voltage.
ViVt at non- inverting ip teiminal
N2 Vq at invex ting P ip teiminal

3The Tdeal Op-Amp


The ideal op-amp shoulol have
)Voltaqe gaun A) openJoop gan =
2) Inpur yesistance (Ri)=
3)Output esistance Ro)=
when P Vt is 7.
Output Voltage (Vs)O
5 Bandwidth (BW) _ Rejecion
Rejection Rahio)
Ratio)
mode
CMRR (Common

Slew Rate n current


s)otset voltage offset
ansteyCharacteristics 0p amp
the graph
runsfer characteristics is
voltage
Ouput voltage Vs nput
Tdea Transfer characteristhic:
Av V4
+Vsat

I-Vsat
hq. Tdeal Transfer characteristic

PracticalTransier Characteristic :
VoAv Vd
+Vsa

Vd

-Vsat
Linear range
Fig. :9:Practical Tansfer characteristic
0 15 Symbolo Op- Amp
Ve powey Supply
Invertinq p
IC741 Vo (output)
Non- invertinq
3
-VEE(-Ve poeSupfpy
Fig 19 Symbol Op- Amp
fositive siqned terminal is called non-invertin
termina negaive signed terminal is called
inventing ferminaa
input is applied to inverting terminal d
an ap-ampthen ampliied output siqnal is 0
phase toith espect to inputsiqnal
Signal.
+Vce
InN Inputn
sgmalaS

6V

-VEE
iq. 1 0 : Inyerting Amp' Symbol
input is applied to non- invertinq terminal d
an op-ampthenanmplitied: oulput siqn al is in
the phase with tSpect to input Signa
the siqnal
+Vce

TC 41 Vo
Non-Tnv. Tlp o-
Sg n
VEE
Fig 11: Non- inverting Amp Symbol
6 Liffeential Amplihey Vce

Vin Vd IC74

Vint
Fig.12: Differential Amp
Symbol
The amplilier_which amplities he
the daferene
dliffeen
differentjal
between
between input signal is called
ampliteY.
Hferentia Input Signal (Vo)
The ditference between Ip signal an
op-amp is called otferential input s1qnal (v
VpVin1 Vin 2 a

*Diiferential Gain (Ad)


is he gain o an amplitier which
amplities difterential Signal. (Vd).
Output Voltaqe Vo Ad (Vin - Vin 2)
Vo Ad Vd

Common mode signal +Vce


Voltage (Ve):

IC741 Ve

Fiq 13 Common Mode Signal


Cemmen Siqnal tobeth p terunal is called
called
common mode siqnal.
Common sianal to both ip ill prdeuced
zero output voltage.
1:7fin Liagram d Op-Amp
Cp-Amp C
JC 741
741
Cset 71ull
Nc
Input Vcc
Ce
+Tnput 3-
Outpud
-VEE 4Offse Null
Fiq. 1-14 Pin Diaqram d1C 74
Pin 1 5 (cifset Null)
By using pin no: 1
voltage can be Teduced to 5 ouput of1set
a zeroby containnq
potentiometer o 1O k between pin no.1 85
Pin 2 (Invertinq Input Siqnal)
Signal)
Input is applied to inverthinq input terminal
then output is 180 out p h a s e
Cwith input
Pin 3 Non invertinq Inpu Signal
Input is applied to non- inveitinq input
input
termina then outputs is in phase toith input
Pin 4 (fower Supply)
I is used to provide Tequire d power Supplyto
IC 41pin used for +Vesuppl pin 4 used
o-ve Supply
PracticaTange t5Vto t 2oV.
Pin e Cutput is oblb
obt
epending on input,
measuTd
output
cwth respect
aine
at
pin 6 fit is
gYouncd.

Pin No conne cdion


use
or Jurther
I i s used

Advantages c p AMP TC_741)


Smaler sife
2 High Reliablity
Re cluced Cost
4Less power consump tion.
5) Eas toreplace priN y
Temperature 9pofloy
low cifset vetage 4 curen fng B

.1.9 Applicaion p AMP


As amplifie 99
) frecisien ectiher
Active E FiHey
Voltage Comparaoy
Wavee erm Tegulator
log antlg amphfier
Multipljers
)Malivibmtors
) Jn vegulated fewer
Supply
PAN3..

DATE..

ned 2YaameBers Op- AMP


2 nput Cfset yoltaqe Vio)
+Yce

Vio TCF4 Vo - OV

Vin2 VEE
VinL
Fig115 Inpu offset Voltage
Input offset voltaqe is the yoltaqe that must
be applied between two ilp texminals o an
op-amp to null the 0lp

2.2 Outpu offsef voltage (Voo):


Vcc

4 Vo

VEE
Fig 116 Output Offset voltage
Even the p voltage is zere there is the
small op voltage due to the internal mis
matthing CiTcut tansisto, this olp vt is
called output offset voltage(2my)
J.2.3 Tnpu_ofset CuYTent Tio) +Vcc

IC74 Ve

VEL
Fi 1.17: Input offset CuTrent
between P Curth!
dlference
The
iowinq algebinverting
inf raic 4 non- inverfing eyminals
knownas
1eminals
nput

is Zero i
cohen CPvoltage
cwhen Vo-OV
offset cument TBIJBa
Iio

(Tib)
2.4 nput Bias Curvent +Nce
g
Vo
IC 4
TB
Vin2
VEE
Vin
Fi. 1.19: InpuBias CuTrendF

Tnput Bias current i s t h e average Curen


that'sMows into the inverting non- _jnvehng
terminals 4 op- AMPs
2.5 Common Mode Rejection Ratio CCMRR):
CMRRis a ratio differentialgain
92in to
tu
the common mede gaun
CMRR Adsdt
Acm
Teleally CMRRt
rtcicall CMR =licas ihighn as pa5Sible.
1.2 6 Power Supply Rejection Ratio. (PSRR):
OR Supply Voltage
RejectionRatio . (5VA
The change in ap- amp I p ctfse
yoltage caused by Variation ilp cffst
is called SVRR OY PsRR. in_SupplvoSuppl voltage
la
SVRR AVio
Vs
.2: Cutput VoltaqeSwing
Outpuf voltage uing cp-amp indicates
the value poiive negaiye gaturahon
eop-amp.

- Sles Rate(SR.)
Maximum Tade change d utput vsltage
per unt time is called as ales Tate i s
expressed in Values-
SR E d(Vo)
dt

2.3nputImpedance
Tis mpedanceocking Jntothe input
terminals an dp-amp
Tdeallit
tisjninity (),_practicallyit
is oMN'

.210utput mpedance
1 is the impedance
ceJockinq back ino
the output fermuinal op-amp.
Jdeallyit should be zero, practicall it is 52
.2-11 Gain Bandwidthoduct
Tis he banduidth op-amp when
Noltagegaln is 1
Tain Bandwidth Yroduct MHz
212 Inpud Nolhage Range
It is the common volage applied t beth
input terminal can beas high as t 13Yokow
-13V thout disturbing preper unehion [Link]
PAGE NC..

ATE...

.9.13 Tnput Capcacitance


i s equ'valent capacitance that can
can be
measured at either inverting OY non=nverting
texminalwith other terminal onnected to
CT i.4 pf ground
1.2 14 Larqe Signa Noltage Gaun
As
As the psignal ampitude i s much
Jarqer than dnput sign& voltage qain 15 Comma
known as large Signal voltage J á i n monly
n.
2 5 Supply Current
CuTTend_draton by the cp- Amp when
powei upply Connected
Supply_ Cusnert 1S= : S mA
. 26 Suppl oltage
T is the veltage
op amp t is in the angeapplieo t biased he
t5y to t 22y.
.2.1 Output Ghort circut CuTrent:
CuTTent:
outputi teaminal an p amp cll
be
shortéd
ould be
to the
round hough the shot
value certainl be much higher in the
in
either Iß 07 Tio the
This high curren
op-amp, it itdoes not maydlamage he
potectien have oip shot
Jc F41 = 25mAOp short cir
circut
cut
A2. 18Offset
VeltageAdjust
The yange mend yange
be adjusted hro ugh which p
the oP by ve1ing P voltage ca
1ok_pot to null
null
ypicallyh ange is in ew mili volt
Vec

Ouput Vo
Tc t4

Fig. 119 0ffset Voltaqe Adjust ment Op-amp.

1.2-19Tdeal fractic a Values op-amp. (IC 749


Pavamet er s Ideal ypical
Values Values
1) Open Loop Grain Av 100 dB2
Inpu impedance Resistance 2 M
3 Qtput resistance T52
4Input offset Voltaqe Vio 6mv
Tnput Bias cuYTenf B SO0nA
Input affser cUTTent Io 200nA
TCMRR godB
S)Inpu Capacitance Jess 14pf
9)ofiset voltage adjustment range eioOilggh t5mV
Input yoltaqe Tange 13V
SVRR 6314
12) Output short circul Curent(Is)| ow 95mA
1)Supply CuTTent (Is) ow SmA
14) Power Censumption 85 m
15) Slew te o.5 V4s
uat Cp Amp TC 4
The
The 747 is a general purpose dual
M
fawo ampliiers sho
share
ope rational amplifier. The
a commen bias network 4power supply Je supply eod
J31 Featurts
1)Nopequency compensation is eguireel
Short cixcuuf protecnon
Wide Common - mode 4_ dtferenthialv t anges
44) Lo poweY Consumpthon
5 No latth -up.
)Balanced offset null.
J:32 Pin Diagam TC7 4 7

Invering I/p A Cuset null A


Non-I nvertinq IIp A E Vt A
offset null A E Output A
V Nc
offset nu B Output B
Non- Inverting IIp B v t 8t
Tnverti nq I}p B otfset null B

33 Applicationns
Hybrid cluster_oith_inyormational graphics supp
2) Brushless DCmotor drives-
Inderiot ugh

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