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COURSE MATERIAL

DIGITAL ELECTRONICS AND

SUBJECT
MICROPROCESSORS (20A04304T)

UNIT 5

COURSE B.TECH

DEPARTMENT CSE

SEMESTER 2-1

PREPARED BY Ms.C.Padma
(Faculty Name/s) Assistant Professor

Version V-1

PREPARED / REVISED DATE 10.09.2022

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TABLE OF CONTENTS – UNIT I

S.No. CONTENTS PAGE No.
1 COURSE OBJECTIVES 1
2 PREREQUISITES 1
3 SYLLABUS 1
4 COURSE OUTCOMES 1
5 CO - PO/PSO MAPPING 1
6 LESSON PLAN 2
7 ACTIVITY BASED LEARNING 2
8 LECTURE NOTES 2
5.1 Introduction 2
5.2 Instruction set of 8086
5.3 Assembler directives
5.4 DIFFERENCE BETWEEN MACRO AND PROCEDURE
5.5 OVERVIEW OF 8051 MICROCONTROLLER
5.6 Architecture Of 8051 Microcontroller
5.7 8051 Addressing Modes
5.8 Instruction Set Of 8051 Microcontroller
9 PRACTICE QUIZ
10 ASSIGNMENTS
11 PART A QUESTIONS & ANSWERS (2 MARKS QUESTIONS)
12 PART B QUESTIONS
13 SUPPORTIVE ONLINE CERTIFICATION COURSES
14 REAL TIME APPLICATIONS
15 CONTENTS BEYOND THE SYLLABUS
16 PRESCRIBED TEXT BOOKS & REFERENCE BOOKS
17 MINI PROJECT SUGGESTION

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1. Course Objectives
The objectives of this course is to
1. Understand basics of 8086 Microprocessor.
2. Understand architecture of 8086 Microprocessor
3. Learn various 8086 instruction set and assembler directives.
4. To learn Assembly Language Programming of 8086

2. Prerequisites
Students should have knowledge on
1. Switching Theory and Logic Design
2. Computer Organization

3. Syllabus

Instruction set of 8086, Assembler directives, Procedures and Macros, Simple

programs involving arithmetic, logical, branch instructions, Ascending, Descending
and Block move programs, String Manipulation Instructions. Overview of 8051
microcontroller, Architecture, I/O ports and Memory organization, addressing
modes and instruction set of 8051(Brief details only), Simple Programs.

4. Course outcomes
The outcome of this course is to
Design and develop any application using 8086 Microprocessor.

1. CO-PO / PSO Mapping

DSD PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2

CO1 3 3 2 2 3 3

CO2 3 3 2 2 2 3

CO3 3 3 2 2 2 3

CO4 3 3 2 2 3 3

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2. Lesson Plan
Lecture No. Weeks Topics to be covered References
1 1 Introduction and Architecture of 8085 and 8086 T1, T2
microprocessor
2 Register organization and Flag register T1, T2
3 2 Pin diagram of 8086 microprocessor T1, T2
4 Timing & control signals of 8086 microprocessor T1, T2
5 3 Memory segmentation, organization & memory bank T1, T2
accessing
6 Interrupt structure of 8086 and interrupt vector table T1, T2

3. Activity Based Learning

1. Quiz.
2. Power point presentations.

4. Lecture Notes

5.1 INTRODUCTION:

The INTEL 8086 is the first 16-bit processor released by INTEL in the year 1978. 8086 is
packed in a 40 pin DIP and requires a 5 Volt supply. 8086 microprocessor has a much
more powerful instruction set along with the architectural developments which imparted
substantial programming flexibility and improvement in speed over the 8-bit
microprocessors.
The 8086 does not have internal clock circuit. The 8086 requires an external
asymmetric clock source with 33% duty cycle. The 8284 clock generator is used to generate
the required clock for 8086. The maximum internal clock of 8086 is 5 MHz. The other
versions of 8086 with different
.clock rates are 8086-1, 8086-2 and 8086-4 with maximum internal clock frequency of
10MHz, 8MHz and 4MHz respectively.

Features of 8086
• It is a 16-bit microprocessor.
• 8086 has a 20 bit address bus can access up to 2^20 memory locations (1MB).
• It can support up to 64K I/O ports.
• It provides 14, 16 -bit registers.
• It has multiplexed address and data bus AD0- AD15 and A16 – A19.
• It requires single phase clock with 33% duty cycle to provide internaltiming.
• 8086 is designed to operate in two modes, Minimum andMaximum.
• It can pre-fetches up to 6 instruction bytes from memory and queuesthem in order
to speed up instruction execution.
• It requires +5V power supply.
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• A 40 pin dual in line package.

Comparison between Microprocessors and Microcontrollers:

S.No. Microprocessor Microcontroller

Microprocessor contains ALU, Microcontroller contains
Control unit (Clock & timing microprocessor, memory (RAM &
1 circuit), different registers & ROM), I/O interfacing circuit and
interrupts circuit. peripheral devices such as A/D
converter, serial I/O, timer etc.,
It has many instructions to move It has one or two instructions to
2 data between memory and CPU. move data between memory and
CPU.
3 It has one or two bit handling It has many bit handling
instructions. instructions.
4 Access times for memory and Less access time for built-in
I/O devices are more. memory and I/O devices.
Microprocessor based system Microcontroller based system
5 requires more hardware requires less hardware reducing
PCB size and increasing the
reliability.
Microprocessor based system is Less flexible in design point of
6 more flexible in design point of view.
view.
7 It has single memory map for It has separate memory map for
data and code. data and code.
8 Less number of pins is More number of pins is
multifunctional. multifunctional.

5.2 INSTRUCTION SET OF 8086

The 8086 microprocessor supports 8 types of instructions −

• Data Transfer Instructions

• Arithmetic Instructions
• Bit Manipulation Instructions
• String Instructions
• Program Execution Transfer Instructions (Branch & Loop Instructions)
• Processor Control Instructions
• Iteration Control Instructions
• Interrupt Instructions
Let us now discuss these instruction sets in detail
5.2.1 Data Transfer Instructions
• These instructions are used to transfer the data from the source operand to the destination
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operand. Following are the list of instructions under this group –

Instruction to transfer a word
• MOV − Used to copy the byte or word from the provided source to the provided destination.
• PPUSH − Used to put a word at the top of the stack.
• POP − Used to get a word from the top of the stack to the provided location.
• PUSHA − Used to put all the registers into the stack.
• POPA − Used to get words from the stack to all registers.
• XCHG − Used to exchange the data from two locations.
• XLAT − Used to translate a byte in AL using a table in the memory.
Instructions for input and output port transfer

• IN − Used to read a byte or word from the provided port to the accumulator.
• OUT − Used to send out a byte or word from the accumulator to the provided port.
Instructions to transfer the address
• LEA − Used to load the address of operand into the provided register.
• LDS − Used to load DS register and other provided register from the memory
• LES − Used to load ES register and other provided register from the memory.
Instructions to transfer flag registers
• LAHF − Used to load AH with the low byte of the flag register.
• SAHF − Used to store AH register to low byte of the flag register.
• PUSHF − Used to copy the flag register at the top of the stack.
• POPF − Used to copy a word at the top of the stack to the flag register.

5.2.2 Arithmetic Instructions

• These instructions are used to perform arithmetic operations like addition, subtraction,
multiplication, division, etc. Following is the list of instructions under this group −
Instructions to perform addition
• ADD − Used to add the provided byte to byte/word to word.
• ADC − Used to add with carry.
• INC − Used to increment the provided byte/word by 1.
• AAA − Used to adjust ASCII after addition.
• DAA − Used to adjust the decimal after the addition/subtraction operation.
Instructions to perform subtraction
• SUB − Used to subtract the byte from byte/word from word.
• SBB − Used to perform subtraction with borrow.
• DEC − Used to decrement the provided byte/word by 1.
• NPG − Used to negate each bit of the provided byte/word and add 1/2’s complement.
• CMP − Used to compare 2 provided byte/word.
• AAS − Used to adjust ASCII codes after subtraction.
• DAS − Used to adjust decimal after subtraction.
Instruction to perform multiplication
• MUL − Used to multiply unsigned byte by byte/word by word.
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• IMUL − Used to multiply signed byte by byte/word by word.

• AAM − Used to adjust ASCII codes after multiplication.
Instructions to perform division
• DIV − Used to divide the unsigned word by byte or unsigned double word by word.
• IDIV − Used to divide the signed word by byte or signed double word by word.
• AAD − Used to adjust ASCII codes after division.
• CBW − Used to fill the upper byte of the word with the copies of sign bit of the lower byte.
• CWD − Used to fill the upper word of the double word with the sign bit of the lower word.
•
5.2.3 Bit Manipulation Instructions
• These instructions are used to perform operations where data bits are involved, i.e.
operations like logical, shift, etc. Following is the list of instructions under this group −
Instructions to perform logical operation
• NOT − Used to invert each bit of a byte or word.
• AND − Used for adding each bit in a byte/word with the corresponding bit in another
byte/word.
• OR − Used to multiply each bit in a byte/word with the corresponding bit in another
byte/word.
• XOR − Used to perform Exclusive-OR operation over each bit in a byte/word with the
corresponding bit in another byte/word.
• TEST − Used to add operands to update flags, without affecting operands.
Instructions to perform shift operations
• SHL/SAL − Used to shift bits of a byte/word towards left and put zero(S) in LSBs.
• SHR − Used to shift bits of a byte/word towards the right and put zero(S) in MSBs.
• SAR − Used to shift bits of a byte/word towards the right and copy the old MSB into the new
MSB.
Instructions to perform rotate operations
• ROL − Used to rotate bits of byte/word towards the left, i.e. MSB to LSB and to Carry Flag
[CF].
• ROR − Used to rotate bits of byte/word towards the right, i.e. LSB to MSB and to Carry Flag
[CF].
• RCR − Used to rotate bits of byte/word towards the right, i.e. LSB to CF and CF to MSB.
• RCL − Used to rotate bits of byte/word towards the left, i.e. MSB to CF and CF to LSB.

5.2.4 String Instructions

• String is a group of bytes/words and their memory is always allocated in a sequential order.
Following is the list of instructions under this group −
• REP − Used to repeat the given instruction till CX ≠ 0.
• REPE/REPZ − Used to repeat the given instruction until CX = 0 or zero flag ZF = 1.
• REPNE/REPNZ − Used to repeat the given instruction until CX = 0 or zero flag ZF = 1.
• MOVS/MOVSB/MOVSW − Used to move the byte/word from one string to another.
• COMS/COMPSB/COMPSW − Used to compare two string bytes/words.
• INS/INSB/INSW − Used as an input string/byte/word from the I/O port to the provided
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memory location.
• OUTS/OUTSB/OUTSW − Used as an output string/byte/word from the provided memory
location to the I/O port.
• SCAS/SCASB/SCASW − Used to scan a string and compare its byte with a byte in AL or string
word with a word in AX.
• LODS/LODSB/LODSW − Used to store the string byte into AL or string word into AX.
5.2.5 Program Execution Transfer Instructions (Branch and Loop Instructions)
• These instructions are used to transfer/branch the instructions during an execution. It
includes the following instructions −
• Instructions to transfer the instruction during an execution without any condition −
• CALL − Used to call a procedure and save their return address to the stack.
• RET − Used to return from the procedure to the main program.
• JMP − Used to jump to the provided address to proceed to the next instruction. Instructions
to transfer the instruction during an execution with some conditions −
• JA/JNBE − Used to jump if above/not below/equal instruction satisfies.
• JAE/JNB − Used to jump if above/not below instruction satisfies.
• JBE/JNA − Used to jump if below/equal/ not above instruction satisfies.
• JC − Used to jump if carry flag CF = 1
• JE/JZ − Used to jump if equal/zero flag ZF = 1
• JG/JNLE − Used to jump if greater/not less than/equal instruction satisfies.
• JGE/JNL − Used to jump if greater than/equal/not less than instruction satisfies.
• JL/JNGE − Used to jump if less than/not greater than/equal instruction satisfies.
• JLE/JNG − Used to jump if less than/equal/if not greater than instruction satisfies.
• JNC − Used to jump if no carry flag (CF = 0)
• JNE/JNZ − Used to jump if not equal/zero flag ZF = 0
• JNO − Used to jump if no overflow flag OF = 0
• JNP/JPO − Used to jump if not parity/parity odd PF = 0
• JNS − Used to jump if not sign SF = 0
• JO − Used to jump if overflow flag OF = 1
• JP/JPE − Used to jump if parity/parity even PF = 1
• JS − Used to jump if sign flag SF = 1
5.2.6 Processor Control Instructions
• These instructions are used to control the processor action by setting/resetting the flag
values. Following are the instructions under this group −
• STC − Used to set carry flag CF to 1
• CLC − Used to clear/reset carry flag CF to 0
• CMC − Used to put complement at the state of carry flag CF.
• STD − Used to set the direction flag DF to 1
• CLD − Used to clear/reset the direction flag DF to 0
• STI − Used to set the interrupt enable flag to 1, i.e., enable INTR input.
• CLI − Used to clear the interrupt enable flag to 0, i.e., disable INTR input.
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5.2.7 Iteration Control Instructions

• These instructions are used to execute the given instructions for number of times. Following
is the list of instructions under this group −
• LOOP − Used to loop a group of instructions until the condition satisfies, i.e., CX = 0
• LOOPE/LOOPZ − Used to loop a group of instructions till it satisfies ZF = 1 & CX = 0
• LOOPNE/LOOPNZ − Used to loop a group of instructions till it satisfies ZF = 0 & CX = 0
• JCXZ − Used to jump to the provided address if CX = 0

5.2.8 Interrupt Instructions

• These instructions are used to call the interrupt during program execution.
• INT − Used to interrupt the program during execution and calling service specified.
• INTO − Used to interrupt the program during execution if OF = 1
• IRET − Used to return from interrupt service to the main program

5.3 ASSEMBLER DIRECTIVES

• Assembler directives are the Instructions to the Assembler, linker and loader regarding the
program being executed. also called ‘pseudo instructions. Control the generation of machine
codes and organization of the program; but no machine codes are generated for assembler
directives.
• They are used to
• › specify the start and end of a program
• › attach value to variables
• › allocate storage locations to input/ output data
• › define start and end of segments, procedures, macros etc..
ASSUME
• Used to tell the assembler the name of the logical segment it should use for a specified
segment. You must tell the assembler that what to assume for any segment you use in the
program.
Example
• ASSUME: CODE
• Tells the assembler that the instructions for the program are in segment named CODE.
DB – Defined Byte
• Used to declare a byte type variable or to set aside one or more locations of type byte in
memory.
Example
• PRICES DB 49H, 98H, 29H:
• Declare array of 3 bytes named PRICES and initialize 3 bytes as shown.
DD – Define Double Word
• Used to declare a variable of type doubleword or to reserve a memory location which can be
accessed as doubleword.
DQ – Define Quadword
• Used to tell the assembler to declare the variable as 4 words of storage in memory.
DT – Define Ten Bytes
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• Used to tell the assembler to declare the variable which is 10 bytes in length or reserve 10
bytes of storage in memory.
DW – Define Word
• Used to tell the assembler to define a variable type as word or reserve word in memory.
DUP: used to initialize several locations and to assign values to location
END – End the Program
• To tell the assembler to stop fetching the instruction and end the program execution.
ENDP – it is used to end the procedure.
ENDS – used to end the segment.
EQU – EQUATE
• Used to give name to some value or symbol.
EVEN – Align On Even Memory Address
• Tells the assembler to increment the location counter to the next even address if it is not
already at an even address.
EXTRN
• Used to tell the assembler that the name or labels following the directive are in some other
assembly module.
GLOBAL – Declares Symbols As Public Or Extrn
• Used to make the symbol available to other modules.It can be used in place of EXTRN or
PUBLIC keyword.
GROUP – Group related segment
• Used to tell the assembler to group the logical segments named after the directive into one
logical segment. This allows the content of all the segments to be accessed from the same
group.
INCLUDE – include source code from file
• Used to tell the assembler to insert a block of source code from the named file into the
current source module. This shortens the source code.
LABEL
• Used to give the name to the current value in the location counter. The LABEL directive must
be followed by a term which specifies the type you want associated with that name.
LENGTH
• Used to determine the number of items in some data such as string or array.
NAME
• Used to give a specific name to a module when the programs consisting of several modules.
OFFSET
• It is an operator which tells the assembler to determine the offset or displacement of named
data item or procedure from the start of the segment which contains it.
ORG – Originate
• Tells the assembler to set the location counter value.
• Example, ORG 7000H sets the location counter value to point to 7000H location in memory.
• $ is often used to symbolically represent the value of the location counter. It is used with ORG
to tell the assembler to change the location according to the current value in the location
counter. E.g. ORG $+100.
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5.4 DIFFERENCE BETWEEN MACRO AND PROCEDURE

Assembly language is a common intermediate level programming language which is used for
microprocessor programming. This macro and procedure are two concepts in assembly by which
modular programming is implemented. So now let’s understand how macro and procedure are
different from each other.
Macro :
Macro is a set of instruction and the programmer can use it anywhere in the program by using its
name. It is mainly used to achieve modular programming. So same set of instructions can be used
multiple times when ever required by the help of macro.
Wherever macro’s identifier is used, it is replaced by the actual defined instructions during
compilation thereby no calling and return occurs.

Syntax of macro :
%macro macro_name number_of_parameters

<macro body>

%endmacro

Procedure:
Procedures are also like macro, but they are used for large set of instruction when macro is useful
for small set of instructions. It contains a set of instructions which performs a specific task. It
contains three main parts i.e Procedure name to identify the procedure, procedure body which
contains set of instructions, and RET statement which denotes return statement. Unlike macros,
procedures follow call-return method thereby achieving true modularity.

Syntax of Procedure:
Procedure_name
procedure body

…....................... RET
To call a procedure
CALL procedure_name

After execution of procedure control passes to the calling procedure using RET
statement.
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S.No. MACRO PROCEDURE

Procedure contains a set of instructions
01. Macro definition contains a set of instruction which can be called repetitively which
canperform a specific task.
to support modular programming.
02. It is used for small set of instructions It is used for large set of instructions
mostly less than mostly more than
ten instructions. ten instructions.
In case of macro memory In case of procedure memory requirement
03.
requirement is high. is less.
CALL and RET instruction/statements are not CALL and RET instruction/statements
04. required in macro. are required in procedure.
Assembler directive MACRO is used to Assembler directive PROC is used to define
define macro and assembler directive procedure and assembler directive ENDP is
05. ENDM is used to indicate the body is used to indicate the body is
over. over.
Execution time of macro is less than it Execution time of procedures is high as it
06.
executes faster than procedure. executes slower than macro.

Here machine code is created multiple Here machine code is created only once,
07. times as each time machine code is it is generated only once when the
generated when macro is called. procedure is defined.
08. In a macro parameter is passed as part In a procedure parameters are passed in
of statement that calls macro. registers and memory locations of stack.
09. Overhead time does not take place as Overhead time takes place during calling
procedure and returning control to calling
there is no calling and returning.
program.

5.5 OVERVIEW OF 8051 MICROCONTROLLER

The Intel MCS-51 (commonly referred to as 8051) is a Harvard architecture, single chip
microcontroller (μC) series which was developed by Intel in 1980 for use in embedded systems.
The 8051 architecture provides many functions (CPU, RAM, ROM, I/O, interrupt logic, timer,etc.) in
a single package Features of 8051: 8-bit ALU, Accumulator, 8-bit Registers and 8-bit data bus;
hence it is an 8-bit microcontroller

• 16-bit program counter

• 8-bit Processor Status Word(PSW) 8-bit Stack Pointer

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Figure 5.1: 8051 Microcontroller Block Diagram

➢ Internal RAM of128bytes

➢ On chip ROM is4KB
➢ Special Function Registers (SFRs) of 128bytes
➢ 32 I/O pins arranged as four 8-bit ports (P0 -P3)
➢ Two 16-bit timer/counters : T0 andT1
➢ Two external and three internal vectored interrupts
➢ Full duplex UART (serial port)

5.6 ARCHITECTURE OF 8051 MICROCONTROLLER

➢ The Internal architecture is shown in Figure 4.1.4 and the various Registers and units
are described below.
Accumulator (Acc):
➢ •Operand register
➢ Implicit or specified in the instruction
Has an address in on chip SFR bank B Register:
➢ Used to store one of the operands for multiplication and division, otherwise, scratch
pad considered as a SFR.
Stack Pointer (SP):
➢ 8 bit wide register. Incremented before data is stored on to the stack using PUSH or
CALL instructions. Stack defined anywhere on the 128 byte RAM.
Data Pointer (DPTR):
➢ 16 bit register contains DPH and DPL Pointer to external RAM address. DPH and DPL
allotted separate addresses in SFR bank
Port 0 To 3 Latches & Drivers:
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➢ Each I/O port allotted a latch and a driver Latches allotted address in SFR. User can
communicate via these ports P0, P1, P2, and P3.
Serial Data Buffer:
➢ Internally had TWO independent registers, TRANSMIT buffer (parallel in serial
➢ out – PISO) and RECEIVE buffer (serial in parallel out –SIPO) identified by SBUF and
allotted an address in SFR.
Program Status Word (PSW):
➢ Set of flags contains status information as detailed below in the Figure 4.1.3.

➢ CY PSW.7 Carry flag

➢ AC PSW.6 Auxiliary Carry flag
➢ FO PSW.5 Available to the user for general purpose.
➢ RS1 PSW.4 Register Bank selector bit 1.
➢ RSO PSW.3 Register Bank selector bit 0
➢ OV PSW.7 Overflow flag
➢ .. PSW.1 User-definable bit.
➢ P PSW.0 Parity flag Set/cleared by hardware each instruction cycle to
indicate an odd/even number of 1 bits in the accumulator

Figure 5.2: Bits of PSW Register

Registers: for Timer0 (16 bit register – TL0 & TH0) and for Timer1
(16 bit register – TL1 & TH1) four addresses allotted in SFR
Control Registers: Control registers are IP, IE, TMOD, TCON, SCON, and PCON.
➢ These registers contain control and status information for interrupts, timers/counters
and serial port. Allotted separate address in SFR.
Timing and Control Unit: This unit derives necessary timing and control signals for
internal circuit and external system bus. Oscillator: generates basic timing clock
signal using crystal oscillator.
Instruction Register: Decodes the opcode and gives information to timing and
control unit.
EPROM & program address Register: provide on chip EPROM and mechanism to
address it. All versions don’t have EPROM.
Ram & Ram Address Register: provide internal 128 bytes RAM and a
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mechanism to address internally

Example: MOVC A, @A+DPTR

ALU: Performs 8 bit arithmetic and logical operations over the operands held by TEMP1
and TEMP 2.
User cannot access temporary registers. SFR Register Bank: set of special
function registers address range: 80 H to FF H. Interrupt, serial port and timer units
control and perform specific functions under the control of timing and control unit.

5.7 8051 ADDRESSING MODES

An Addressing Mode is a way to locate a target Data, which is also called as Operand. The
8051 Family of Microcontrollers allows five types of Addressing Modes for addressing the
Operands. They are

• Immediate Addressing
• Register Addressing
• Direct Addressing
• Register – Indirect Addressing
• Indexed Addressing

Immediate Addressing

In Immediate Addressing mode, the operand, which follows the Opcode, is a constant
data of either 8 or 16 bits. The name Immediate Addressing came from the fact that the
constant data to be stored in the memory immediately follows the Opcode.
The constant value to be stored is specified in the instruction itself rather than taking from
a register. The destination register to which the constant data must be copied should be
the same size as the operand mentioned in the instruction.
Example: MOV A, #030H

Here, the Accumulator is loaded with 30 (hexadecimal). The # in the operand indicates
that it is a data and not the address of a Register.
Immediate Addressing is very fast as the data to be loaded is given in the instruction
itself.

Register Addressing
In the 8051 Microcontroller Memory Organization Tutorial, we have seen the organization
of RAM and four banks of Working Registers with eight Registers in each bank.

In Register Addressing mode, one of the eight registers (R0 – R7) is specified as Operand
in the Instruction.
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It is important to select the appropriate Bank with the help of PSW Register. Let us see a
example of Register Addressing assuming that Bank0 is selected.
Example: MOV A, R5
Here, the 8-bit content of the Register R5 of Bank0 is moved to the Accumulator.

Direct Addressing
In Direct Addressing Mode, the address of the data is specified as the Operand in the
instruction. Using Direct Addressing Mode, we can access any register or on-chip variable.
This includes general purpose RAM, SFRs, I/O Ports, Control registers.

Here, the address for the operand is the sum of contents of DPTR and Accumulator.

NOTE: Some authors and textbooks add few other Addressing Modes like Absolute
Addressing Mode, Relative Addressing Mode and Long Addressing Mode.

Also read: 8051 MICROCONTROLLER ARCHITECTURE.Types

of Instructions in 8051 Microcontroller Instruction Set

5.8 INTRODUCTION TO 8051 MICROCONTROLLER INSTRUCTION SET

DATA ARITHMETIC LOGICAL BOOLEAN PROGRAM

TRANSFER BRANCHING
MOV ADD ANL CLR LJMP
MOVC ADDC ORL SETB AJMP
MOVX SUBB XRL MOV SJMP
PUSH INC CLR JC JZ
POP DEC CPL JNC JNZ
XCH MUL RL JB CJNE
XCHD DIV RLC JNB DJNZ
DA A RR JBC NOP
RR ANL LCALL
C
S ORL ACALL
W
AP
CPL RET
RETI
JMP
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Before seeing the types of instructions, let us see the structure of the 8051
Microcontroller Instruction. An 8051 Instruction consists of an Opcode (short of
Operation – Code) followed by Operand(s) of size Zero Byte, One Byte or Two
Bytes.

The Op-Code part of the instruction contains the Mnemonic, which specifies
the type of operation to be performed. All Mnemonics or the Opcode part of
the instruction are of One Byte size.

Coming to the Operand part of the instruction, it defines the data being
processed by the instructions. The operand can be any of the following:

• No Operand
• Data value
• I/O Port
• Memory Location
• CPU register
There can multiple operands and the format of instruction is as follows:

MNEMONIC DESTINATION OPERAND, SOURCE OPERAND

A simple instruction consists of just the opcode. Other instructions may include
one or more operands. Instruction can be one-byte instruction, which contains
only opcode, or two-byte instructions, where the second byte is the operand or
three byte instructions, where the operand makes up the second and third byte.

Based on the operation they perform, all the instructions in the 8051
Microcontroller Instruction Set are divided into five groups. They are:

• Data Transfer Instructions

• Arithmetic Instructions
• Logical Instructions
• Boolean or Bit Manipulation Instructions
• Program Branching Instructions

We will now see about these instructions briefly.

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Data Transfer Instructions

The Data Transfer Instructions are associated with transfer of data between
registers or external program memory or external data memory. The
Mnemonics associated with Data Transfer are given below.

• MOV
• MOVC
• MOVX
• PUSH
• POP
• XCH
• XCHD
Mnemonic Description

MOV Move Data

MOVC Move Code

MOCX Move External Data

PUSH Move Data to Stack

POP Copy Data from Stack

XCH Exchange Data between two Registers

XCHD Exchange Lower Order Data between two Registers

Arithmetic Instructions

Using Arithmetic Instructions, you can perform addition, subtraction,

multiplication and division. The arithmetic instructions also include increment by
one, decrement by one and a special instruction called Decimal Adjust
Accumulator. The Mnemonics
Associated with the Arithmetic Instructions of the 8051 Microcontroller

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Instruction Set are:

• ADD
• ADDC
• SUBB
• INC
• DEC
• MUL
• DIV
• DA A

Logical Instructions
• The next group of instructions are the Logical Instructions, which perform
logical operations like AND, OR, XOR, NOT, Rotate, Clear and Swap.
Logical Instruction are performed on Bytes of data on a bit-by-bit basis.

Mnemonics associated with Logical Instructions are as follows:

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• ANL
• ORL
• XRL
• CLR
• RLC
• RR
• RRC
• SWAP
• CPL
• RL
• Boolean or Bit Manipulation Instructions
• As the name suggests, Boolean or Bit Manipulation Instructions deal with bit
variables. We know that there is a special bit-addressable area in the RAM

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and some of the Special Function Registers (SFRs) are also bit
addressable.
• CLR
• SETB
• MOV
• JC
• JNC
• JB
• JNB
• JBC
• ANL
• ORL
• CPL
Mnemonic Description

CLR Clear a Bit (Reset to 0)

SETB Set a Bit (Set to 1)

MOV Move a Bit

JC Jump if Carry Flag is Set

JNC Jump if Carry Flag is Not Set

JB Jump if specified Bit is Set

JNB Jump if specified Bit is Not Set

JBC Jump if specified Bit is Set and also clear the

Bit

ANL Bitwise AND

ORL Bitwise OR

CPL Complement the Bit

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Program Branching Instructions

The last group of instructions in the 8051 Microcontroller, Instruction
Set are the Program Branching Instructions.
These instructions mnemonics of the follows. Control the flow of Program
Branching program logic. The Instructions are as
• LJMP
• AJMP
• SJMP
• JZ
• JNZ
• CJNE
• DJNZ
• NOP, LCALL
• ACALL
• RET
• RETI
• JM
• The Mnemonics corresponding to the Boolean or Bit Manipulation instructions
are

• nemonic • Description
• LJMP • Long Jump (Unconditional)
• AJMP • Absolute Jump (Unconditional)
• SJMP • Short Jump (Unconditional)
• JZ • Jump if A is equal to 0
• JNZ • Jump if A is not equal to 0
• CJNE • Compare and Jump if Not Equal
• DJNZ • Decrement and Jump if Not Zero
• NOP • No Operation
• LCALL • Long Call to Subroutine
• ACALL • Absolute Call to Subroutine (Unconditional)
• RET • Return from Subroutine
• RETI • Return from Interrupt
• JMP • Jump to an Address (Unconditional)

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9. PRACTICE QUIZ
1. 8086 microprocessor could address of memory
a) 1MB
b) 2MB
c) 64KB
d) 64MB

2. Interrupt vector table reserves first memory space for RAM

a) 1KB
b) 2KB
c) 3KB
d) 4KB

3. What is the size of the instruction byte queue in 8086

a) 10 bytes
b) 8 bytes
c) 6 bytes
d) 4 bytes

4. The internal RAM memory of the 8051 is

a) 32 bytes
b) 64 bytes
c) 128 bytes
d) 256 bytes

5. The 8051 has ________ 16-bit counter/timers.

a) 1
b) 2
c) 3
d) 4

6. What is type 1 interrupt

a) Divide by zero
b) 1 byte break point
c) Continuous execution
d) Single step

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7. If directional flag DF is '0', the operation is called

a) Auto decrement
b) Auto increment
c) Increment by 2
d) Decrement by 2

8. What is the size of memory bank (even/odd) in 8086 system

a) 128 Kb
b) 512 Kb
c) 256 Kb
d) 1 Mb

9. In 8086 what is the size of each segment?

a) 24 Kb
b) 50 Kb
c) 64 Kb
d) 16 Kb

10. Stack pointer always points to the of the stack

a) Bottom
b) Top
c) Middle
d) None

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10. ASSIGNMENTS
S.No Question BL CO

1 Explain the architecture of 8086. 2 3

2 Discuss memory segmentation in 8086 2 3

3 Describe register organization of 8086. 2 2

11. PART A QUESTIONS & ANSWERS (2 MARKS QUESTIONS)

S.No Question & Answers BL CO

1 What are the special function register?

Ans. The special function register are stack pointer, index pointer
(DPL and DPH), I/O port addresses, status (PSW) and accumulator.

1
1
2
What is stack pointer (sp)?
Ans. Stack pointer (SP) is a 8 bit wide register and is incremented
before the data is stored into the stack using PUSH or CALL 1
2
instructions.
It contains 8-bit stack top address. It is defined anywhere in the
on-chip 128-byte RAM. After reset, the SP register is initialized to 07.
After each write to stack operation, the 8-bit contents of the
operand are stored onto the stack, after incrementing the SP
register by one.
It is not a top-down data structure. It is allotted an address in the
special function register bank.

3
What is the purpose of using instruction register?
Ans. Instruction register is used for the purpose of decoding
the opcode of an instruction to be executed and gives 1
1
information to the timing and control unit generating necessary
signals for the execution of the instruction.

4 Differentiate between program memory and data memory?

1 1
i. Ans. In stores the programs to be executed.
ii. It stores only program code which is to be executed and
thus it need not be written, so it is implement

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The data memory may be read from or written to and thus it is

implemented using RAM.

5 What is direct addressing mode?

Ans. The operands are specified using the 8-bit address field,
1
in the instruction format. Only internal data Ram and SFRS can 1
be directly addressed. This is known as direct addressing mode.
Eg: Mov R0, 89H

6
2. What is indexed addressing?
Ans.

This addressing mode is used only to access the program

memory. It is accomplished in 8051 for look-up table 1
1
manipulations. Program counter or data pointer are the allowed
16-bit address storage registers, in this mode of addressing.
These 16-bit registers point to the base of the look-up table and
the ACC register contains a code to be converted using the look-
up table. The look-up table data address is found out by adding
the contents of register ACC with that of the program counter or
data pointer.
In case of jump instruction, the contents of accumulator are
added with one of the specified 16-bit registers to form the jump
destination address.
Eg: MOV C, A @ A + DPTP JMP @ A + DPTR

7 List the five addressing modes of 8051 microcontroller?

Ans: The five addressing modes are,
I. Immediate addressing
II. Register addressing
III. Direct addressing
IV. Register indirect addressing.
1 1
V. Indexed addressing.

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8 MOV R4, R7 is invalid. Why?

Ans: The movement of data between the accumulator and Rn 1
1
(for n = 0 to 7) is valid. But movement of data between Rn
register is not allowed. That is why MOV R4, R7 is invalid.

9 List out some compare instructions?

Ans. The compare instructions are: 1 1

a. CJNE
b. CLR

10 What Is SFR?
Ans. In the 8051 microcontroller registers A, B, PSW and DPTR
are part of the group of registers commonly referred to as
special function registers (SFR).

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12. PART B QUESTIONS

S.No Question BL CO

1 (i) Explain briefly about Instruction set of 8086 microprocessor. 2 4

Explain briefly about Assembler Directives of 8086 microprocessor.

2 (i)Write ALP to sort the given numbers in Ascending order. (ii)Explain 3 4

about architecture of 8051 microcontroller.

3 (i)Explain the addressing modes of 8051 microcontroller. (ii)Explain 2 4

instruction set of 8051 microcontroller.

13. SUPPORTIVE ONLINE CERTIFICATION COURSES

1. Microprocessors & Microcontrollers by Prof. Santanu Chattopadhyay,
conducted by IIT Kharagpur - 12

14. REAL TIME APPLICATIONS

S.No Application CO

1 8051
• Microcontrollers are used in automatically controlled products and devices, such
asLight sensing and controlling devices.
• Temperature sensing and controlling devices. 1
• Fire detections and safety devices.
• Automobile applications.
• Defense applications.

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15. CONTENTS BEYOND THE SYLLABUS

1. Distinguish between RISC verses CISC. AVR RISC microcontroller
architecture.
2. Introduction to PIC micro controllers.

16. PRESCRIBED TEXT BOOKS & REFERENCE BOOKS

Text Books:
1.M. Morris Mano, Michael D. Ciletti, Digital Design, Pearson Education, 5th Edition,
2013
2. Anil K. Maini, Digital Electronics: Principles, Devices and Applications, John Wiley &
Sons, Ltd., 2007.
3. N. Senthil Kumar, M. Saravanan, S. Jeevanathan, Microprocessor and
Microcontrollers, Oxford Publishers, 2010.
4. Advanced microprocessors and peripherals-A.K Ray and K.M.Bhurchandani, TMH,
2nd edition,2006.

Reference Books:
1. Thomas L. Floyd, Digital Fundamentals – A Systems Approach, Pearson, 2013.
2. Charles H. Roth, Fundamentals of Logic Design, Cengage Learning, 5th, Edition,
2004.
3. D.V.Hall, Microprocessors and Interfacing. TMGH, 2nd edition, 2006.
4. Kenneth.J.Ayala, The 8051 microcontroller, 3rd edition, Cengage Learning,2010.

17. MINI PROJECT SUGGESTION

1. GSM based Solar Tracking System.
2. Greenhouse Robot using GSM technology
3. GSM based Temperature & Light Monitoring and Controlling

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