SiHG20N50C

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Power MOSFET
D FEATURES
TO-247 • Low figure-of-merit Ron x Qg
• 100 % avalanche tested
• High peak current capability
G
• dv/dt ruggedness
Available
• Improved Trr/Qrr
S
D • Improved gate charge
G S
• High power dissipations capability
N-Channel MOSFET
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
PRODUCT SUMMARY
VDS (V) at TJ max. 560
RDS(on) (Ω) VGS = 10 V 0.270
Qg max. (nC) 76
Qgs (nC) 21
Qgd (nC) 34
Configuration Single

ORDERING INFORMATION
Package TO-247AC
Lead (Pb)-free SiHG20N50C-E3

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT
Drain-source voltage VDS 500
V
Gate-source voltage VGS ± 30
TC = 25 °C 20
Continuous drain current (TJ = 150 °C) a VGS at 10 V ID
TC = 100 °C 11 A
Pulsed drain current b IDM 80
Linear derating factor 1.8 W/°C
Single pulse avalanche energy c EAS 361 mJ
Maximum power dissipation PD 250 W
Reverse diode dV/dt d dV/dt 5 V/ns
Operating junction and storage temperature range TJ, Tstg -55 to +150
°C
Soldering recommendations (peak temperature) d For 10 s 300
Notes
a. Limited by maximum junction temperature
b. Repetitive rating; pulse width limited by maximum junction temperature
c. VDD = 50 V, starting TJ = 25 °C, L = 2.5 mH, Rg = 25 Ω, IAS = 17 A
d. ISD ≤ 18 A, di/dt ≤ 380 A/μs, VDD ≤ VDS, TJ ≤ 150 °C
e. 1.6 mm from case

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT
Maximum junction-to-ambient RthJA - 40
°C/W
Maximum junction-to-case (drain) RthJC - 0.5

S21-0453-Rev. E, 10-May-2021 1 Document Number: 91382

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SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-source breakdown voltage VDS VGS = 0 V, ID = 250 μA 500 - - V
VDS temperature coefficient ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.7 - V/°C
Gate-source threshold voltage (N) VGS(th) VDS = VGS, ID = 250 μA 3.0 - 5.0 V
Gate-source leakage IGSS VGS = ± 30 V - - ± 100 nA
VDS = 500 V, VGS = 0 V - - 25
Zero gate voltage drain current IDSS μA
VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 250
Drain-source on-state resistance RDS(on) VGS = 10 V ID = 10 A - 0.225 0.270 Ω
Forward transconductance gfs VDS = 50 V, ID = 10 A - 6.4 - S
Dynamic
Input capacitance Ciss VGS = 0 V, - 2451 2942
Output capacitance Coss VDS = 25 V, - 300 360 pF
Reverse transfer capacitance Crss f = 1 MHz - 26 32
Total gate charge Qg - 65 76
Gate-source charge Qgs VGS = 10 V ID = 18 A, VDS = 400 V - 21 - nC
Gate-drain charge Qgd - 29 -
Turn-on delay time td(on) - 80 -
Rise time tr - 27 -
VDD = 250 V, ID = 18 A, Rg = 9.1 Ω ns
Turn-off delay time td(off) - 32 -
Fall time tf - 44 -
Gate input resistance Rg f = 1 MHz, open drain - 1.1 - Ω
Drain-Source Body Diode Characteristics
MOSFET symbol
Continuous source-drain diode current IS D
- - 20
showing the
integral reverse G
A
Pulsed diode forward current ISM p - n junction diode S - - 80

Diode forward voltage VSD TJ = 25 °C, IS = 18 A, VGS = 0 V - - 1.5 V

Reverse recovery time trr - 503 - ns
TJ = 25 °C, IF = IS,
Reverse recovery charge Qrr - 6.7 - μC
di/dt = 100 A/μs, VR = 35 V
Reverse recovery current IRRM - 30 - A

S21-0453-Rev. E, 10-May-2021 2 Document Number: 91382

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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

RDS(on), Drain-to-Source On Resistance

70 3
VGS
TJ = 25 °C
Top 15 V ID = 17 A
60 14 V 2.5
13 V
12 V
ID, Drain Current (A)

50 11 V
10 V 2

(Normalized)
9.0 V
40 8.0 V
7.0 V
6.0 V 1.5
Bottom 5.0 V VGS = 10 V
30
1
20

7.0 V 0.5
10

0 0
0 6 12 18 24 30 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160

VDS, Drain-to-Source Voltage (V) TJ, Junction Temperature (°C)

Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 4 - Normalized On-Resistance vs. Temperature

40 105
VGS VGS = 0 V, f = 1 MHz
TJ = 150 °C
Top 15 V Ciss = Cgs + Cgd, Cds Shorted
14 V
13 V Crss = Cgd
30 12 V 104 Coss = Cds + Cgd
ID, Drain Current (A)

11 V
Capacitance (pF)

10 V
9.0 V Ciss
8.0 V
7.0 V
20 6.0 V 103
Bottom 5.0 V
7.0 V
10 102 Coss

Crss
0 10
0 6 12 18 24 30 1 10 100 1000

VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig. 2 - Typical Output Characteristics, TC = 150 °C Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

100 20
ID = 17 A
VGS, Gate-to-Source Voltage (V)

TJ = 150 °C VDS = 400 V

16
VDS = 250 V
ID, Drain Current (A)

10
VDS = 100 V

12
TJ = 25 °C
1
8

0.1
4

0.01 0
5 6 7 8 9 10 0 30 60 90 120

VGS, Gate-to-Source Voltage (V) QG, Total Gate Charge (nC)

Fig. 3 - Typical Transfer Characteristics Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

S21-0453-Rev. E, 10-May-2021 3 Document Number: 91382

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100 1000
Operation in this area limited
ISD, Reverse Drain Current (A)

by RDS(on)
100

ID, Drain Current (A)

TJ = 150 °C TJ = 25 °C
10

10 100 µs

1 1 ms
1
TC = 25 °C
TJ = 150 °C 10 ms
Single Pulse
VGS = 0 V
0.1 0.1
0.2 0.5 0.8 1.1 1.4 10 100 1000 10 000

VSD, Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 8 - Maximum Safe Operating Area

20

15
ID, Drain Current (A)

10

0
25 50 75 100 125 150

TC, Case Temperature (°C)

Fig. 9 - Maximum Drain Current vs. Case Temperature

1
Duty Cycle = 0.5
Normalized Effective Transient
Thermal Impedance

0.2

0.1
0.1
0.05

0.02

Single Pulse

0.01
10-4 10-3 10-2 0.1 1

Pulse Time (s)

Fig. 10 - Normalized Thermal Transient Impedance, Junction-to-Case (TO-247)

S21-0453-Rev. E, 10-May-2021 4 Document Number: 91382

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RD
VDS
QG
VGS 10 V
D.U.T.
Rg
+ QGS QGD
- VDD

10 V VG
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %

Charge
Fig. 11 - Switching Time Test Circuit
Fig. 15 - Basic Gate Charge Waveform

VDS Current regulator

90 % Same type as D.U.T.

50 kΩ

12 V 0.2 µF
0.3 µF
10 %
+
VGS VDS
D.U.T. -
td(on) tr td(off) tf

Fig. 12 - Switching Time Waveforms VGS

3 mA

IG ID
L Current sampling resistors
VDS
Fig. 16 - Gate Charge Test Circuit
Vary tp to obtain
required IAS

Rg D.U.T +
V DD
-
IAS
10 V
tp 0.01 Ω

Fig. 13 - Unclamped Inductive Test Circuit

VDS
tp
VDD

VDS

IAS

Fig. 14 - Unclamped Inductive Waveforms

S21-0453-Rev. E, 10-May-2021 5 Document Number: 91382

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Peak Diode Recovery dV/dt Test Circuit

+ Circuit layout considerations

D.U.T.
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
-

- +
-

Rg • dV/dt controlled by Rg +
• Driver same type as D.U.T. VDD
-
• ISD controlled by duty factor “D”
• D.U.T. - device under test

Driver gate drive

Period P.W.
D=
P.W. Period

VGS = 10 Va

D.U.T. lSD waveform

Reverse
recovery Body diode forward
current current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
VDD

Re-applied
voltage
Body diode forward drop
Inductor current

Ripple ≤ 5 % ISD

Note
a. VGS = 5 V for logic level devices

Fig. 17 - For N-Channel

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Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91382.

S21-0453-Rev. E, 10-May-2021 6 Document Number: 91382

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 Package Information
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TO-247AC (High Voltage)
VERSION 1: FACILITY CODE = 9

MILLIMETERS MILLIMETERS
DIM. MIN. NOM. MAX. NOTES DIM. MIN. NOM. MAX. NOTES
A 4.83 5.02 5.21 D1 16.46 16.76 17.06 5
A1 2.29 2.41 2.55 D2 0.56 0.66 0.76
A2 1.17 1.27 1.37 E 15.50 15.70 15.87 4
b 1.12 1.20 1.33 E1 13.46 14.02 14.16 5
b1 1.12 1.20 1.28 E2 4.52 4.91 5.49 3
b2 1.91 2.00 2.39 6 e 5.46 BSC
b3 1.91 2.00 2.34 L 14.90 15.15 15.40
b4 2.87 3.00 3.22 6, 8 L1 3.96 4.06 4.16 6
b5 2.87 3.00 3.18 ØP 3.56 3.61 3.65 7
c 0.40 0.50 0.60 6 Ø P1 7.19 ref.
c1 0.40 0.50 0.56 Q 5.31 5.50 5.69
D 20.40 20.55 20.70 4 S 5.51 BSC
Notes
(1) Package reference: JEDEC® TO247, variation AC
(2) All dimensions are in mm
(3) Slot required, notch may be rounded
(4) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the
outermost extremes of the plastic body
(5) Thermal pad contour optional with dimensions D1 and E1
(6) Lead finish uncontrolled in L1
(7) Ø P to have a maximum draft angle of 1.5° to the top of the part with a maximum hole diameter of 3.91 mm
(8) Dimension b2 and b4 does not include dambar protrusion. Allowable dambar protrusion shall be 0.1 mm total in excess of b2 and b4
dimension at maximum material condition

Revision: 31-Oct-2022 1 Document Number: 91360

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 Package Information
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VERSION 2: FACILITY CODE = Y
A A
4
E 7 ØP (Datum B)
B
E/2 S A2 Ø k M DBM
3 R/2 ØP1
A
D2
Q

4 4
2xR
D D1
(2)

1 2 3 D 4
Thermal pad
5 L1

C L 4
E1
See view B A
0.01 M D B M
2 x b2 C View A - A
2x e
3xb
b4 A1
0.10 M C A M
(b1, b3, b5)
Planting Base metal
Lead Assignments
1. Gate D DE E
2. Drain
3. Source (c) c1
C C
4. Drain
(b, b2, b4)
(4)
Section C - C, D - D, E - E
View B

MILLIMETERS MILLIMETERS
DIM. MIN. MAX. NOTES DIM. MIN. MAX. NOTES
A 4.58 5.31 D2 0.51 1.30
A1 2.21 2.59 E 15.29 15.87
A2 1.17 2.49 E1 13.72 -
b 0.99 1.40 e 5.46 BSC
b1 0.99 1.35 Øk 0.254
b2 1.53 2.39 L 14.20 16.25
b3 1.65 2.37 L1 3.71 4.29
b4 2.42 3.43 ØP 3.51 3.66
b5 2.59 3.38 Ø P1 - 7.39
c 0.38 0.86 Q 5.31 5.69
c1 0.38 0.76 R 4.52 5.49
D 19.71 20.82 S 5.51 BSC
D1 13.08 -
Notes
(1) Dimensioning and tolerancing per ASME Y14.5M-1994
(2) Contour of slot optional
(3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body
(4) Thermal pad contour optional with dimensions D1 and E1
(5) Lead finish uncontrolled in L1
(6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154")
(7) Outline conforms to JEDEC outline TO-247 with exception of dimension c

Revision: 31-Oct-2022 2 Document Number: 91360

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VERSION 3: FACILITY CODE = N
A
A

D2
B E P1
R/2 P
N A2

K M D BM
R

D1
D

D
L1

L
b4 C E1
b2 e A1
b 0.01 M D B M

0.10 M C A M
b1, b3, b5
Base metal

c1
c

b, b2, b4
Plating

MILLIMETERS MILLIMETERS
DIM. MIN. MAX. DIM. MIN. MAX.
A 4.65 5.31 D2 0.51 1.35
A1 2.21 2.59 E 15.29 15.87
A2 1.17 1.37 E1 13.46 -
b 0.99 1.40 e 5.46 BSC
b1 0.99 1.35 k 0.254
b2 1.65 2.39 L 14.20 16.10
b3 1.65 2.34 L1 3.71 4.29
b4 2.59 3.43 N 7.62 BSC
b5 2.59 3.38 P 3.56 3.66
c 0.38 0.89 P1 - 7.39
c1 0.38 0.84 Q 5.31 5.69
D 19.71 20.70 R 4.52 5.49
D1 13.08 - S 5.51 BSC
ECN: E22-0452-Rev. G, 31-Oct-2022
DWG: 5971
Notes
(1) Dimensioning and tolerancing per ASME Y14.5M-1994
(2) Contour of slot optional
(3) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body
(4) Thermal pad contour optional with dimensions D1 and E1
(5) Lead finish uncontrolled in L1
(6) Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154")

Revision: 31-Oct-2022 3 Document Number: 91360

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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Revision: 01-Jan-2023 1 Document Number: 91000