US 20170039084A1

(19) United States

(12) Patent Application Publication (10) Pub. No.: US 2017/0039084 A1
ATSMON et al. (43) Pub. Date: Feb. 9, 2017
(54) ENHANCED ADVANCED DRIVER H04L 29/08 (2006.01)
ASSISTANCE SYSTEM (ADAS) SYSTEM ON B60/50/06 (2006.01)
CHIP (52) U.S. Cl.
CPC .......... G06F 9/45558 (2013.01); B60W50/06
(71) Applicant: iOnRoad Technologies Ltd., (2013.01); B60R 16/0231 (2013.01); H04L
Ramat-Gan (IL) 67/12 (2013.01); B60W 2050/0043 (2013.01)
(72) Inventors: Dan ATSMON, Rehovot (IL); Ohad 57 ABSTRACT
AKIVA, Ramat-Gan (IL); Yair (57)
HOUGUI, Tel-Mond (IL) A system on chip (SoC) having an integrated circuit (IC)
integrating into a single chip advance driver assistance
(21) Appl. No.: 15/228,078 systems (ADAS) processing unit(s), application processing
1-1. unit(s), at least one memory storing ADAS code comprising
(22) Filed: Aug. 4, 2016 ADAS computer instructions adapted to be executed on the
Related U.S. Application Data ADAS processing unit(s) for processing vehicle sensor data
and VM code for executing VM(s) on the application
(60) Provisional application No. 62/201,604, filed on Aug. processing unit(s) and a hypervisor which manages an
6, 2015. execution of at least one operation system of the VM(s) and
O O an access to a processor shared memory of the ADAS
Publication Classification processing unit(s) for acquiring an outcome of executing the
(51) Int. Cl. ADAS computer instructions for the completion of an
G06F 9/455 (2006.01) ADAS enhancing function by the execution of the VM(s) on
B60R I6/023 (2006.01) the application processing unit(s).

System on Chip (SoC)

O OS
Memory(ies)

ADAS ADAS enhancing W Wirtua Machine

CodeServer Wirtual Machine

ypervisor

ADAS processing unit(s) Application process or(s)

(e.g. MPU/CPU/DSP) (e.g. MPU/CPU/IPU)
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US 2017/0039084 A1 Feb. 9, 2017

ENHANCED ADVANCED DRIVER 0009 More optionally, the hardware resource is selected
ASSISTANCE SYSTEM (ADAS) SYSTEM ON from a group consisting of a display, a storage memory,
CHIP serial ATAttachment (ATA) (SATA), and a universal serial
bus (USB) port.
RELATED APPLICATION 0010 More optionally, the at least one VM comprises an
0001. This application claims the benefit of priority under ADAS enhancing VM for executing a plurality of ADAS
35 USC 119(e) of U.S. Provisional Patent Application No. enhancing functions using the outcome.
62/201,604 filed Aug. 6, 2015, the contents of which are 0011 More optionally, the at least one VM further com
incorporated herein by reference in their entirety. prises at least one in-vehicle infotainment (IVI) VM for
executing a plurality of IVI functions using the application
FIELD AND BACKGROUND OF THE processing unit.
INVENTION 0012 More optionally, the hypervisor prioritizes a usage
of the at least one application processing unit by the ADAS
0002 The present invention, in some embodiments enhancing VM over the at least one IVIVM based on one
thereof, relates to on board vehicle platforms and, more or more predefined priority rules.
specifically, but not exclusively, to an on board vehicle 0013 More optionally, the plurality of ADAS enhancing
platform for hosting an advanced driver assistance system functions comprises instructions to display the outcome on
(ADAS) and an in-vehicle infotainment (IVI) system. a map display executed by the ADAS enhancing VM.
0003. An advanced driver assistance system (ADAS) 0014 More optionally, the plurality of ADAS enhancing
helps a driver in the driving process. ADAS technology was functions comprises instructions to display the outcome on
developed to improve the comfort, efficiency, safety, and a dashboard display executed by the ADAS enhancing VM.
overall satisfaction of driving. ADAS features may use a 00.15 More optionally, the at least one ADAS processing
variety of sensor mechanisms in the vehicle to determine the unit comprises at least one digital signal processing unit and
current state of the vehicle and the current state of the the at least one application processing unit comprises at least
roadway in front of the vehicle. The ADAS features provide one central processing unit (CPU) used for executing func
feedback to the driver. tions of both the at least one VM and the ADAS code.
0004 Another in vehicle device that is commonly used as 0016. More optionally, the ADAS code and the at least
an in-vehicle infotainment (IVI) system that provides a user one VM are executed on different operating systems.
with functions such as a vehicle information display func (0017 More optionally, when a reboot is held, the hyper
tion, a navigation function or a TV output function through visor is loaded as an outcome of executing a thread of the
an image display device mounted in a vehicle. Recently, ADAS code.
with technological development, it is possible to execute a 0018 More optionally, when a reboot is held the hyper
web application through an in-vehicle infotainment proces visor loads the at least one VM only after the ADAS code is
Sor mounted in a vehicle. loaded and executed by the at least one ADAS processing
unit.
SUMMARY OF THE INVENTION 0019 More optionally, an execution of the ADAS code
comprises execution of a plurality of ADAS functions each
0005 According to some embodiments of the present selected from a group consisting of adaptive cruise control
invention, there is provided a system on chip (SoC), com (ACC), adaptive high beam, glare-free high beam and pixel
prising: an integrated circuit (IC) integrating the following light, adaptive light control: Swivelling curve lights, auto
into a single chip: at least one advance driver assistance matic parking, automotive night vision, blind spot monitor,
systems (ADAS) processing unit, at least one application collision avoidance system, crosswind Stabilization, driver
processing unit, at least one memory storing ADAS code drowsiness detection, driver Monitoring System, electric
comprising ADAS computer instructions adapted to be vehicle warning Sounds (used in hybrids and plug-in electric
executed on the at least one ADAS processing unit for vehicles), emergency driver assistant, Forward Collision
processing vehicle sensor data and VM code for executing Warning, Intersection assistant, Hill descent control, intel
on the at least one application processing unit at least one ligent speed adaptation or intelligent speed advice (ISA),
VM separately and independently from an execution of the Lane departure warning system, Lane change assistance,
ADAS code, and a hypervisor which manages an execution Pedestrian protection system, Traffic sign recognition, Turn
of at least one operation system (OS) of the at least one VM ing assistant, Vehicular communication systems, Wrong
and an access to a processor shared memory of the at least way driving warning, and lane departure warning.
one ADAS processing unit for acquiring an outcome of 0020. According to some embodiments of the present
executing the ADAS computer instructions for the comple invention, there is provided a method of executing an ADAS
tion of an ADAS enhancing function by the execution of the enhancing function on system on chip (SoC). The method
at least one VM on the at least one application processing comprises: processing vehicle sensor data according to at
unit.
0006 Optionally, the hypervisor manages an allocation least one advance driver assistance systems (ADAS) func
tion by executing ADAS code on at least one ADAS
of a hardware resource shared by the at least one VM and at processing unit integrated in an integrated circuit (IC),
least one thread generated by an execution of the ADAS storing at least one outcome of the processing in a processor
code by the at least one ADAS processing unit. shared memory of the at least one ADAS processing unit,
0007 More optionally, the allocation is done at a build or using a hyper visor to manage execution of at least one
Setup Stage. operation system of at least one VM on at least one appli
0008 More optionally, the hardware resource is the at cation processing unit integrated in the IC separately and
least one application processing unit. independently from an execution of the ADAS code, man
US 2017/0039084 A1 Feb. 9, 2017

aging by the hypervisor an access to the processor shared functions executed on an ADAS designated processor and
memory of the ADAS processing unit for acquiring the at using these output(s) for completing functions of the one or
least one outcome for a completion of an ADAS enhancing more virtual machines, for instance ADAS enhancing func
function by execution of the at least one VM on the at least tions or IVI functions. The hypervisor optionally manages
one application processing unit. usage of some hardware resources by the one or more VMs
0021. Unless otherwise defined, all technical and/or sci and an ADAS server executed according to the ADAS code
entific terms used herein have the same meaning as com while other hardware resources are designated to the ADAS
monly understood by one of ordinary skill in the art to which server only. The hypervisor optionally manages the usage of
the invention pertains. Although methods and materials Some hardware resources based on a predefined prioritiza
similar or equivalent to those described herein can be used tion.
in the practice or testing of embodiments of the invention, 0031. The SoC allows executing ADAS functions, such
exemplary methods and/or materials are described below. In as Velocity calculation, adaptive cruise control (ACC), and
case of conflict, the patent specification, including defini Lane departure warning, in parallel to ADAS enhancing
tions, will control. In addition, the materials, methods, and functions which use information calculated by the ADAS
examples are illustrative only and are not intended to be functions, for example augmenting a lane departure warning
necessarily limiting. in an augmented reality display or in a digital map.
0032. According to some embodiments of the present
BRIEF DESCRIPTION OF THE SEVERAL invention, there is provided a SoC having an integrated
VIEWS OF THE DRAWINGS circuit (IC) integrating into a single chip ADAS processing
0022. Some embodiments of the invention are herein unit(s), application processing unit(s), at least one memory
described, by way of example only, with reference to the storing ADAS code comprising ADAS computer instruc
accompanying drawings. With specific reference now to the tions adapted to be executed on the ADAS processing unit(s)
drawings in detail, it is stressed that the particulars shown for processing vehicle sensor data and VM code for execut
are by way of example and for purposes of illustrative ing VM(s) on the application processing unit(s) and a
discussion of embodiments of the invention. In this regard, hypervisor which manages an execution of at least one
the description taken with the drawings makes apparent to operation system of the VM(s) and an access to a processor
those skilled in the art how embodiments of the invention shared memory of the ADAS processing unit(s) for acquir
may be practiced. ing an outcome of executing the ADAS computer instruc
0023. In the drawings: tions for the completion of an ADAS enhancing function by
0024 FIG. 1 is a schematic illustration of a single system the execution of the VMCS) on the application processing
on chip (SoC) that executes an ADAS code and one or more unit(s).
virtual machines (VMS) using shared hardware resources, 0033. Using the SoC allows reducing the total cost for
according to Some embodiments of the present invention; providing ADAS functions and optionally IVI functions
0025 FIG. 2 is a schematic illustration of an exemplary and/or to improve their computational abilities, for instance
Software architecture wherein a plurality of guest operating by allowing the VM(s) to access outcomes of ADAS func
systems of a plurality of VMs are executed by a hypervisor tions which are stored in a shared memory of a processor
using device hardware which is shared with an ADAS used by the ADAS server and/or by providing the ADAS
server, according to some embodiments of the present server 102 with access to all or some of the computational
invention. In Such embodiments; and storage resources of the VM(s). The outcome, also
0026 FIG. 3 is an exemplary booting process, according referred to as ADAS data, may be a final outcome or a
to Some embodiments of the present invention; temporary outcome of any ADAS function as defined herein.
0027 FIG. 4 is another exemplary booting process, 0034. Before explaining at least one embodiment of the
according to Some embodiments of the present invention; invention in detail, it is to be understood that the invention
and is not necessarily limited in its application to the details of
0028 FIG. 5 is a flowchart 400 of an exemplary usage of construction and the arrangement of the components and/or
data calculated by an ADAS function executed using the methods set forth in the following description and/or illus
ADAS processing unit(s) as an input for an ADAS enhanc trated in the drawings and/or the Examples. The invention is
ing function or an IVI function executed by the application capable of other embodiments or of being practiced or
processing unit(s) 104, according to Some embodiments of carried out in various ways.
the present invention. 0035. The present invention may be a system, a method,
and/or a computer program product. The computer program
DESCRIPTION OF SPECIFIC EMBODIMENTS product may include a computer readable storage medium
OF THE INVENTION (or media) having computer readable program instructions
thereon for causing a processor to carry out aspects of the
0029. The present invention, in some embodiments present invention.
thereof, relates to on board vehicle platforms and, more 0036. The computer readable storage medium can be a
specifically, but not exclusively, to an on board vehicle tangible device that can retain and store instructions for use
platform for hosting an advanced driver assistance system by an instruction execution device. The computer readable
(ADAS) and an in-vehicle infotainment (IVI) system. storage medium may be, for example, but is not limited to,
0030. According to some embodiments of the present an electronic storage device, a magnetic storage device, an
invention, there is provided a system on chip (SoC) for optical storage device, an electromagnetic storage device, a
executing ADAS code and one or more virtual machines semiconductor storage device, or any suitable combination
(VMs) using shared hardware resources by using a hyper of the foregoing. A non-exhaustive list of more specific
visor. The hypervisor allows acquiring output(s) of ADAS examples of the computer readable storage medium includes
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the following: a portable computer diskette, a hard disk, a illustrations and/or block diagrams, and combinations of
random access memory (RAM), a read-only memory blocks in the flowchart illustrations and/or block diagrams,
(ROM), an erasable programmable read-only memory can be implemented by computer readable program instruc
(EPROM or Flash memory), a static random access memory tions.
(SRAM), a portable compact disc read-only memory (CD 0040. These computer readable program instructions may
ROM), a digital versatile disk (DVD), a memory stick, a be provided to a processor of a general purpose computer,
floppy disk, a mechanically encoded device such as punch special purpose computer, or other programmable data pro
cards or raised structures in a groove having instructions cessing apparatus to produce a machine, Such that the
recorded thereon, and any suitable combination of the fore instructions, which execute via the processor of the com
going. A computer readable storage medium, as used herein, puter or other programmable data processing apparatus,
is not to be construed as being transitory signals perse. Such create means for implementing the functions/acts specified
as radio waves or other freely propagating electromagnetic in the flowchart and/or block diagram block or blocks. These
waves, electromagnetic waves propagating through a wave computer readable program instructions may also be stored
guide or other transmission media (e.g., light pulses passing in a computer readable storage medium that can direct a
through a fiber-optic cable), or electrical signals transmitted computer, a programmable data processing apparatus, and/
through a wire. or other devices to function in a particular manner, such that
0037 Computer readable program instructions described the computer readable storage medium having instructions
herein can be downloaded to respective computing/process stored therein comprises an article of manufacture including
ing devices from a computer readable storage medium or to instructions which implement aspects of the function/act
an external computer or external storage device via a net specified in the flowchart and/or block diagram block or
work, for example, the Internet, a local area network, a wide blocks.
area network and/or a wireless network. The network may 0041. The computer readable program instructions may
comprise copper transmission cables, optical transmission also be loaded onto a computer, other programmable data
fibers, wireless transmission, routers, firewalls, Switches, processing apparatus, or other device to cause a series of
gateway computers and/or edge servers. A network adapter operational steps to be performed on the computer, other
card or network interface in each computing/processing programmable apparatus or other device to produce a com
device receives computer readable program instructions puter implemented process. Such that the instructions which
from the network and forwards the computer readable execute on the computer, other programmable apparatus, or
program instructions for storage in a computer readable other device implement the functions/acts specified in the
storage medium within the respective computing/processing flowchart and/or block diagram block or blocks.
device. 0042. The flowchart and block diagrams in the Figures
0038 Computer readable program instructions for carry illustrate the architecture, functionality, and operation of
ing out operations of the present invention may be assembler possible implementations of systems, methods, and com
instructions, instruction-set-architecture (ISA) instructions, puter program products according to various embodiments
machine instructions, machine dependent instructions, of the present invention. In this regard, each block in the
microcode, firmware instructions, state-setting data, or flowchart or block diagrams may represent a module, seg
either source code or object code written in any combination ment, or portion of instructions, which comprises one or
of one or more programming languages, including an object more executable instructions for implementing the specified
oriented programming language Such as Smalltalk, C++ or logical function(s). In some alternative implementations, the
the like, and conventional procedural programming lan functions noted in the block may occur out of the order noted
guages, such as the “C” programming language or similar in the figures. For example, two blocks shown in Succession
programming languages. The computer readable program may, in fact, be executed Substantially concurrently, or the
instructions may execute entirely on the user's computer, blocks may sometimes be executed in the reverse order,
partly on the user's computer, as a stand-alone software depending upon the functionality involved. It will also be
package, partly on the user's computer and partly on a noted that each block of the block diagrams and/or flowchart
remote computer or entirely on the remote computer or illustration, and combinations of blocks in the block dia
server. In the latter scenario, the remote computer may be grams and/or flowchart illustration, can be implemented by
connected to the user's computer through any type of special purpose hardware-based systems that perform the
network, including a local area network (LAN) or a wide specified functions or acts or carry out combinations of
area network (WAN), or the connection may be made to an special purpose hardware and computer instructions.
external computer (for example, through the Internet using 0043 Reference is now made to FIG. 1, which is a
an Internet Service Provider). In some embodiments, elec schematic illustration of a single system on chip (SoC) 100
tronic circuitry including, for example, programmable logic that executes an ADAS code, for instance a firmware,
circuitry, field-programmable gate arrays (FPGA), or pro referred to herein as an ADAS server 102 and one or more
grammable logic arrays (PLA) may execute the computer virtual machines (VMs), such as 105, 106 using shared
readable program instructions by utilizing state information hardware resources without compromising ADAS server
of the computer readable program instructions to personalize performances, according to some embodiments of the pres
the electronic circuitry, in order to perform aspects of the ent invention. The execution of the ADAS server 102
present invention. involves execution of ADAS functions and the execution of
0039. Aspects of the present invention are described the VMs involves execution of at least ADAS enhancing
herein with reference to flowchart illustrations and/or block functions which receive outputs of the ADAS functions as
diagrams of methods, apparatus (systems), and computer an input.
program products according to embodiments of the inven 0044 As indicated below, the single SoC 100, referred to
tion. It will be understood that each block of the flowchart herein also as SoC 100, allows executing the ADAS func
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tions of the ADAS server 102, at least critical safety func conditions within the vehicle or weather outside of the
tions of an ADAS enhancing VM 105, and optionally vehicle 102. Vehicle sensors may include one or more global
non-critical safety functions of an IVIVM 106 on a common positioning system (GPS) devices, Radar sensor, Light
hardware platform without causing interference between the Detection And Ranging (LIDAR) system sensor, micro
execution of the ADAS server 202 and the VM(s), for phones, seat weight sensors, and/or other type of data
example when the ADAS functions are active and may take gathering elements associate with the vehicle. Other vehicle
control over vehicle movement for a period. Such a SoC 100 sensors examples include laser sensors, infrared sensors,
is different from many on-vehicle platforms wherein ADAS accelerometers, or any combination thereof. In addition, the
functions are executed on a designated hardware that is ADAS server 102 may have a direct access to hardware
separate from the hardware used by an IVI platform or an resources such as a CAN bus, Vehicle-to-Everything (V2X)
ADAS enhancement platform. The SoC 100 allows opti interface and/or any other interfaces.
mizing the hardware used for executing ADAS functions, 0047. The ADAS server 102 is hosted and executes,
ADAS enhanced functions, and IVI functions by allowing using ADAS designated processing unit(s) 103, ADAS
the ADAS server and VM(s) to share computation resources functions intended to help a driver in the driving process for
for performing inter alia intensive arithmetic computations increasing vehicle and road safety, for instance by providing
which may be hardware accelerated, for instance video alert and convenience and/or for operating vehicle control
decoding and graphics generation functions. Such optimi functions which operate vehicle system automatically.
zation allows reducing the total cost for providing ADAS Example of an ADAS functions which may be executed by
functions and optionally IVI functions and/or to improve the SoC are adaptive cruise control (ACC), adaptive high
their computational abilities, for instance by allowing the beam, glare-free high beam and pixel light, adaptive light
VM(s) to access outcomes of ADAS functions which are control: Swivelling curve lights, automatic parking, automo
stored in a shared memory of a processor used by the ADAS tive night vision, blind spot monitor, collision avoidance
server and/or by providing the ADAS server 102 with access system, crosswind stabilization, driver drowsiness detection,
to all or some of the computational and storage resources of driver Monitoring System, electric vehicle warning Sounds
the VM(s). The outcome, also referred to as ADAS data, (used in hybrids and plug-in electric Vehicles), emergency
may be a final outcome or a temporary outcome of any driver assistant, Forward Collision Warning, Intersection
ADAS function as defined herein. assistant, Hill descent control, intelligent speed adaptation or
0045. The single SoC 100 is an integrated circuit that intelligent speed advice (ISA), Lane departure warning
integrates digital, analog, mixed-signal, and/or radio-fre system, Lane change assistance, Pedestrian protection sys
quency functions on a single chip Substrate. The SoC tem, Traffic sign recognition, Turning assistant, Vehicular
includes resources such as processing unit(s) 103, 104, for communication systems, Wrong-way driving warning, and
example microcontrollers, micro processing unit(s), or digi lane departure warning. ADAS functions may be any opera
tal signal processor core(s) which are shared by the ADAS tion defined in ISO26262 standard or AutoSAR standard
server and one or more virtual machines (VMs), for example which are incorporated herein by reference.
an ADAS enhancing VM 105 for providing at least safety 0048. The ADAS designated processing unit(s) 103 may
critical functions and IVIVM 106 for providing IVI func include one or more specialized processing unit(s) or pro
tions. In some embodiments, the SoC 100 may include more cessing unit(s) such as digital signal processing unit(s)
than one processor core. The SoC 100 may further include (DSPs), for example DSP C66X. The ADAS designated
a ROM, RAM, Electrically Erasable Programmable Read processing unit(s) 102 are optionally not allocated to any
Only Memory (EEPROM), flash memory, and/or any other thread not originated from the ADAS server 102.
type of non-volatile memory for hosting and running the 0049. As outlined above, the SoC 100 includes applica
ADAS server 102 and/or the one or more virtual machines tion processing unit(s) 104. The application processing
(VMs) 105, 106. The SoC 100 may include one or more unit(s) 104 may include any number of Suitable processing
timing sources, such as oscillators and/or phase-locked unit(s) or processing unit(s). Such as a central processing
loops. The SoC 100 may include interfaces, such as USB, unit (“CPU”), a reduced instruction set computer (“RISC),
FireWire, Ethernet, Universal Asynchronous Receiver/ a complex instruction set computer (“CISC), a micropro
Transmitter (USART), Serial Peripheral Interface (SPI) bus, cessor, a microcontroller and other processing units which
and/or Media Oriented Systems Transport (MOST) bus. In can accelerate tasks and offload computations from a main
some embodiments, the SoC 101 communicates with one or CPU.
more I/O devices for performing at least some of the 0050. The ADAS enhancing VM 105 is adapted to
functions described herein. For example, the SoC 100 may execute ADAS enhancing functions. An ADAS enhancing
be an on vehicle platform such as DRA72x or DRA74X function is a function that receives outputs of ADAS func
OMAPTM Automotive Applications Processing unit(s) of tions executed by the ADAS server as an input for calcu
Texas instrument (TI)TM which the specification thereof is lating an enhanced data not provided by the ADAS server
incorporated herein by reference. 102, for example an integration of outputs ADAS functions
0046. The SoC 100 hosts, for example on an on-chip Such as movement, Velocity, collusion alert, lane departure
memory 101, an ADAS server 102 adapted to receive data warning data and/or the like in a display of a digital map that
from a plurality of in vehicle sensors, for example any provides useful information not reliably provided by vehicle
data-gathering elements associated with the respective sensors. Such a digital map may provide a predictive capa
vehicle and gather audio, visual, and/or environmental infor bility beyond a measuring range of vehicle sensors and/or
mation within or associated with the vehicle. For example, beyond a vision of the driver to determine driving obstruc
the vehicle sensors may include one or more cameras in a tions ahead of the vehicle, for example around corners, over
cabin of the vehicle that may capture images of the passen hills and/or the like. Another example of an ADAS enhanc
gers and/or driver and/or scene information, Such as lighting ing function is displaying a virtual dashboard display that
US 2017/0039084 A1 Feb. 9, 2017

presents outputs ADAS functions such as movement, Veloc standard and/or AutoSAR standard complainant operating
ity, collusion alert, lane departure warning data and/or the system such as QNX. Another barrier for preventing a
like. Such a virtual dashboard display may be presented in malwares from affecting the ADAS server 102 is to provide
an augment reality device in the vehicle and/or on a screen the VMs 105,106 with a read only access to the memory 108
that faces the driver. of the ADAS processing unit(s) 103, for instance cache
0051. As outlined above, the SoC 100 further hosts, for memory, shared memory space.
example on the on chip memory 101, one or more VMs 105, 0055 Moreover, the VMs 105,106 and the ADAS server
106 which are executed using the application processing 102 may run on different operating systems, for instance
unit(s) 104. The SoC 100 hosts a hypervisor 107 that while the ADAS server 102 is executed under QNX, the
provides operating systems of the VMs 105, 106 with a VMs 105, 106 are executed under Android OS, Linux OS,
virtual operating platform to manage the execution of the or Windows or any other OS, for example any High Level
operating systems. Multiple instances of a variety of oper Operating System (HLOS) that supports symmetrical multi
ating systems may share the virtualized hardware resources processing (SMP) architecture. This facilitates fast boot time
which are managed by the hypervisor 107, for example for the ADAS server 102 separately from the boot time of
memory and application processing unit(s) 104. The hyper the VMs 105, 106.
visor 107 further manages an access of the VMs 105,106 to 0056 Reference is now also made to FIG. 2, which is a
memory 108 of the ADAS processing unit(s) 103 and to schematic illustration of an exemplary Software architecture
memory 109 of the application processing unit(s) 104. This wherein a plurality of guest operating systems of a plurality
allows the ADAS server 102 to update the one or more of the of VMs such as 105 and 106 are executed by a hypervisor,
VMs 105, 106 with data relevant for presenting specific Such as 107 using device hardware, also known as resources,
alerts and/or for performing processing of sensors outputs which are shared with an ADAS server, such as 102 that
which are processed using the ADAS processing unit(s) 103 executes a plurality of different ADAS functions in parallel,
Such as recording of video decoded using the ADAS pro according to some embodiments of the present invention. In
cessing unit(s) 103 and/or the like. It should be noted that as such embodiments, ADAS functions and ADAS enhanced
the hypervisor 107 is hosted on the SoC it has a high functions and optionally IVI functions are executed at least
bandwidth channel with the ADAS server 102 and/or the partly using common device resources such as processing
memory 108 of the ADAS processing unit(s) 103. This high unit(s).
bandwidth channel is an intra IC connection and therefore 0057 Optionally, a Semaphore and/or Mutex is used for
faster than a Controller Area Network (CAN) architecture managing resource sharing, optionally using Spinlocks.
channel or any other inter IC connection channel known in Optionally a direct access to the hardware resources is done
the art. This connection allows dealing with a correlation of only by the ADAS server 102 and the hypervisor 107.
three dimensional (3D) maps (depth maps) and the ADAS 0.058 Optionally, the guest operating systems are used
sensors readings and/or ADAS algorithm outputs. for presenting data outputted by the ADAS functions only
0052 Additionally or alternatively, the hypervisor 107 and have higher priority over other guest operating systems.
manages access(es) of the ADAS server 102 to the resource In case this specific OS crashes ADAS can still continue to
(s) which are shared with the VMs 105,106, for instance to run and even provide critical alerts to the driver as the ADAS
the application processing unit(s) 104 and/or the memory Server has access to its own hardware resources and alert the
thereof 109. Other resources which the access thereto is driver using these resources.
managed by the hypervisor 107 may be a display, a storage 0059. As indicated above, the ADAS server 102 has
memory, serial AT Attachment (ATA) (SATA), universal direct access to hardware resources such as vehicle sensors,
serial bus (USB) and/or the like. These resources may be CAN bus, and communication interfaces required for its
accessible to the ADAS server 102 via the hypervisor 107 functionality. These resources are optionally not accessible
that provides the physical access thereto. Optionally, the by the hypervisor 107.
hypervisor 107 manages usage of resources based on one or 0060. The architecture described above supports various
more predefined priority rules, for instance granting access booting schemes, for example prioritizing the booting the
requests from threads of the ADAS server 102 before access ADAS server 102 before the VMs 105, 106 and/or the
requests from threads of the VMs 105,106 and/or prioritize ADAS enhancing VM 105 before the IVIVM 106.
requests from one VM over another. 0061 This allows loading ADAS function threads which
0053. The above described SoCallows avoiding interfer are essential to execute when the vehicle is ignited Such as
ence between the ADAS server 102 and VMs 105,106 as the threads of image processing functions of an output of a front
VMs 105, 106 do not operate on the ADAS processing image sensor, analysis function of data from a rear pedes
unit(s) 103 and cannot block, hinder or deprioritize ADAS trian detection IR sensor, a Forward Collision Warning
threads or degrade the user experience of the ADAS func (FCW) function or a Lane Departure Warning (LDW) func
tions. As the VMs 105, 106 do not operate on the ADAS tion. Once these ADAS function threads are loaded and
processing unit(s) 103; the ADAS server 102 is not affected running the rest of the threads are loaded. For example,
from any processing or execution malfunction of the VMS resources of the ADAS server 102, including the ADAS
105, 106. Moreover, the ADAS server 102 may be rebooted processing unit(s) 103 and required memory and/or inter
separately from the VMs 105,106, for example as described faces such as sensor interfaces are programmed to be allo
below. cated to the ADAS server 102 before the hypervisor 107
0054 Furthermore, malwares such as worms, viruses, loads the operating systems of the VMs 105,106.
and/or bots which may penetrated to the VMs 105, 106 0062. As described above, ADAS enhancing functions
cannot propagate into the ADAS server 102 as the ADAS may include display functions for displaying ADAS func
server 102 is executed on a separate operating system Such tions outputs. In runtime, the hypervisor 107 may maintain
as a real time operating system (RTOS) or any ISO26262 a communication channel with the ADAS server 102 or with
US 2017/0039084 A1 Feb. 9, 2017

the memory 108 of the ADAS processing unit(s) 103 in data is stored in the memory 108 of the ADAS processing
order to acquire status data indicative of a proper function unit(s) 103 and/or available by querying the ADAS server
ing of the ADAS server 102 and/or to provide a channel to 102. As shown at 403, ADAS enhancing function is
acquire ADAS functions outputs as an input to ADAS executed by the application processing unit(s) 104. As
enhancing functions and/or IVI functions which generate a shown at 404, the memory 108 of the ADAS processing
display of the ADAS functions outputs to the driver. unit(s) 103 or the ADAS server is accessed via the hyper
0063 Reference is now made to FIG. 3, which is an visor 107 to acquire the ADAS data and to use it as an input
exemplary booting process wherein the hypervisor is loaded for processing an ADAS enhancing function or an IVI
regardless of whether the ADAS server 102 running or not, function. For example, this process allows the IVI VM for
according to some embodiments of the present invention. In example to receive data captured by vehicle sensors and
the process depicted in FIG. 3, after the hypervisor 107 is processed by the ADAS processing unit(s) 103. The IVIVM
loaded 201, the operation of the ADAS server 102 is assured can now analyze the received data and/or transmit it to a
202. When the ADAS server 102 is not loaded, ADAS server remote server via a network interface. The data may be
load instructions are automatically sent to execution 203. single images, continuous video and/or multiple frames
When the ADAS server 102 is loaded, VM 105 and/or VM received by the ADAS server 102, optionally with image or
106 are loaded to execution 204. Video metadata (e.g. time, location and/or the like) as
0064. In such embodiments, when the hypervisor 107 is received from one or more image sensors and/or other
reset or rebooted, for example as an outcome of an error or sensors which are directly connected to the ADAS server
re-ignition of the vehicle, the hypervisor 107 is reloaded and 102.
queries to determine the operation status of the ADAS server 0070 The methods as described above are used in the
102 (e.g. alive or inoperative). In case the hypervisor 107 fabrication of integrated circuit chips.
finds that ADAS is up and running then there is no need to 0071. The descriptions of the various embodiments of the
load ADAS software and continue directly to loading guest present invention have been presented for purposes of
operating systems of the VMs 105, 106. illustration, but are not intended to be exhaustive or limited
0065 Reference is now made to FIG. 4, which is an to the embodiments disclosed. Many modifications and
exemplary booting process, according to Some embodiments variations will be apparent to those of ordinary skill in the
of the present invention. In the process depicted in FIG. 4. art without departing from the scope and spirit of the
the ADAS server 102, for example ADAS software code, is described embodiments. The terminology used herein was
loaded and executed before the hypervisor 107 is loaded. chosen to best explain the principles of the embodiments, the
Optionally, the instructions for booting the hypervisor 107 practical application or technical improvement over tech
are executed as a thread of the ADAS server 102. Once nologies found in the marketplace, or to enable others of
hypervisor code is loaded and running IVI code is loaded ordinary skill in the art to understand the embodiments
and executed. disclosed herein.
0066. Optionally, the SoC 100 has at least two memory 0072. It is expected that during the life of a patent
ports, for example a port to a Double data rate (DDR) maturing from this application many relevant systems and
memory Such as a DDR Synchronous dynamic random methods will be developed and the scope of the term a
access memory (SDRAM). In such embodiment the ADAS memory, a channel, a network, a communication and/or the
server 102 may be allocated with one port and the one or like is intended to include all such new technologies a priori.
more VMs 105, 106 may be allocated with one or more of 0073. As used herein the term “about refers to +10%.
the others. Optionally, the SoC 100 has a single port to a 0074 The terms “comprises”, “comprising”, “includes”,
memory unit. In such embodiment the hypervisor 107 veri “including”, “having and their conjugates mean “including
fies whether the DDR memory is configured by reading/ but not limited to’. This term encompasses the terms “con
writing. When verification fails a boot process may be sisting of and "consisting essentially of.
instructed to load the ADAS server. 0075. The phrase “consisting essentially of means that
0067. In order to determine whether an ADAS server is the composition or method may include additional ingredi
reset or shut down properly, configuration information indi ents and/or steps, but only if the additional ingredients
cating a current state is saved in a non-volatile memory, for and/or steps do not materially alter the basic and novel
example every state change. Optionally, the configuration characteristics of the claimed composition or method.
information indicates which algorithms and services were 0076. As used herein, the singular form “a”, “an and
running prior to reset and/or reboot event. “the include plural references unless the context clearly
0068. Other common resources like GPU and other hard dictates otherwise. For example, the term “a compound” or
ware accelerators may be shared between the ADAS server “at least one compound may include a plurality of com
102 and the VMs 105, 106, for instance using spinlocks or pounds, including mixtures thereof.
Mutexes. (0077. The word “exemplary” is used herein to mean
0069. Reference is now also made to FIG. 5 which is a 'serving as an example, instance or illustration'. Any
flowchart 400 of an exemplary usage of data calculated by embodiment described as “exemplary” is not necessarily to
an ADAS function(s) executed using the ADAS processing be construed as preferred or advantageous over other
unit(s) 103 as an input for an ADAS enhancing function or embodiments and/or to exclude the incorporation of features
an IVI function executed by the application processing from other embodiments.
unit(s) 104, according to some embodiments of the present (0078. The word “optionally” is used herein to mean “is
invention. In use, as shown at 401, one or more ADAS provided in some embodiments and not provided in other
function(s) are executed. As shown at 402 this generates data embodiments”. Any particular embodiment of the invention
Such as Velocity value, movement value, collusion alert may include a plurality of “optional features unless such
value, lane departure warning value and/or the like. This features conflict.
US 2017/0039084 A1 Feb. 9, 2017

007.9 Throughout this application, various embodiments at least one application processing unitat least one VM,
of this invention may be presented in a range format. It wherein said VM code is executed separately and
should be understood that the description in range format is independently from an execution of said ADAS code:
merely for convenience and brevity and should not be and
construed as an inflexible limitation on the scope of the a hypervisor which manages an execution of at least one
invention. Accordingly, the description of a range should be operation system (OS) of said at least one VM and an
considered to have specifically disclosed all the possible access to a processor shared memory of said at least one
Subranges as well as individual numerical values within that ADAS processing unit for acquiring an outcome of
range. For example, description of a range Such as from 1 to executing said ADAS computer instructions for the
6 should be considered to have specifically disclosed sub completion of an ADAS enhancing function by said
ranges such as from 1 to 3, from 1 to 4, from 1 to 5, from execution of said at least one VM on said at least one
2 to 4, from 2 to 6, from 3 to 6 etc., as well as individual application processing unit.
numbers within that range, for example, 1, 2, 3, 4, 5, and 6. 2. The system of claim 1, wherein said hypervisor man
This applies regardless of the breadth of the range. ages an allocation of a hardware resource shared by said at
0080 Whenever a numerical range is indicated herein, it least one VM and at least one thread generated by an
is meant to include any cited numeral (fractional or integral) execution of said ADAS code by said at least one ADAS
within the indicated range. The phrases “ranging/ranges processing unit.
between a first indicate number and a second indicate 3. The system of claim 2, wherein said allocation is done
number and “ranging/ranges from a first indicate number at a build or setup stage.
“to a second indicate number are used herein interchange 4. The system of claim 2, wherein said hardware resource
ably and are meant to include the first and second indicated is said at least one application processing unit.
numbers and all the fractional and integral numerals ther 5. The system of claim 2, wherein said hardware resource
ebetween. is selected from a group consisting of a display, a storage
0081. It is appreciated that certain features of the inven memory, serial AT Attachment (ATA) (SATA), and a uni
tion, which are, for clarity, described in the context of versal serial bus (USB) port.
separate embodiments, may also be provided in combination 6. The system of claim 2, wherein said at least one VM
in a single embodiment. Conversely, various features of the comprises an ADAS enhancing VM for executing a plurality
invention, which are, for brevity, described in the context of of ADAS enhancing functions using said outcome.
a single embodiment, may also be provided separately or in 7. The system of claim 6, wherein said at least one VM
any Suitable Subcombination or as Suitable in any other further comprises at least one in-vehicle infotainment (IVI)
described embodiment of the invention. Certain features VM for executing a plurality of IVI functions using said
described in the context of various embodiments are not to application processing unit.
be considered essential features of those embodiments, 8. The system of claim 7, wherein said hypervisor priori
unless the embodiment is inoperative without those ele tizes a usage of said at least one application processing unit
mentS. by said ADAS enhancing VM over said at least one IVIVM
0082 Although the invention has been described in con based on one or more predefined priority rules.
junction with specific embodiments thereof, it is evident that 9. The system of claim 6, wherein said plurality of ADAS
many alternatives, modifications and variations will be enhancing functions comprises instructions to display said
apparent to those skilled in the art. Accordingly, it is outcome on a map display executed by said ADAS enhanc
intended to embrace all such alternatives, modifications and ing VM.
variations that fall within the spirit and broad scope of the 10. The system of claim 6, wherein said plurality of
appended claims. ADAS enhancing functions comprises instructions to dis
0083 All publications, patents and patent applications play said outcome on a dashboard display executed by said
mentioned in this specification are herein incorporated in ADAS enhancing VM.
their entirety by reference into the specification, to the same 11. The system of claim 1, wherein said at least one
extent as if each individual publication, patent or patent ADAS processing unit comprises at least one digital signal
application was specifically and individually indicated to be processing unit and said at least one application processing
incorporated herein by reference. In addition, citation or unit comprises at least one central processing unit (CPU)
identification of any reference in this application shall not be used for executing functions of both said at least one VM
construed as an admission that such reference is available as and said ADAS code.
prior art to the present invention. To the extent that section 12. The system of claim 1, wherein said ADAS code and
headings are used, they should not be construed as neces said at least one VM are executed on different operating
sarily limiting. systems.
What is claimed is: 13. The system of claim 1, wherein when a reboot is held,
1. A system on chip (SoC), comprising: said hypervisor is loaded as an outcome of executing a
an integrated circuit (IC) integrating the following into a thread of said ADAS code.
single chip: 14. The system of claim 1, wherein when a reboot is held
at least one advance driver assistance systems (ADAS) said hypervisor loads said at least one VM only after said
processing unit; ADAS code is loaded and executed by said at least one
at least one application processing unit; ADAS processing unit.
at least one memory storing ADAS code comprising 15. The system of claim 1, wherein an execution of said
ADAS computer instructions adapted to be executed on ADAS code comprises execution of a plurality of ADAS
said at least one ADAS processing unit for processing functions each selected from a group consisting of adaptive
vehicle sensor data and VM code for executing on said cruise control (ACC), adaptive high beam, glare-free high
US 2017/0039084 A1 Feb. 9, 2017

beam and pixel light, adaptive light control: Swivelling an ADAS enhancing function by execution of said at
curve lights, automatic parking, automotive night vision, least one VM on said at least one application processing
blind spot monitor, collision avoidance system, crosswind unit.
stabilization, driver drowsiness detection, driver Monitoring 17. A computer readable medium comprising computer
System, electric Vehicle warning Sounds (used in hybrids executable instructions adapted to perform the method of
and plug-in electric Vehicles), emergency driver assistant, claim 16.
Forward Collision Warning, Intersection assistant, Hill 18. A computer program product for executing an ADAS
descent control, intelligent speed adaptation or intelligent enhancing function on system on chip (SoC), the computer
speed advice (ISA), Lane departure warning system, Lane program product comprising a non transitory computer
change assistance, Pedestrian protection system, Traffic sign readable storage medium having program instructions
recognition, Turning assistant, Vehicular communication embodied therewith, the program instructions executable by
systems, Wrong-way driving warning, and lane departure processors to cause the SoC to:
warning. process vehicle sensor data according to at least one
16. A method of executing an ADAS enhancing function advance driver assistance systems (ADAS) function by
on system on chip (SoC), comprising: executing ADAS code on at least one ADAS processing
unit integrated in an integrated circuit (IC);
processing vehicle sensor data according to at least one store at least one outcome of said processing in a proces
advance driver assistance systems (ADAS) function by Sor shared memory of said at least one ADAS process
executing ADAS code on at least one ADAS processing ing unit;
unit integrated in an integrated circuit (IC); use a hyper visor to manage execution of at least one
storing at least one outcome of said processing in a operation system of at least one VM on at least one
processor shared memory of said at least one ADAS application processing unit integrated in said IC sepa
processing unit: rately and independently from an execution of said
using a hyper visor to manage execution of at least one ADAS code:
operation system of at least one VM on at least one manage by said hypervisor an access to said processor
application processing unit integrated in said IC sepa shared memory of said ADAS processing unit for
rately and independently from an execution of said acquiring said at least one outcome for a completion of
ADAS code: an ADAS enhancing function by execution of said at
managing by said hypervisor an access to said processor least one VM on said at least one application processing
unit.
shared memory of said ADAS processing unit for
acquiring said at least one outcome for a completion of