Digital Electronics MCQs [set-11]
251. Non inverting dynamic register storage cell consists of transistors
for nMOS and for CMOS.
A. six, eight
B. eight, six
C. five, six
D. six, five
Answer: A
252. Register cell consists of
A. inverter
B. pass transistor
o m
C. inverter & pass transistor
. c
D. none of the mentioned te
Answer: C a
q M
c
253. In a four bit dynamic shift register basic nMOS transistor or inverters are
connected in
A. series
M
B. cascade
C. parallel
D. series and parallel
Answer: B
254. In four bit dynamic shift register output is obtained
A. parallel output at inverters 1, 3, 5, 7
B. parallel output at inverters 1, 5, 8
C. parallel output at all inverters
D. parallel output at inverter 2, 4, 6, 8
Answer: D
255. Output values of Moore type FSM are determined by its
A. input values
B. output values
C. clock input
D. current state
Answer: D
256. Moore machine output is synchronous.
A. true
B. false
Answer: A
257. Finite state machines are combinational logic systems.
A. true
B. false
Answer: B
258. What happens if the input is high in FSM?
A. change of state
B. no transition in state
C. remains in a single state
D. invalid state
Answer: A
259. What happens if the input is low in FSM?
A. change of state
B. no transition in state
C. remains in a single state
D. invalid state
Answer: B
260. In FSM diagram what does circle represent?
A. change of state
B. state
C. output value
D. initial state
Answer: B
261. In the FSM diagram, what does arrow between the circles represent?
A. change of state
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B. state
C. output value
D. initial state
Answer: A
262. In the FSM diagram, what does the information below the line in the circle
represent?
A. change of state
B. state
C. output value
D. initial state
Answer: C
263. Moore machine has states than a mealy machine.
A. fewer
B. more
C. equal
D. negligible
Answer: B
264. State transition happens in every clock cycle.
A. once
B. twice
C. thrice
D. four times
Answer: A
265. In digital logic, a counter is a device which
A. counts the number of outputs
B. stores the number of times a particular event or process has occurred
C. stores the number of times a clock pulse rises and falls
D. counts the number of inputs
Answer: B
266. A counter circuit is usually constructed of
A. a number of latches connected in cascade form
B. a number of nand gates connected in cascade form
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C. a number of flip-flops connected in cascade
D. a number of nor gates connected in cascade form
Answer: C
267. A decimal counter has states.
A. 5
B. 10
C. 15
D. 20
Answer: B
268. What is the maximum possible range of bit-count specifically in n-bit binary
counter consisting of ‘n’ number of flip-flops?
A. 0 to 2n
B. 0 to 2n + 1
C. 0 to 2n – 1
D. 0 to 2n+1/2
Answer: C
269. How many types of the counter are there?
A. 2
B. 3
C. 4
D. 5
Answer: B
270. Three decade counter would have
A. 2 bcd counters
B. 3 bcd counters
C. 4 bcd counters
D. 5 bcd counters
Answer: B
271. BCD counter is also known as
A. parallel counter
B. decade counter
C. synchronous counter
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D. vlsi counter
Answer: B
272. The parallel outputs of a counter circuit represent the
A. parallel data word
B. clock frequency
C. counter modulus
D. clock count
Answer: D
273. Ring shift and Johnson counters are
A. synchronous counters
B. asynchronous counters
C. true binary counters
D. synchronous and true binary counters
Answer: A
274. What is the difference between a shift-right register and a shift-left register?
A. there is no difference
B. the direction of the shift
C. propagation delay
D. the clock input
Answer: B
275. What is a transceiver circuit?
A. a buffer that transfers data from input to output
B. a buffer that transfers data from output to input
C. a buffer that can operate in both directions
D. a buffer that can operate in one direction
Answer: C
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