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Condition Monitoring in a Power Module Using On-State Resistance and Case

Temperature

Article in IEEE Access · November 2018

DOI: 10.1109/ACCESS.2018.2879314

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Received September 30, 2018, accepted October 23, 2018, date of publication XX XX, 2018, date of current version XX XX, 2018
Digital Object Identifier 10.1109/ACCESS.2017.Doi Number

Condition Monitoring in a Power Module

Using On-state Resistance and Case
Temperature
Wei Lai1, 2, Member, IEEE, Yuanpei Zhao1, Minyou Chen1, Senior Member, IEEE, Yueyue
Wang3, Xueni Ding1, Shengyou Xu1, Liangming Pan2
1
State Key Laboratory of Power Transmission Equipment & System Security and New Technology, School of Electrical Engineering, Chongqing
University, Chongqing, 400044, China
2
Department of Nuclear Engineering, Chongqing University, Chongqing 400044, China
3
State Grid Chengdu Qingbaijiang Electric Power Supply Branch
Corresponding author: Wei Lai (e-mail: [email protected]).
This work was supported by the National Natural Science Foundation of China (grant numbers 51707024 and 51477019), the China Postdoctoral Science
Foundation (grant numbers 2017M612909), the special sponsored post-doctoral research program of Chongqing (grant numbers Xm2017105) and National
“111” Project (B08036).

ABSTRACT Power electronics are widely used in energy conversion systems due to their high efficiency.
Finding and replacing the defective power electronic modules timely by monitoring the ageing state of
devices can greatly improve the security of power converters and reduce the loss caused by the device
failure. Packaging-related fatigue has been identified as one of the main causes of the failures of power
electronic modules. This paper proposes a method to monitor the fatigue inside a module by identifying the
increase of internal on-state resistance under a certain operation conditions due to the device packaging-
related fatigue. Multiple physical field model results show that the junction temperature increases with the
thermal resistance, which causes an increase in the on-state resistance. Therefore, the healthy state of power
modules can be diagnosed by comparing the difference of the on-state resistance before and after ageing in
the same case temperature, which can be measured directly. Experiments and simulations are conducted to
demonstrate the concept and verify the method.

INDEX TERMS MOSFET, condition monitoring, reliability, fatigue, semiconductor devices, on-state
resistance.

I. INTRODUCTION solder fatigue. This method needs an accurate calculation of

Power electronic modules which are widely used in the the power dissipation, which is difficult to be achieved in
harsh environment are the core components in most of the practice, and it cannot identify the fatigue source, which is
power electronic systems, playing a main role in energy caused by the power module or the heat sink. A method is
generation, transmission and consumption systems. A presented to monitor the solder fatigue in a voltage-source
converter failure will result in high maintenance costs. The inverter by detecting its output harmonics based on thermal
power system reliability, risk and maintenance costs can be and power loss models, because low-order harmonics,
greatly improved by replacing semiconductor devices when which are caused by non-ideal switching characteristics are
incipient failures are detected. Therefore, building an affected by the increase of the junction temperature of
accurate online condition monitoring model is becoming an power devices due to the solder fatigue [2]. However, a
increasingly important issue to investigate. However, the small change of the harmonic current is used to detect the
condition monitoring of power modules is still a challenge. solder ageing of power modules. Conditions are monitored
Condition monitoring methods are established based on by identifying dynamic changes of the gate current, which
the failure parameters, which led by packaging-related is based on the principle that parasitic elements inside the
fatigue nowadays. Reference [1] propose a method using module are affected by local damage induced by ageing
the case-above-ambient temperature rise to evaluate the over time [3]. It is hard to measure the changes of the gate

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Wei Lai: Condition Monitoring in a Power Module Using On-state Resistance and Case Temperature

current in an actual converter, because the detection process joining interface due to the stress concentration. Once there
must be completed in nanoseconds, and it cannot apply to are macroscopic cracks, it will propagate towards the center
evaluate the ageing state of a module when part of the bond at high speed and lead to final fatigue failure. Normally,
wires lift off. A real-time health monitoring method is thermal resistance is used to indicate the health of the
proposed by using 2-D case temperatures, which can defect solder layer. The calculated thermal resistance is based on
the bond-wire ageing, metallization ageing, and substrate the junction temperature and power loss. While the junction
solder ageing by using only two temperature sensors [4]. In temperature is difficult to be directly measured, and the
[5-6], a new method is proposed to measure the on-state power loss is also hard to be accurately calculated.
collector–emitter voltage during converter operation to Normalized on-state resistance is usually used to indicate
monitor the device fatigue, which may play a key role in the healthy state of the bond wires of MOSFET modules
assessing the reliability of power converters, but the under a certain junction temperature, but both the die-attach
junction temperature is difficult to be measured in an actual solder fatigue and bond wires lift off lead to the increase of
converter due to the housing of the modules. In [7-8], a the on-state resistance. The measured on-state resistance of
method is presented for detecting the healthy condition of the device contains four part as shown in (1).
bond wires in a module based on the short-circuit current of Rds on  Rbaseplate  Rsolder  Rdie  Rbond  wires (1)
power modules. In this method, it is low sensitive to
where Rbaseplate is the resistance of the baseplate, Rsolder is the
indicate the ageing state, and the driving voltage should
resistance of the die-attach solder, Rdie is the chip resistance
only be set as a constant inflexion driving voltage.
and Rbond-wires is the resistance of the paralleled wires.
Although such researches are being developed, there are
still some innate shortcomings to limit their application.
This paper proposes a new method for the device fatigue
monitoring by measuring the case temperature, on-state
voltage and drain current. Changes of the on-state
resistance are monitored to indicate the healthy condition of
the internal packaging.
The remainder of this paper is organized as follows. In
Section II, the mechanism of the module ageing and the
effects of solder fatigue are investigated. Meanwhile, an FE
(Finite Element) model is established to obtain the FIGURE 1. Part of an IGBT module structure.
characteristic parameters of the module fatigue. Section III
presents a condition monitoring method based on detecting
the change of the on-state resistance at an electrical
operating point and case temperature. In Section IV,
experimental results are provided for validation. Section V
concludes the paper.

II. FAILURE MECHANISM AND FE MODELING

A. FAILURE MECHANISM OF POWER ELECTRONIC

DEVICES
In the actual converter, the junction temperature will
fluctuate with the load condition varies. Mismatched
coefficients of thermal expansion between adjacent layers
and internal temperature gradients cause cyclic thermo-
mechanical stresses, which leads to fatigue damage. Part of
an MOSFET module’s (IXFK80N60P3, 600V/80A) FIGURE 2. Fatigue of solder layer.
structure is shown in Fig. 1. The main failure areas are the
junction interfaces with the chip, because the power References [14-16] show that the die-attach solder
semiconductor chip produces massive amounts of heat fatigue is usually more dominant whilst bond wire joints
during switching and conducting. The most commonly start to degrade when the junction temperature is above
observed packaging-related failure modes are bond wire lift 473K. Therefore, solder fatigue-based condition monitoring
off [9-10] and solder delamination [11-13]. MOSFET method could be more effective than bond wire fatigue-
modules would continually bear the impact of temperature based method. To further discuss the effect of the solder
swings, which leads to the accumulation of plastic strain. fatigue on the parameters, the interaction process is shown
Macroscopic cracks will be initiated at the corner of the die in Fig. 2. Once the solder fatigue occurs, the junction to

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Wei Lai: Condition Monitoring in a Power Module Using On-state Resistance and Case Temperature

case thermal resistance Rth increases gradually, and the resistance, and a is the strain rate sensitivity of the
junction temperature will increase on a specific case hardening/softening.
temperature. The on-state resistance will increase due to the TABLE II
ANAND’S PARAMETERS DEFINITION
positive temperature coefficient. Where Rth represents the
Parameters s0 Q/R A ξ m0
actual increase of the thermal resistance. Experimental Solder 12.41 9400 4.1x106 1.5 0.303
results show that 1.5 K increase of case temperature while Parameters h0 s η a \
the junction temperature increases by 9.1 K using a thermal Solder 1378.95 13.79 0.07 1.3 \
pad to emulate solder fatigue in [1]. It indicates that the
increase of the junction temperature is larger than the case Multiphysics coupling field between electricity and heat
temperature. However, the junction temperature is difficult transfer is used in this model. When the current source is
to be measured due to the packaging house. The increase of considered for the thermal analysis, the differential
on-state resistance may be obvious due to the positive equation for the temperature calculation of the element in
temperature coefficient. Therefore, the on-state resistance each layer is shown in [18]. The coupled relationship is that
could be selected as the health indicator of the MOSFET the on-state resistance increases with the junction
modules. temperature and the large on-state resistance products the
large power loss which causes the further increase of the
B. FE MODEL OF POWER DEVICES junction temperature.
According to the packaging structure of the MOSFET   J     ( )  Q (2)
module IXFK80N60P3, an electrical-thermal coupled j
analysis model is established in COMSOL Multiphysics 1
software. The geometries and the material properties of Qv  | J |2 (3)
each layer are supplied by the power module manufacture 
as shown in Table I. T
TABLE I    k T   Qv   c (4)
MOSFET DEVICE AND PACKAGING MATERIAL PARAMETERS t
SnAg where J and γ are the current density and conductivity
Parameters Si Chip Copper Aluminum
(3) respectively, Qj is the boundary current source, T is the
14.24 x 18.6 x As
Area (mm·mm) - temperature, Qv is the heat source per unit volume, k is the
10.48 20.4 chip
Thickness (μm) 200 204 120 - thermal conductivity, ρ is the density and c is the specific
Diameter (mm) - - - 0.30 heat.
Coefficient of Thermal To obtain accurate thermal and electrical characteristics
3 17 21 21
Expansion (10-6/K)
Young’s Modulus (GPa) 162 110 10 68 of MOSFET modules under different loading conditions,
Poisson’s Ratio (1) 0.28 0.35 0.4 0.3 some materials are set with temperature-dependent thermal
Thermal Conductivity conductivity in the model [19], especially for the chip
130 400 50 237
(W/(m·K))
Thermal Capacity (silicon), which shows different behaviors at various
700 385 150 900 temperatures according to the output characteristic curves
(J/(kg·K))
-3
Density (kg/m ) 2330 8960 7400 2690 as shown in the datasheet of IXFK80N60P3 devices [20].
However, there are only on-state resistance characteristics
All materials of this power device, except the solder layer at 298K and 398K under driving voltage 10V. In the
are considered to have elastic properties. The solder layer is aerospace application, the range of the ambient temperature
modeled by using the Anand’s visco-plastic material model, during this module running is from 218K to 343K.
which is popular to solder layer involving strain and Therefore, several tests are designed from 218K to 423K
temperature effect, assuming plastic flow occurs at all junction temperature and 10V to 20V driving voltage to
nonzero stress value. This model accounts for the physical measure the on-state resistance using Agilent B1505 and
phenomenon of strain-rate, strain hardening or softening the temperature chamber as shown in Fig. 3. It can be seen
characteristics, crystalline texture and its evolution, and that the on-state resistance increases with current, junction
does not require an explicit yield condition [17]. The temperature and driving voltage respectively. It indicates
specific material properties of the solder layer are shown in that the on-state resistance has a non-linear relationship
Table II. Where s0 (MPa) is the initial deformation with drain current, junction temperature and driving voltage.
resistance, Q/R (K) is activation energy/Boltzmann’s Therefore, the operation conditions should be focused when
constant, A (s-1) is the pre-exponential factor, ξ is the stress the on-state resistance is used to indicate the health status of
multiplier, m0 and η are the strain rate sensitivity of stress the MOSFET module. On-state resistances under different
and strain rate sensitivity of the saturation value conditions are modeled using look up tables (LUTs), which
respectively, h0 (MPa) is the hardening/softening constant, s are set as the material parameter of the chip, i.e., Rds-on = f
(MPa) is the coefficient for saturation value of deformation (ID, Tj, VGS) as shown in Fig. 3(c).

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emulate the heat dissipation of the forced air cooling on the

bottom surface of the FE model to simplify the model
which is set to 2000 W/(m2·°C); packaging house is set as
acrylic plastic and the open surfaces are set as natural
convection which is set to 10 W/(m2·°C). The ambient
temperature is set the same as the measured value 298K. FE
model is generated as shown in Fig. 4, in which the total
number of nodes is 18075 and total number of body
elements is 125118.

(a)

FIGURE 4. Boundary conditions and 3-D finite element mesh of the FE

model.

C. FE MODEL STEADY-STATE RESULTS

(b)

(a)

(c)

FIGURE 3. On-state resistance in different conditions. (a) on-state

resistance vs. drain current under VGS = 10V. (b) on-state resistance vs.
drain current under Tj = 373K. (c) on-state resistance as a function of Tj
and ID.

In order to obtain accurate results and save the simulation

time, a multilevel meshing process is used in the FE model.
Multilevel meshing means that for the critical layers (bond
(b)
wires and solder layers), finer meshing is processed rather
than other layers like the baseplate and plastic housing. FIGURE 5. Electric potential distribution of FE model. (a) 3D result. (b)
Section result.
Boundary conditions of the FE model are set as follows: the
current load is applied to the drain terminal D in the
simulation; the electric potential at the cross section of the
source terminal S is set to zero; heat flux is defined to

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A 53A constant current is uniformly applied on the drain state resistance increases nonlinear with temperature and
terminal and the steady-state electric potential distribution drain current which agrees with the aforementioned test
of the MOSFET module is shown in Fig. 5. Normally the results. To verify the accuracy of the FE model in the paper,
MOSFET module is directly mounted on the heat sink the FE model results and the manufacture datasheet results
using thermal grease to ensure contact and improve the are compared under different electrical operating points and
physical integrity and thermal transfer, and the thermal junction temperatures. Good agreements are observed over
grease is set as uniform [21] with a thickness of 40 μm. In the drain current and junction temperature rise, with error
the model a metallization layer (Aluminium) of dimensions less than 1mΩ. Therefore, the FE model can be used to
14.24 mm by 10.48 mm and thicknesses 10 μm is used to extract the characteristic parameters of the module fatigue
reduce the contact resistance. It shows that the main and the accuracy meets the design requirement.
forward voltage drop is in the chip; the proportion of the
baseplate is 0.0001%, the proportion of the solder is 0.05%,
the proportion of the chip is 98.25% and the proportion of
the bond wires is 1.70%, respectively.
Steady-state temperature distribution of the FE model is
shown in Fig. 6. It shows that the temperature is
concentrated at the chip, die-attach and baseplate. Rth is
calculated to validate the model. The simulated and the
measured thermal resistance are 0.0955 C/W and 0.096
C/W respectively as shown in the datasheet. The simulated
results are almost consistent with the datasheet, and the
error is only about 0.52%.

(a)

(a)

(b)

FIGURE 7. Results from simulation and datasheet. (a) on-state

resistance as a function of drain current. (b). on-state resistance as a
function of junction temperature.

D. CHARACTERISTIC PARAMETERS OF THE MODULE

FATIGUE
Further FE models are designed to obtain the
characteristic parameters which are used to establish the
condition monitoring model under different simulated
conditions. The module is fed with 40A current with and
without packaging related failures. The effect of individual
solder fatigue on parameters is carried out by reducing the
(b)
area of the solder layer, while the bond wire fatigue is
FIGURE 6. Temperature distribution of FE model. (a) 3D result. (b) emulated by reducing the number of connected bond wires.
Section result.
Reference [22] and 23] propose that 5% increase of on-state
Fig. 7 shows the variation of the on-state resistance as a voltage indicates the bond wire damage for IGBTs.
function of drain currents. It clearly displays that the on-

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Reference [24] show that 20% increase of thermal Fig. 9 shows that the junction temperature and the on-
resistance indicates the solder fatigue-related failure. The state resistance increase with the thermal resistance when
on-state resistance is normally used as the healthy indicator Tcase = 323.15K and ID = 40A. Meanwhile, it shows 54%
of MOSFET modules. The simulated results for the bond increase of the on-state resistance corresponding to 20%
wire fatigue are shown in Fig. 8. Fig. 8(a) shows the change increase of Rth, which implies that the on-state resistance
of the junction temperature, thermal resistance and on-state has higher sensitivity than Rth. What is more, the thermal
resistance under different numbers of lifted off bond wires resistance will increase once solder fatigue occurs, which
when ID = 40A. It indicates about 6% increase of on-state will finally lead to the increase of the junction temperature
resistance when the five bond wires are lifted off, and it has and on-state resistance.
a slight effect on the junction temperature, because the
power loss of the whole chip is almost unchanged and the
path of heat flux is the same as the initial state. The slight
increase of junction temperature is caused by the change of
the bond-wire’s temperature. Rth is temperature dependent
as shown in (5), where Tj is the junction temperature, Tcase
is the case temperature, and Ploss is the power loss of the
modules. Fig. 8(b) shows that the temperature of the
remaining bond wires increases when four bond wires are
lifted off compared with Fig. 6(a), because the current of
remaining bond wires increases. Therefore, it leads to a
slight increase in the junction temperature.
T j  Tcase
Rth  (5)
Ploss FIGURE 9. Effects of solder failure on the on-state resistance.

Therefore, the simulated results agree with failure

mechanism of power electronic devices as shown in part A
of section II and the on-state resistance could be used to
indicate the healthy condition of modules at a given
electrical operating point and case temperature. Because
those parameters can be measured directly and the healthy
indicator has higher sensitivity than traditional healthy
indicator.

III. CONDITION MONITORING MODEL BASED ON ON-

STATE RESISTANCE
The traditional condition monitoring approaches cannot
be used in real-time application because it is still difficult to
(a) obtain the accurate power loss from the varying inverter
voltages and currents. Moreover, most power devices do
not have integrated temperature sensors positioned as
needed to measure the junction temperature. In this paper a
method is proposed to monitor the condition of the
MOSFET module by capturing the change of on-state
resistance at a given electrical operating point and case
temperature based on the results of section II. Because of
the fast thermal transmittance inside the module, there is a
direct relationship between the case and junction
temperature. In other words, an increase of case
temperature by 10 K implies increase of the junction
temperature by approximately the same amount when the
module is in healthy condition. The case temperature rather
(b) than the junction temperature, is concerned in the model,
FIGURE 8. Effects of bond wires failure on the parameters. (a) Change because the case temperature can be directly measured
of parameters. (b). Temperature distribution of FE model. using a thermocouple which is embedded on the surface of
the heat sink. The junction temperature is above the case

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Wei Lai: Condition Monitoring in a Power Module Using On-state Resistance and Case Temperature

temperature depending on the internal thermal resistance.

The internal thermal resistance increases with solder fatigue.
It should be noted that the junction temperature is not
directly used to indicate the healthy condition because it is
hard to be measured without removing the packaging house.
It is just used to show temperature dependence.
At the same electrical operating point and case
temperature, the change of the on-state resistance indicates
the degree of the solder fatigue. The relationship among the
on-state resistance, drain current and case temperature at a
driving voltage, Rds-on-m0 = f(ID, Tc), is firstly obtained for a
healthy module. Because in actual applications, converters
are not always working under constant load stresses and the
case temperature fluctuates with the change of load
conditions and the environment temperature. Then, the on-
state resistance and corresponding case temperature after
the modules wear out are recorded at the same electrical
operating point to be defined as the failure criteria.
This condition monitoring test can be conducted during
the operation by capturing the electrical operating points
that have been covered in the calibration test. The degree of
fatigue can be calculated by the damage D as defined in (6),
FIGURE 10. Flowchart of the proposed method.
where ΔRds-on-max is the maximum allowable change of on-
state resistance due to the module fatigue, which is defined
when Rth is increased by 20% from the initial value of a
new module. Rds-on-m0 is the original on-state resistance and
Rds-on-m is the current on-state resistance which is calculated
by (7). Once D reaches 100%, an alarm signal could be set
on. Moreover, when D is less than 100%, it can be useful
information for the inverter condition-based maintenance
and lifetime estimation.
Rds on  m  Rds on  m 0
D (6)
Rds on  max
Vds
Rds on  m  (7) (a)
ID
The procedure for the proposed condition monitoring
method is illustrated in the flowcharts as shown in Fig. 10.
Given the corresponding case temperature and drain current,
the on-state resistance Rds-on-m0 for healthy modules can be
looked up from the reference table. On-state resistance Rds-
on-m is calculated with measured parameters according to the
(7). D can then be calculated as the output. The reference
look up table about the on-state resistance, drain current
and the case temperature is extracted using the FE model
under different conditions as shown in Fig. 11. It shows that
the minimum absolute error is 32% when Rth is increased
by 20% and the failure criterion is varying under different
(b)
conditions. The maximum difference is 1.72 times when ID FIGURE 11. Failure and healthy module LUT. (a) LUT. (b) Absolute
= 80A and Tcase = 218.28K. The absolute error of the aged error.

module is large when the drain current and case

temperature are large. On-state resistance has higher
sensitivity than Rth which is consistent with previous results.

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A multi-stage simulation is conducted to simulate the Secondly, on-state resistance and case temperature are
change of environmental conditions when ID = 25A. The obtained where on-state resistance is calculated by the on-
change of the ambient temperature Ta leads to the change of state voltage and drain current. Lastly, the proposed method
the junction temperature, and on-state resistance will is applied to verify its practicability.
change accordingly. Results of the condition monitoring Buck converter is one of the simplest but most useful
model are calculated with and without solder fatigue as power converters. It is a step-down converter that converts
shown in Fig. 12(a). It indicates that the condition an unregulated DC input voltage to a regulated DC output
monitoring model can track the LUT-value effectively at a lower voltage. Fig. 13 depicts the basic circuit
under different ambient temperatures. To further discuss the configuration used in the buck converter. As can be seen, it
effectiveness of the condition monitoring model, damage D consists of two MOSFET modules Q3 and Q4, a diode D18,
is calculated for unaged and 1.17Rth0 modules as shown in an inductor L4, and three output capacitors C16, C18 and
Fig. 12(b). It shows that damage D is equal to zero for the C19. Two power modules are connected in parallel to meet
unaged module as shown in red line of Fig. 12(b), which a high output power. The inductor L4 acts as an energy
means that the module is healthy. However, damage D will storage element that keeps the current flowing while the
increase once the module starts to degrade. Damage D diode facilitates inductor current wheeling during the OFF
maintains the current value as shown in black line of Fig. time of the MOSFET modules. Filter consisting of
12(b), although the ambient temperature is changed. capacitors is normally added to the output of the converter
Consequently, the proposed model can eliminate the effect to reduce output voltage ripple. The input voltage is 100 V,
of environmental condition change on the model result. the output voltage is 28 V, and the switching frequency of
power modules is 50 kHz. Fig. 14 shows the schematic of
the on-state voltage Vds measurement circuit which is
described in [25-26]. Vds can be represented as (8). A
thermal pad is used to emulate a module failure via an
increase in thermal resistance. Experimental prototype of
the DC-DC converter is shown in Fig. 15. An electronic
load is used as the load resistance.

Vds  V 'ds  2V2  V1 (8)

(a)

FIGURE 13. DC-DC converter circuit.

(b)

FIGURE 12. Simulation and LUT damage D results. (a) Change of

parameters. (b). D result.

IV. EXPERIMENTAL VALIDATION

Experimental work is carried out to validate the
correctness of the condition monitoring method presented
in this paper by using IXYS MOSFET modules
FIGURE 14. Vds measured circuit.
(IXFK80N60P3). Firstly, a DC-DC converter is designed.

8 VOLUME XX, 2017

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/ACCESS.2018.2879314, IEEE
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Wei Lai: Condition Monitoring in a Power Module Using On-state Resistance and Case Temperature

normal state and wear out state are established for the
health assessment. The condition monitoring method is then
demonstrated by using DC-DC converter, which has the
advantages of being fast and easy to be implemented. This
model can be used for different environmental conditions
and load levels. It is expected that this study will be useful
for engineers developing practical condition monitoring
solutions for power electronic converters in order to
improve their operational reliability.
Using the proposed method, the real-time health level of
MOSFET module can be real time evaluated in the
operating power converter, and those defective MOSFET
modules could be replaced timely, which can greatly reduce
the maintenance costs and time to improve the security of
the power converter. The condition monitoring method
FIGURE 15. Test rig of the DC-DC converter.
proposed in this paper could also be applied to IGBT which
The measured Vds-on is 950 mV, ID is 10A which is has a similar packing structure with MOSFETs. Further
obtained from the electronic load (63205A) and Tc is studies on this condition monitoring method applying to
331.48 K which is measured using temperature data logger those devices are necessary in the future.
(RDXL6SD). It should be noted that ID is only half the
current of the electronic load, because there are two power REFERENCES
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VOLUME XX, 2017 9

2169-3536 (c) 2018 IEEE. Translations and content mining are permitted for academic research only. Personal use is also permitted, but republication/redistribution requires IEEE permission. See
http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/ACCESS.2018.2879314, IEEE
Access
Wei Lai: Condition Monitoring in a Power Module Using On-state Resistance and Case Temperature

[12] P. Ratchev, B. Vandevelde, I. D. Wolf, “Reliability and failure Yuanpei Zhao is currently working towards the
analysis of Sn-Ag-Cu solder interconnections for PSGA packages on M.Sc. degrees in electrical engineering from
Ni/Au surface finish,” IEEE Transactions on Device and Materials Chongqing University, China. He is working on
Reliability, vol. 4, no. 1, pp. 5-10, March 2004 reliability of power electronic modules with a
[13] N. Shammas, “Present problems of power module packaging special interest in condition monitoring of power
technology,” Microelectron. Rel., vol. 43, no. 4, pp. 519–527, 2003. modules.
[14] H. Huang, P.A. Mawby, “A Lifetime Estimation Technique for
Voltage Source Inverters,” IEEE Transactions on Power Electronics, vol.
28, no. 8, pp. 4113-4119, Aug. 2013
[15] W. Lai; M. Chen; L. Ran; Y. Xu; N. Jiang; X Wang; O. Alatise; P.
Mawby, “Experimental Investigation on the Effects of Narrow Junction
Temperature Cycles on Die-Attach Solder Layer in an IGBT Module,”
IEEE Transactions on Power Electronics, vol. 32, no. 2, pp. 1431-1441,
Feb. 2017. Minyou Chen (M’05-SM’14) received the
[16] S. Dusmez, M. Heydarzadeh, M. Nourani and B. Akin, "Remaining M.Sc. degree in Control Theory and
Useful Lifetime Estimation for Power MOSFETs Under Thermal Stress Engineering from Chongqing University, China,
With RANSAC Outlier Removal," IEEE Transactions on Industrial in 1987, and the Ph.D. degree in control
Informatics, vol. 13, no. 3, pp. 1271-1279, June 2017. engineering from the University of Sheffield,
[17] K. C. Otiaba, M. I. Okereke and R. S. Bhatti, “Numerical assessment Sheffield, the UK, in 1998. He is currently a
of the effect of void morphology on thermo-mechanical performance of Full Professor at Chongqing University. He is
solder thermal interface material,” Applied Thermal Engineering, vol.64. the author or coauthor of more than 180 papers.
no.2, pp. 51-63, Mar. 2014. His research interests include intelligent
[18] B. Gao; F. Yang; M. Chen; L. Ran; I. Ullah; Y. Xu; P.A. Mawby, "A modeling and control, reliability of power
Temperature Gradient-Based Potential Defects Identification Method for modules, micro-grid control, state monitoring in power distribution
IGBT Module," IEEE Transactions on Power Electronics, vol. 32, no. 3, systems.
pp. 2227-2242, March 2017.
[19] A. S. Bahmann, K. Ma, and F. Blaabjerg, “A novel 3D thermal Shengyou Xu received a PhD degree in electrical
impedance model for high power modules considering multi-layer thermal engineering from Chongqing University, China, in
coupling and different heating/cooling conditions,” in Proc. IEEE Appl. 2013. He was a Visiting Scholar at Durham
Power Electron. Conf. Expo., Charlotte, NC, USA, 2015, pp. 1209–1215. University, Durham, the UK in 2010. Currently,
[20] IXYS MOSFET Module Datasheet, IXFK80N60P3 [Online]. he is a lecturer of electrical engineering at the
Available: School of Electrical Engineering, Chongqing
http://www.mouser.com/ProductDetail/IXYS/IXFK80N60P3/?qs=%2fha2 University. His research interests include the
pyFaduhR2YHzcAwkhGFK4EuOJvCLF8QUag2hJVLKx2L4QECeFQ%3 control of power system and the reliability of
d%3d power module used in renewable energy systems.
[21] I. R. Swan, A. T. Bryant, N.-A. Parker-Allotey, and P. A. Mawby, “3-
D thermal simulation of power module packaging,” in Proc. Energy
Convers. Congr. Expo., San Jose, CA, USA, 2009, pp. 1247–1254 Xueni Ding is currently working towards the
[22] M. Held, P. Jacob, P. Nicoletti, and P. Scacco, “Fast power cycling M.Sc. degrees in electrical engineering from
test for IGBT modules in traction application,” Proc. Int. Conf. Power Chongqing University, China. She is working on
Electron. Drive Syst., vol. 1, pp. 425–430, 1997. reliability of power electronic modules.
[23] L. R. GopiReddy, L. M. Tolbert and B. Ozpineci, "Power Cycle
Testing of Power Switches: A Literature Survey," IEEE Transactions on
Power Electronics, vol. 30, no. 5, pp. 2465-2473, May 2015.
[24] U. Scheuermann and U.Hecht, “Power cycling lifetime of advanced
power modules for different temperature swings,” in Proc. PCIM
Nuremberg, 2002, pp. 59–64.
[25] S. Beczkowski, P. Ghimre, A. R. de Vega, S. Munk-Nielsen, B.
Rannestad, and P. Thogersen,” Online Vce measurement method for wear-
out monitoring of high power IGBT modules,” in Conf. Rec. EPE 2013, Yueyue Wang received the M.Sc. degrees in
2013 electrical engineering from Chongqing University,
[26] U. M. Choi, S. Jørgensen and F. Blaabjerg, "Advanced Accelerated China. She is working on reliability of power
Power Cycling Test for Reliability Investigation of Power Device electronic modules with a special interest in
Modules," IEEE Transactions on Power Electronics, vol. 31, no. 12, pp. failure mechanisms of solder layer in IGBT
8371-8386, Dec. 2016. modules based on FEM.
[27] Website of Gap Pad 1500. [Online]. Available:
https://www.bergquistcompany.com/pdfs/dataSheets/PDS_GP_1500_0711
%20v2.pdf

Wei Lai (M’-18) received the M.Sc. degree

from the Chongqing University of Technology,
Chongqing, China, in 2012, and the joint Ph.D. Liangming Pan received a PhD degree in
degree from the University of Warwick, engineering thermo-physics from Chongqing
Coventry, U.K., in 2015, funded by the China University, China, in 2002. He is currently a Full
Scholarship Council. He is currently a lecturer Professor at Chongqing University. He is the
in electrical engineering with the School of author or coauthor of more than 110 papers. His
Electrical Engineering, Chongqing University, research interests include numerical simulation,
Chongqing. His current research interests thermal analysis and safety evaluation of the
include the reliability of power modules, the reactor, micro-grid control and visualization
application of power electronics for electric methods and measurement technology of the
power generation, and the development of thermal problems.
condition monitoring methods for power electronic converters.

10 VOLUME XX, 2017

2169-3536 (c) 2018 IEEE. Translations and content mining are permitted for academic research only. Personal use is also permitted, but republication/redistribution requires IEEE permission. See
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