INTEGRATED CIRCUITS

DATA SHEET

TDA4663T
Baseband delay line
Product specification 1996 Nov 22
Supersedes data of September 1993
File under Integrated Circuits, IC02
Philips Semiconductors Product specification

Baseband delay line TDA4663T

FEATURES GENERAL DESCRIPTION

• Two delay lines, using the switched-capacitor The TDA4663T is an integrated baseband delay line circuit
technique, for a delay time of one horizontal line (1H) with a delay time of one horizontal line (1H) minus 55 ns
minus 55 ns (64 µs − 55 ns) (64 µs − 55 ns).
• Adjustment-free application
• Handles negative or positive colour-difference input
signals
• Clamping of AC-coupled input signals [mostly
colour-difference signals ±(R−Y) and ±(B−Y)]
• VCO without external components
• 3 MHz internal clock signal derived from a 6 MHz CCO,
line-locked by the sandcastle pulse (64 µs line)
• Sample-and-hold circuits and low-pass filters to
suppress the 3 MHz clock signal
• Output buffer amplifiers.

QUICK REFERENCE DATA

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

VP1 analog supply voltage (pin 9) 4.75 5 5.25 V
VP2 digital supply voltage (pin 1) 4.75 5 5.25 V
IP(tot) total supply current − 5.9 7.0 mA
Vi(p-p) input signal PAL/NTSC (peak-to-peak value)
±(R−Y); pin 16 − 1.3 − V
±(B−Y); pin 14 − 1.3 − V
Gv Vo
gain ------ of colour-difference output signals for PAL and NTSC
Vi

V 11 −1 0 +1 dB
---------
V 16

V 12 −1 0 +1 dB
---------
V 14

ORDERING INFORMATION

TYPE PACKAGE
NUMBER NAME DESCRIPTION VERSION
TDA4663T SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

1996 Nov 22 2
1996 Nov 22
BLOCK DIAGRAM
Philips Semiconductors

handbook, full pagewidth clamping pulse

7
Baseband delay line

16 SIGNAL LINE SAMPLE- 11

±(R−Y) LP ±(R−Y)
CLAMPING MEMORY AND-HOLD

mostly mostly
output
colour-difference pre-amplifiers colour-difference
buffers
input signals output signals

14 SIGNAL LINE SAMPLE- 12

±(B−Y) LP ±(B−Y)
CLAMPING MEMORY AND-HOLD

3
9
VP1 analog supply 2
n.c.
TDA4663T 6
3 MHz shifting clock n.c.
sandcastle 5 SANDCASTLE FREQUENCY DIVIDER 13
PHASE n.c.
pulse input DETECTOR BY-192 15
DETECTOR n.c.

6 MHz DIVIDER
LP
CCO BY-2

10 digital supply 1 3 4, 8
GND1 GND2
VP2 MED800

Fig.1 Block diagram.

TDA4663T
Product specification
Philips Semiconductors Product specification

Baseband delay line TDA4663T

PINNING

SYMBOL PIN DESCRIPTION

VP2 1 supply voltage for digital part (+5 V)
n.c. 2 not connected
handbook, halfpage
GND2 3 ground for digital part (0 V) VP2 1 16 Vi(R−Y)
i.c. 4 internally connected n.c. 2 15 n.c.
SAND 5 sandcastle pulse input
GND2 3 14 Vi(B−Y)
n.c. 6 not connected
i.c. 4 13 n.c.
VCL 7 clamping pulse input TDA4663T
SAND 5 12 Vo(B−Y)
i.c. 8 internally connected
VP1 9 supply voltage for analog part (+5 V) n.c. 6 11 Vo(R−Y)

GND1 10 ground for analog part (0 V) VCL 7 10 GND1

Vo(R−Y) 11 ±(R−Y) output signal i.c. 8 9 VP1

Vo(B−Y) 12 ±(B−Y) output signal MED801

n.c. 13 not connected

Vi(B−Y) 14 ±(B−Y) input signal
n.c. 15 not connected
Fig.2 Pin configuration.
Vi(R−Y) 16 ±(R−Y) input signal

LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134). Ground pins 3 and 10 connected together.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VP1 supply voltage (pin 9) −0.5 +7 V
VP2 supply voltage (pin 1) −0.5 +7 V
V5 voltage on pin 5 −0.5 VP + 1.0 V
Vn voltage on pins 7, 11, 12, 14 and 16 −0.5 VP V
In current on pins 7, 11 and 12 − 20 mA
Tstg storage temperature −25 +150 °C
Tamb operating ambient temperature −20 +70 °C
Ptot total power dissipation − 100 mW
Ves electrostatic handling for all pins note 1 − ±500 V

Note
1. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

Rth j-a thermal resistance from junction to ambient in free air 220 K/W

1996 Nov 22 4
Philips Semiconductors Product specification

Baseband delay line TDA4663T

CHARACTERISTICS
VP = 5.0 V; input signals as specified in characteristics with 75% colour bars;
super-sandcastle frequency of 15.625 kHz; Tamb = 25 °C; measurements taken in Fig.3; unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VP1 analog supply voltage (pin 9) 4.75 5 5.25 V
VP2 digital supply voltage (pin 1) 4.75 5 5.25 V
IP1 supply current − 5.1 5.9 mA
IP2 supply current − 0.8 1.1 mA
Colour-difference input signals
Vi(p-p) input signal (peak-to-peak value)
pin 16 − 1.3 − V
pin 14 − 1.3 − V
Vi(max)(p-p) maximum symmetrical input signal
(peak-to-peak value)
pin 16 before clipping 1.6 − − V
pin 14 before clipping 1.6 − − V
I14, 16 input leakage current 0.06 0.085 0.1 µA
(during picture content)
R14, 16 input resistance during clamping − − 40 kΩ
C14, 16 input capacitance − − 10 pF
V14, 16 input clamping voltage proportional to VP 1.3 1.5 1.7 V
Colour-difference output signals
Vo(p-p) output signal (peak-to-peak value)
pin 11 − 1.3 − V
pin 12 − 1.3 − V
V11/V12 ratio of output amplitudes at equal Vi14, 16 = 665 mV (p-p) −0.4 0 +0.4 dB
input signals
V11, 12 DC output voltage proportional to VP 2.5 2.9 3.3 V
R11, 12 output resistance − 300 400 Ω
Gv Vo −1 0 +1 dB
voltage gain ------
Vi
Vn(rms) noise voltage Vi14, 16 = 0 V; note 1 − − 1.2 mV
(RMS value; pins 11 and 12)
S/N(W) weighted signal-to-noise ratio Vo = 1 V (p-p); note 1 − 54 − dB
(pins 11 and 12)
tj jitter of output signal to external − − 20 ns
sandcastle reference V5
αct(11, 12) crosstalk between channels V14 = 0 V; RS = 300 Ω; 30 − − dB
V11 = 1.35 V (p-p)
αct(12, 11) crosstalk between channels V16 = 0 V; RS = 300 Ω; 30 − − dB
V12 = 1.35 V (p-p)
αct(14, 12) crosstalk direct from input to output V16 = 0 V; RS = 300 Ω; 30 − − dB
signal V14 = 1.35 V (p-p)

1996 Nov 22 5
Philips Semiconductors Product specification

Baseband delay line TDA4663T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

αct(16, 11) crosstalk direct from input to output V14 = 0 V; RS = 300 Ω; 30 − − dB
signal V16 = 1.35 V (p-p)
SVRR supply voltage ripple rejection VR = 100 mV (p-p); 34 − − dB
∆V11, 12/VR fR = 10 Hz to 1 kHz;
V11, 12 = 1.35 V (p-p)
V11, 12(p-p) clamping offset during H-clamp V14 = V16 = 0 V; − − 5 mV
(peak-to-peak value) RS = 300 Ω
V11, 12(p-p) unwanted signals (line-locked) V14 = V16 = 0 V;
(peak-to-peak value) active video;
residual clock (3 MHz) RS = 300 Ω − − 6.25 mV
meander − − 1.5 mV
needles − − 2.5 mV
td line delay time for PAL signals 64 − 0.125 64 − 0.055 64 + 0.015 µs
for NTSC signals 63.555 − 63.555 − 63.555 + µs
0.125 0.055 0.015
Sandcastle pulse input (pin 5)
fBK burst-key frequency/sandcastle 14.2 15.625 17.0 kHz
frequency
V5 top pulse voltage note 2 4.0 − VP + 1.0 V
tBK top pulse duration − 2.5 − µs
Vslice internal slicing level V5 − 1.0 − V5 − 0.5 V
Ii input current − − 10 µA
Ci input capacitance − − 10 pF
tli lock-in time for PLL − − 1 ms
Clamping pulse input (pin 7)
Vclamp clamping pulse ON 3.5 VP − 0.1 VP V
clamping pulse OFF −0.5 +0.1 +1.5 V
Ii input current − − 10 µA
Ci input capacitance − − 10 pF
tclamp clamping pulse duration 0.1 2 3 µs
tr rise time 10 − − ns
tf fall time 10 − − ns
Notes
1. Noise voltage at f = 10 kHz to 1 MHz; RS < 300 Ω.
2. The leading edge of the burst-key pulse or H-blanking pulse is used for timing.

1996 Nov 22 6
Philips Semiconductors Product specification

Baseband delay line TDA4663T

APPLICATION INFORMATION

colour-
handbook, full pagewidth
difference
signals
TDA4663T

Vi(R−Y)
16 11
LINE DELAY Vo(R−Y)
1 nF
Vi(B−Y)
14 12
LINE DELAY Vo(B−Y)
1 nF
4
8
clamping pulse
7
(CMOS)
VCO
2 n.c.
5 6 n.c.
SSC LINE-LOCKED PLL /
(5 V) PULSE PROCESSING 13 n.c.
15 n.c.
+5.1 V +5.1 V
10 9 1 3
(1) (1)

100 100
nF nF
10 Ω

10 Ω 560 Ω
+12 V
22 µF 5.1 V
MED802

(1) Positioned close to pins.

Fig.3 Application circuit.

1996 Nov 22 7
Philips Semiconductors Product specification

Baseband delay line TDA4663T

PACKAGE OUTLINE
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1

D E A
X

y HE v M A

16 9

Q
A2
(A 3) A
A1
pin 1 index
θ
Lp

1 8 L

e w M detail X
bp

0 2.5 5 mm
scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A
UNIT max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ

0.25 1.45 0.49 0.25 10.0 4.0 6.2 1.0 0.7 0.7
mm 1.75 0.25 1.27 1.05 0.25 0.25 0.1 o
0.10 1.25 0.36 0.19 9.8 3.8 5.8 0.4 0.6 0.3 8
0.0098 0.057 0.019 0.0098 0.39 0.16 0.24 0.039 0.028 0.028 0o
inches 0.069 0.01 0.050 0.041 0.01 0.01 0.004
0.0039 0.049 0.014 0.0075 0.38 0.15 0.23 0.016 0.020 0.012

Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC EIAJ PROJECTION

91-08-13
SOT109-1 076E07S MS-012AC
95-01-23

1996 Nov 22 8
Philips Semiconductors Product specification

Baseband delay line TDA4663T

SOLDERING During placement and before soldering, the package must

be fixed with a droplet of adhesive. The adhesive can be
Introduction
applied by screen printing, pin transfer or syringe
There is no soldering method that is ideal for all IC dispensing. The package can be soldered after the
packages. Wave soldering is often preferred when adhesive is cured.
through-hole and surface mounted components are mixed
Maximum permissible solder temperature is 260 °C, and
on one printed-circuit board. However, wave soldering is
maximum duration of package immersion in solder is
not always suitable for surface mounted ICs, or for
10 seconds, if cooled to less than 150 °C within
printed-circuits with high population densities. In these
6 seconds. Typical dwell time is 4 seconds at 250 °C.
situations reflow soldering is often used.
A mildly-activated flux will eliminate the need for removal
This text gives a very brief insight to a complex technology.
of corrosive residues in most applications.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
Repairing soldered joints
Reflow soldering Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
Reflow soldering techniques are suitable for all SO
(less than 24 V) applied to the flat part of the lead. Contact
packages.
time must be limited to 10 seconds at up to 300 °C. When
Reflow soldering requires solder paste (a suspension of using a dedicated tool, all other leads can be soldered in
fine solder particles, flux and binding agent) to be applied one operation within 2 to 5 seconds between
to the printed-circuit board by screen printing, stencilling or 270 and 320 °C.
pressure-syringe dispensing before package placement.
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

Wave soldering
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
• The package footprint must incorporate solder thieves at
the downstream end.

1996 Nov 22 9
Philips Semiconductors Product specification

Baseband delay line TDA4663T

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1996 Nov 22 10
Philips Semiconductors Product specification

Baseband delay line TDA4663T

NOTES

1996 Nov 22 11
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© Philips Electronics N.V. 1996 SCA52

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Printed in The Netherlands 537021/1200/02/pp12 Date of release: 1996 Nov 22 Document order number: 9397 750 01375