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Codigo

The document includes header files for interfacing with a camera module and TFT display. It defines pin connections and interrupt service routines for the camera signals and buttons to control brightness. The main function initializes the camera, display and interrupts. It enters a loop to continuously capture and display frames while the vertical sync interrupt flag is set by the camera interrupt service routine.

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91 views5 pages

Codigo

The document includes header files for interfacing with a camera module and TFT display. It defines pin connections and interrupt service routines for the camera signals and buttons to control brightness. The main function initializes the camera, display and interrupts. It enters a loop to continuously capture and display frames while the vertical sync interrupt flag is set by the camera interrupt service routine.

Uploaded by

pepe pecas
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as TXT, PDF, TXT or read online on Scribd
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#include <Pantalla.

h>
#include <built_in.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>
#include<stdbool.h>
#include<Regs02.h>
#define OV7670_ADDR 0x42 //Direcci?n a partir de donde se encuentran los
registros de configuraci?n

int brillo = 15;


char BandHREF=0; //Bandera para la referencia horizontal
char Vsyncf=0; //Bandera para la referencia vertical
unsigned int Y1,Y2,Y3; //Los datos que se escriben a la pantalla TFT

unsigned width = 240; //240 pixeles de ancho


unsigned height = 320; //320 pixeles de alto
void Cam_Display();
void Init_cam();
void Init_MCU();
void Brillo2();

//Cameras Control Lines


sbit PXLCLOCK at GPIOC_IDR.B0; // C0
sbit HREF at GPIOB_IDR.B2; // B2
sbit VSYN at GPIOB_IDR.B1; // B1
sbit CAMRST at GPIOB_ODR.B12; // B12
sbit PWDN at GPIOB_ODR.B13; // B13
sbit CAM_D0 at GPIOC_IDR.B2;
sbit CAM_D1 at GPIOC_IDR.B3;
sbit CAM_D2 at GPIOC_IDR.B4;
sbit CAM_D3 at GPIOC_IDR.B5;
sbit CAM_D4 at GPIOC_IDR.B6;
sbit CAM_D5 at GPIOC_IDR.B10;
sbit CAM_D6 at GPIOC_IDR.B11;
sbit CAM_D7 at GPIOC_IDR.B12;

// Software I2C connections


sbit Soft_I2C_Scl_Output at GPIOB_ODR.B6;
sbit Soft_I2C_Scl_Input at GPIOB_IDR.B6;
sbit Soft_I2C_Sda_Output at GPIOB_ODR.B7;
sbit Soft_I2C_Sda_Input at GPIOB_IDR.B7;

//----------------External Variables and Functions -----------------------------


extern sbit sfr TFT_CS;
extern sbit sfr TFT_RST;
extern sbit sfr TFT_RD;
extern sbit sfr TFT_RS;
extern sbit sfr TFT_WR;

//------------------------------------------------------------------------------
void main(){
InitPantalla();
Init_cam();
while (1) {
if (Vsyncf == 1)
{
Cam_Display();
}
}
}

void Init_CAM_PIN() {
GPIOAEN_bit = 1;
GPIOBEN_bit = 1;
GPIOCEN_bit = 1;
RCC_AHB1ENR|=1<<GPIOCEN; //HABILITA EL RELOJ DEL PUERTO C
RCC_AHB1ENR|=1<<GPIOBEN; //HABILITA EL RELOJ DEL PUERTO B
RCC_AHB1ENR|=1<<GPIOAEN; //HABILITA EL RELOJ DEL PUERTO A

// Vsync Input and HREF Input


GPIO_Digital_Input(&GPIOB_BASE, _GPIO_PINMASK_1|_GPIO_PINMASK_2);
GPIO_Config(&GPIOB_BASE, _GPIO_PINMASK_1|_GPIO_PINMASK_2, _GPIO_CFG_MODE_INPUT |
_GPIO_CFG_PULL_DOWN|_GPIO_CFG_SPEED_50MHZ);

// Pixel Clock
GPIO_Digital_Input(&GPIOC_BASE, _GPIO_PINMASK_0);
GPIO_Config(&GPIOC_BASE, _GPIO_PINMASK_0, _GPIO_CFG_MODE_INPUT |
_GPIO_CFG_PULL_DOWN|_GPIO_CFG_SPEED_50MHZ);

//Data lines C2-C6, C10-C12


GPIO_Digital_Input(&GPIOC_BASE, _GPIO_PINMASK_2|_GPIO_PINMASK_3|
_GPIO_PINMASK_4|_GPIO_PINMASK_5|
_GPIO_PINMASK_6|_GPIO_PINMASK_10|
_GPIO_PINMASK_11|_GPIO_PINMASK_12);
GPIO_Config(&GPIOC_BASE, _GPIO_PINMASK_2|_GPIO_PINMASK_3|
_GPIO_PINMASK_4|_GPIO_PINMASK_5|
_GPIO_PINMASK_6|_GPIO_PINMASK_10|
_GPIO_PINMASK_11|_GPIO_PINMASK_12, _GPIO_CFG_MODE_INPUT
| _GPIO_CFG_PULL_UP);

GPIO_Clk_Enable(&GPIOC_BASE); //Enable clock for GPIOC


GPIO_Config(&GPIOC_BASE, _GPIO_PINMASK_9, (_GPIO_CFG_MODE_ALT_FUNCTION |
_GPIO_CFG_SPEED_50MHZ | _GPIO_CFG_OTYPE_PP | _GPIO_AF0_MCO)); //Set PC9 as a high
speed digital output

//Reset de la c?mara y PWDN


GPIO_Digital_Output(&GPIOB_BASE, _GPIO_PINMASK_12|_GPIO_PINMASK_13 );

CAMRST=0;
CAMRST=1;
PWDN=1;
PWDN=0;
TFT_CS = 0;
TFT_RST = 1;
}

//------------------------------------------------------------------------------
void Setup_Interrupt(){ // Init Interrupt on PB1 Vsync
SYSCFGEN_bit = 1; // Enable clock for alternate
pin functions
RCC_APB2ENR.SYSCFGEN = 1; // Enable clock for alternate pin functions
SYSCFG_EXTICR1 |= 0x00000110; // Map external interrupt on PB1,PB2
EXTI_RTSR |= 0x00000006; // Set interrupt on Rising edge
(Int2,Int4) 4
EXTI_FTSR |= 0x00000000; // Set Interrupt on Falling
edge(Int2,Int4) 2
EXTI_IMR |= 0x00000006; // Set mask

//INTERUPCIONES
SYSCFG_EXTICR3 |= 0x00000001;
EXTI_RTSR |= 0x00000000; // Set interrupt on Rising edge
(Int2,Int4) 4
EXTI_FTSR |= 0x00000100; // Set Interrupt on Falling
edge(Int2,Int4) 2
EXTI_IMR |= 0x00000100; // Set mask
NVIC_IntEnable(IVT_INT_EXTI9_5);

SYSCFG_EXTICR3 |= 0x00000010;
EXTI_RTSR |= 0x00000000; // Set interrupt on Rising edge
(Int2,Int4) 4
EXTI_FTSR |= 0x00000200; // Set Interrupt on Falling
edge(Int2,Int4) 2
EXTI_IMR |= 0x00000200; // Set mask
NVIC_IntEnable(IVT_INT_EXTI9_5);

NVIC_IntEnable(IVT_INT_EXTI1); // Enable External interrupt 1 VSync


NVIC_IntEnable(IVT_INT_EXTI2); // Enable External interrupt 2 HSync
NVIC_SetIntPriority(IVT_INT_EXTI1, _NVIC_INT_PRIORITY_LVL0);
NVIC_SetIntPriority(IVT_INT_EXTI2, _NVIC_INT_PRIORITY_LVL1);
NVIC_SetIntPriority(IVT_INT_EXTI15_10, _NVIC_INT_PRIORITY_LVL1);
EnableInterrupts();
}

//Configuraci?n de la c?mara
//------------------------------------------------------------------------------
void softframe(){
int i;

Soft_I2C_Init();
Delay_us(25);
Soft_I2C_Start();
Delay_us(25);
Soft_I2C_Write(OV7670_ADDR);
Delay_us(25);
Soft_I2C_Write(0x12);
Delay_us(25);
Soft_I2C_Write(0x80);
Delay_us(25);
Soft_I2C_Write(OV7670_ADDR);
Delay_us(25);
Soft_I2C_Stop();
Delay_us(25);

for (i = 0; i <= OV7670_REG_NUM; i++){


Soft_I2C_Start();
Soft_I2C_Write(OV7670_ADDR);
Delay_us(10);
Soft_I2C_Write(OV7670_Reg[i][0]);
Delay_us(10);
Soft_I2C_Write(OV7670_Reg[i][1]);
Delay_us(10);
Soft_I2C_Stop();
Delay_us(10);
}
}
void Init_Cam(){
Init_CAM_PIN();
softframe();
Setup_Interrupt();
Vsyncf = 1;
}

void Vsync_Int() iv IVT_INT_EXTI1 ics ICS_AUTO {

EXTI_PR.B1 = 1; // clear flag


TFT_CS = 0;
Vsyncf = 1;
}

void Hsync_Int() iv IVT_INT_EXTI2 ics ICS_AUTO {

EXTI_PR.B2 = 1; // clear flag


BandHREF=0;
}

void Cam_Display(){
unsigned int i,j,k;

while(!(VSYN)); //(Sin interrupci?n)


//while((!Vsyncf)); //(con interrupci?n)
Vsyncf = 0;
{
for ( j = 0; j < height; j++)
{
while (!(HREF)); //HREF no reverse (Sin interrupci?n)
//while(BandHREF==1); //(con interrupci?n)
BandHREF = 0;
{
for (i = 0; i < width; i++)
{
while((PXLCLOCK==1));
//if((PXLCLOCK==1));
{
Y2= (GPIOC_IDR & 0x1C00)>>5;
Y3= (GPIOC_IDR & 0x007C)>>2;
Y1= Y2 | Y3;
//Y1= (((GPIOC_IDR & 0x1C00)>>5)|((GPIOC_IDR &
0x007C)>>2)<<0) ; //Calculado seg?n la l?gica
}
//asm nop;
/*asm nop;
asm nop;
asm nop;
asm nop;*/
while((PXLCLOCK==1));
//if((PXLCLOCK==1));
{
Y2= (GPIOC_IDR & 0x1C00)>>5;
Y3= (GPIOC_IDR & 0x007C)>>2;
Y1|= (Y2 | Y3)<<8;
//Y1 |= (((GPIOC_IDR & 0x1C00)>>5)|((GPIOC_IDR &
0x007C)>>2)<<8) ; //Calculado seg?n la l?gica
}
TFT_Write_Data_Ptr(Y1);
//TFT_Set_Pen(CL_white,15);
if(brillo==0x00){
TFT_Set_Pen(CL_white,15);
TFT_Write_Text("Brillo Minimo",160, 120);}
else if(brillo==115){
TFT_Set_Pen(CL_white,15);
TFT_Write_Text("Brillo Maximo", 160, 120);}
//TFT_Image(0, 0, videoc3_bmp, 1);
}
}
BandHREF=1;
}
Vsyncf = 0;
}
TFT_CS = 0;
}

void Brillo2() iv IVT_INT_EXTI9_5 ics ICS_AUTO {


if(EXTI_PR.B8==1){
EXTI_PR.B8 = 1;
if(brillo<115)
brillo=brillo+5;
}
if(EXTI_PR.B9==1){
EXTI_PR.B9 = 1;
if(brillo>0)
brillo=brillo-5;
}
Soft_I2C_Start();
Soft_I2C_Write(OV7670_ADDR);
Delay_us(10);
Soft_I2C_Write(0x55);
Delay_us(10);
Soft_I2C_Write(brillo);
Delay_us(10);
Soft_I2C_Stop();
Delay_us(10);
}

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