INPUT/OUTPUT (IO) PROGRAMMING
LPC1768 pin configuration
512 K Flash memory
64K SRAM
8K ROM
100 pin IC
What is IO programming?
• Through IO programming microcontroller can be used to control other
devices such as sensors, displays, On-chip modules etc.
• It is done through GPIO (General purpose Input Output).
• GPIO is a pin on an IC (Integrated Circuit). It can be either input pin or
output pin, whose behavior can be controlled at the run time. It's a
standard interface used to connect microcontrollers to other electronic
devices.
• In LPC1768, there are 5 ports, P0 to P4 each 32 bit (i.e., 32 pins). Few
port pins are not available. (total pins = 100)
• In GPIO operation we perform general purpose operation to read from the
port and to write to the port.
General Purpose Input Output is what let’s microcontroller be something more than a weak
auxiliary processor. With GPIOs MCU can interact with the physical world, connecting up other
devices and turning microcontroller into something useful.
GPIO in LPC1768
• 5 general purpose bidirectional digital IO ports,
Port 0, Port 1, Port 2, Port 3 and Port 4.
• Fast GPIO-enhanced /Accelerated Features
• Additionally Port 0 and Port 2 pins can provide a
single interrupt
• Application
• General purpose I/O, Driving LEDs or other
indicators, Controlling off-chip devices, Sensing
digital inputs, detecting edges
•Port 0
•Pins 12, 13, 14 & 31 are not available.
•Port 1
•Pins 2, 3, 7, 6, 5, 11, 12, & 13 are not available.
•Port 2
•only pins 0 to 13 are available and rest are
reserved.
•Port 3
•only pins 25,26 are available and rest are reserved.
•Port 4
•only 28,29 are available and rest are reserved.
•In total 70 GPIO pins are available for the user.
Pin connect block
• The naming convention for port pins is ‘Px.y’ where ‘x’ is
the port number and ‘y’ is simply the pin number in port
‘x’. For example : P0.7 refers to Pin number 7 of
Port 0 , P2.11 refers to Pin number 11 in Port 2.
Pin Connect Block Registers
• Pin function select registers
Pin Connect Block Registers
• Pin function select registers
GPIO Registers
• The ports are controlled by 5 registers (byte, halfword and
word accessible)
• These registers are present on Peripheral
AHB bus(Advanced High performance Bus) for fast
read/write timing.
• Hence the naming convention uses a prefix of “FIO” for all
the registers related to GPIO.
Ref:
https://www.youtube.com/watch?v=5ipqQsguqdE -- FIOxDIR
https://www.youtube.com/watch?v=WmZFfokztXg Pin Connect block
Chapter 8 and 9 in the user manual https://www.nxp.com/docs/en/user-guide/UM10360.pdf
GPIO port output Set register FIOxSET (FIO0SET to FIO4SET)
• This register is used to produce a HIGH level output at the port pins
configured as GPIO in an OUTPUT mode.
• Writing 1 produces a HIGH level at the corresponding port pins.
• Writing 0 has no effect.
• If any pin is configured as an input or a secondary function, writing 1 to
the corresponding bit in the FIOxSET has no effect.
• Reading the FIOxSET register returns the value of this register, as
determined by previous writes to FIOxSET and FIOxCLR (or FIOxPIN).
• Access to a port pin via the FIOxSET register is conditioned by the
corresponding bit of the FIOxMASK register
GPIO port output Set register FIOxSET (FIO0SET to FIO4SET)
GPIO port output Set register FIOxSET (FIO0SET to FIO4SET)
GPIO port output Clear register FIOxCLR (FIO0CLR to FIO4CLR)
• This register is used to produce a LOW level output at port pins
configured as GPIO in an OUTPUT mode.
• Writing 1 produces a LOW level at the corresponding port pin and
clears the corresponding bit in the FIOxSET register.
• Writing 0 has no effect. If any pin is configured as an input or a
secondary function, writing to FIOxCLR has no effect.
• Access to a port pin via the FIOxCLR register is conditioned by the
corresponding bit of the FIOxMASK register
GPIO port output Clear register FIOxCLR (FIO0CLR to FIO4CLR)
GPIO port output Clear register FIOxCLR (FIO0CLR to FIO4CLR)
GPIO port Pin value register FIOxPIN (FIO0PIN to FIO4PIN)
Fast GPIO port Mask register FIOxMASK (FIO0MASK to FIO4MASK)
• This register is used to select port pins that will and will not be
affected by write accesses to the FIOxPIN, FIOxSET or FIOxCLR
register. Mask register also filters out port’s content when the
FIOxPIN register is read.
• A zero in this register’s bit enables an access to the corresponding
physical pin via a read or write access. If a bit in this register is one,
corresponding pin will not be changed with write access and if read,
will not be reflected in the updated FIOxPIN register.
