CS211: Computer Organisation
Faculty of Science, Technology and Environment
School of Computing, Information and Mathematical Sciences
Final Examination
Semester 1 2018
F2F / Blended Mode
Duration of Exam: 3 hours + 10 minutes
Reading Time: 10 minutes
Writing Time: 3 hours
Total Marks: 100
Instructions:
There are two sections in this paper
Answer all questions in the answer booklet provided
This exam is worth 50% of your overall mark
The minimum mark to pass the final exam is 20/50
The total number of pages including this cover sheet is 8
This is a closed book exam
Page 1 of 8
Section A: Short Answer and Problem Solving (85 Marks)
1. Explain the importance of the Principle of Equivalence of Hardware and Software. (4 marks)
2. Explain how a transistor made great improvement over vacuum tube. (2 marks)
3. Under the von Neumann architecture, a program and its data are both stored in memory. It is
therefore possible for a program, thinking a memory location holds a piece of data when it
actually holds a program instruction, to accidentally (or on purpose) modify itself. What
implication does this present to you as a programmer? ( 3 marks)
4. Explain why modern computers consist of multiple levels of virtual machines. ( 3 marks)
5. Explain using diagrams the difference between a decoder and multiplexor. (3 marks)
6. A digital computer has a memory unit with 32 bits per word. The instruction set consists of 110
different operations. All instructions have an operation code part (opcode) and two address
fields: one for a memory address and one for a register address. This particular system includes
eight general-purpose, user-addressable registers. Registers may be loaded directly from
memory, and memory may be updated directly from the registers. Direct memory-to-memory
data movement operations are not supported. Each instruction is stored in one word of
memory.
a. How many bits are need for the opcode? (1 mark)
b. How many bits are needed to specify the register? (1 mark)
c. How many bits are left for the memory address part of the instruction? (1 mark)
d. What is the maximum allowable size for memory? (1 mark)
e. What is the largest unsigned binary number that can be accommodated in one word of
memory? (1 mark)
7. Show how the following floating point value 26.625 would be stored using IEEE-754 single
precision. (4 marks)
Page 2 of 8
8. Compute the maximum and minimum values that can be represented using 6 bits for the
following: (3 marks)
a. Ones’s complement
b. Two’s complement
c. Signed magnitude
9. Explain whether pipelining reduces the execution time for individual instructions. (3 marks)
10. A CPU is designed to have the following instructions:
12 three-address instructions
18 two-address instructions
16 one-address instructions
8 zero-address instructions
The machine code length for each instruction is 13 bits. Each address field is 3 bits. By using the
expanding opcode technique, list the machine codes for above instructions. (5 marks)
11. Given the following equation:
Y = (A + (B x C)) / (D – E)
Write a program to solve the equation by using:
a. Three-address instructions
b. Two-address instructions
c. One-address instructions
d. Zero-address instructions
Y,A,B,C,D and E are labels representing the content of memory locations. A,B,C,D and E must
NOT be overwritten. You may use other memory locations (eg. T) as temporary storage. The
instructions available for use are as follows: (8 marks)
Page 3 of 8
12. Given the function: 𝑓(𝑥, 𝑦, 𝑧) = 𝑥𝑦̅𝑧 + 𝑥̅ 𝑦̅𝑧 + 𝑥𝑦𝑧, simplify the expression using Boolean
algebra and identities and draw the logic diagram for the simplified expression. (5 marks)
13. Show the contents of memory at word address 8 if that word holds the number given by 122E
5F01H in both the big-endian and the little-endian schemes. What would be the result in little-
endian machine if we transfer 22EE FF00H byte by byte from big-endian machine? (4 marks)
14. Explain in terms of CPU chip, how CPU fetches an instruction from memory. (4 marks)
15. Explain with examples two parameters that determine the performance of a CPU. (4 marks)
Page 4 of 8
16. Devices in a system communicate through bus. Active devices attached to a bus are known as
masters whereas passive devices are known as slaves. For the task given in the following table,
write devices that that can act as master or slave. (3 marks)
Task Master Slave
Fetching instructions and data
Initiating data transfer
Direct Memory Access
17. A disk drive has 128 cylinders, each cylinder has 16 tracks, each track has 64 sectors, and each
sector contains 512 bytes. The rotation time is 10ms, and it takes a read/write head 3ms to
travel between adjacent cylinders. The data set contains 96KB of data. What maximum seek
time will give the expected access time of 57.58ms? (4 marks)
18. Give the value of the data for the following operands. Assume the following contents of
registers and memory (Mp):
register contents Mp address contents
0 10 0 0
1 30 10 100
2 20 20 200
3 60 30 300
40 400
50 500
60 600
100 700
150 800
200 900
a. For direct addressing, the operand is 60. (1/2 mark)
b. For immediate addressing, the operand is 200. (1/2 mark)
c. For indirect addressing, the operand is 10. (1/2 mark)
d. For indexed addressing, the operand is (REG = 3, CONST = 90). (1/2 mark)
Page 5 of 8
19. A segmented address space uses paged virtual memory. Each virtual address has a 2 bit segment
number, a 2 bit page number and an 8 bit offset within the page. In the following page tables, a
“-” indicates that the page is not in memory, which has 8 page frames.
segment 0 segment 1 segment 2 segment 3
page frame page frame page frame page frame
0 - 0 - 0 - 0 -
1 1 1 5 1 3 1 4
2 - 2 6 2 2 2 -
3 0 3 - 3 - 3 7
a. What is the lowest hexadecimal virtual address in segment 3 that will cause a page fault? (2
marks)
b. Find the real memory address (in hexadecimal) if the virtual hexadecimal address is A12.
(The result is “page fault” if the page is not in real memory.) (2 marks)
c. Find the virtual address (in decimal) if the real memory decimal address is 554.
(2 marks)
20. For the following problem, assume a hypothetical machine with 4 pages of physical memory and
7 pages of virtual memory. Given the access pattern:
1,2,3,4,2,1,5,6,2,1,2,3,7,6,3,2,1,2,3,6
a. How many page faults will be there if FIFO page replacement policy is used? Show all
working. (2 marks)
b. How many page faults will be there if optimal page replacement policy is used? Show all
working. (2 marks)
c. How many page faults will be there if LRU page replacement policy is used? Show all
working. (2 marks)
21. Explain two ways using which the performance of computer can be improved at the micro
architecture level. (4 marks)
Page 6 of 8
Section B: Assembly Language Programming (15 marks)
Write a complete Wombat 3 assembly language main and subprogram. The main program tests the
subprogram: it reads in exactly one integer, checks that the integer is valid input, calls the subprogram
and writes out the result. The subprogram must compute the function: f(n) = 5 × n × f(n − 1)
where f(0) = 4. The program must be properly commented.
The End
Page 7 of 8
Appendix – Wombat Machine Instructions Summary
In the following description, “c(m)” refers to the contents of memory location “m”, and “=>”
indicates data movement (copy).
Mnemonic Opcode Decimal Description
stop 0000 0 Stop execution
load 0001 1 c(m) => acc
store 0010 2 acc => m
read 0011 3 input => acc
write 0100 4 acc => output
add 0101 5 acc + c(m) => acc
sub 0110 6 acc – c(m) => acc
mult 0111 7 acc x c(m) => acc
div 1000 8 acc / c(m) => acc
jmp 1001 9 go to inst at m
jmpz 1010 10 if acc = 0 then go to inst at m
jmpn 1011 11 if acc < 0 then go to inst at m
push 1100 12 acc => stack
pop 1101 13 c(stack) => acc
call 1110 14 go to inst at m
return 1111 15 go to inst at m
Page 8 of 8
