Unit-4 – Assembly Language Program

1. 8085 instruction set.

Sr. Instruction Description Example
DATA TRANSFER INSTRUCTIONS
1. MOV Rd, Rs This instruction copies the contents of the source MOV B, C
MOV M, Rs register into the destination register; the contents of MOV B, M
MOV Rs, M the source register are not altered. If one of the
operands is a memory location, its location is
specified by the contents of the HL registers.
2. MVI Rd, data The 8-bit data is stored in the destination register or MVI B, 57H
MVI M, data memory. If the operand is a memory location, its MVI M, 57H
location is specified by the contents of the HL
registers.
3. LDA 16-bit address The contents of a memory location, specified by a 16- LDA 2034H
bit address in the operand, are copied to the
accumulator. The contents of the source are not
altered.
4. LDAX B/D Reg. pair The contents of the designated register pair point to LDAX B
a memory location. This instruction copies the
contents of that memory location into the
accumulator. The contents of either the register pair
or the memory location are not altered.
5. LXI Reg.-pair, 16-bit data The instruction loads 16-bit data in the register pair LXI H, 2034H
designated in the operand. LXI H, XYZ
6. LHLD 16-bit address The instruction copies the contents of the memory LHLD 2040H
location pointed out by the 16-bit address into
register L and copies the contents of the next memory
location into register H. The contents of source
memory locations are not altered.
7. STA 16-bit address The contents of the accumulator are copied into the STA 4350H
memory location specified by the operand. This is a
3-byte instruction, the second byte specifies the low-
order address and the third byte specifies the high-
order address.
8. STAX Reg. pair The contents of the accumulator are copied into the STAX B
memory location specified by the contents of the
operand (register pair). The contents of the
accumulator are not altered.

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 Unit-4 – Assembly Language Program

Sr. Instruction Description Example

9. SHLD 16-bit address The contents of register L are stored into the memory SHLD 2470H
location specified by the 16-bit address in the
operand and the contents of H register are stored
into the next memory location by incrementing the
operand. The contents of registers HL are not altered.
This is a 3-byte instruction, the second byte specifies
the low-order address and the third byte specifies the
high-order address.
10. XCHG The contents of register H are exchanged with the XCHG
contents of register D, and the contents of register L
are exchanged with the contents of register E.
11. SPHL The instruction loads the contents of the H and L SPHL
registers into the stack pointer register, the contents
of the H register provide the high-order address and
the contents of the L register provide the low-order
address. The contents of the H and L registers are not
altered.
12. XTHL The contents of the L register are exchanged with the XTHL
stack location pointed out by the contents of the
stack pointer register. The contents of the H register
are exchanged with the next stack location (SP+1);
however, the contents of the stack pointer register
are not altered.
13. PUSH Reg. pair The contents of the register pair designated in the PUSH B
operand are copied onto the stack in the following PUSH A
sequence. The stack pointer register is decremented
and the contents of the high order register (B, D, H,
A) are copied into that location. The stack pointer
register is decremented again and the contents of the
low-order register (C, E, L, flags) are copied to that
location.
14. POP Reg. pair The contents of the memory location pointed out by POP H
the stack pointer register are copied to the low-order POP A
register (C, E, L, status flags) of the operand. The stack
pointer is incremented by 1 and the contents of that
memory location are copied to the high-order
register (B, D, H, A) of the operand. The stack pointer
register is again incremented by 1.
15. OUT 8-bit port address The contents of the accumulator are copied into the OUT F8H
I/O port specified by the operand.
16. IN 8-bit port address The contents of the input port designated in the IN 8CH
operand are read and loaded into the accumulator.
ARITHMETIC INSTRUCTIONS

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 Unit-4 – Assembly Language Program

Sr. Instruction Description Example

17. ADD R The contents of the operand (register or memory) are ADD B
ADD M added to the contents of the accumulator and the ADD M
result is stored in the accumulator. If the operand is a
memory location, its location is specified by the
contents of the HL registers. All flags are modified to
reflect the result of the
addition.
18. ADC R The contents of the operand (register or memory) ADC B
ADC M and the Carry flag are added to the contents of the ADC M
accumulator and the result is stored in the
accumulator. If the operand is a memory location, its
location is specified by the contents of the HL
registers. All flags are modified to reflect the result of
the addition.
19. ADI 8-bit data The 8-bit data (operand) is added to the contents of ADI 45H
the accumulator and the result is stored in the
accumulator. All flags are modified to reflect the
result of the addition.
20. ACI 8-bit data The 8-bit data (operand) and the Carry flag are added ACI 45H
to the contents of the accumulator and the result is
stored in the accumulator. All flags are modified to
reflect the result of the addition.
21. DAD Reg. pair The 16-bit contents of the specified register pair are DAD H
added to the contents of the HL register and the sum
is stored in the HL register. The contents of the source
register pair are not altered. If the result is larger than
16 bits, the CY flag is set. No other flags are affected.
22. SUB R The contents of the operand (register or memory) are SUB B
SUB M subtracted from the contents of the accumulator, and SUB M
the result is stored in the accumulator. If the operand
is a memory location, its location is specified by the
contents of the HL registers. All flags are modified to
reflect the result of the subtraction.
23. SBB R The contents of the operand (register or memory) SBB B
SBB M and the Borrow flag are subtracted from the contents SBB M
of the accumulator and the result is placed in the
accumulator. If the operand is a memory location, its
location is specified by the contents of the HL
registers. All flags are modified to reflect the result of
the subtraction.

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 Unit-4 – Assembly Language Program

Sr. Instruction Description Example

24. SUI 8-bit data The 8-bit data (operand) is subtracted from the SUI 45H
contents of the accumulator and the result is stored
in the accumulator. All flags are modified to reflect
the result of the subtraction.
25. SBI 8-bit data The 8-bit data (operand) and the Borrow flag are SBI 45H
subtracted from the contents of the accumulator and
the result is stored in the accumulator. All flags are
modified to reflect the result of the subtraction.
26. INR R The contents of the designated register or memory INR B
INR M are incremented by 1 and the result is stored in the INR M
same place. If the operand is a memory location, its
location is specified by the contents of the HL
registers.
27. INX R The contents of the designated register pair are INX H
incremented by 1 and the result is stored in the same
place.
28. DCR R The contents of the designated register or memory DCR B
DCR M are decremented by 1 and the result is stored in the DCR M
same place. If the operand is a memory location, its
location is specified by the contents of the HL
registers.
29. DCX R The contents of the designated register pair are DCX H
decremented by 1 and the result is stored in the same
place.
30. DAA The contents of the accumulator are changed from a DAA
binary value to two 4-bit binary coded decimal (BCD)
digits. This is the only instruction that uses the
auxiliary flag to perform the binary to BCD
conversion, and the conversion procedure is
described below. S, Z, AC, P, CY flags are altered to
reflect the results of the operation.

If the value of the low-order 4-bits in the accumulator

is greater than 9 or if AC flag is set, the instruction
adds 6 to the low-order four bits.

If the value of the high-order 4-bits in the

accumulator is greater than 9 or if the Carry flag is set,
the instruction adds 6 to the high-order four bits.

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 Unit-4 – Assembly Language Program

Sr. Instruction Description Example

BRANCHING INSTRUCTIONS
31. JMP 16-bit address The program sequence is transferred to the memory JMP 2034H
location specified by the 16-bit address given in the JMP XYZ
operand.

Jump conditionally The program sequence is transferred to the memory location specified
by the 16-bit address given in the operand based on the specified flag
of the PSW as described below.
32. JC 16-bit address Jump on Carry, Flag Status: CY=1 JC 2050H
33. JNC 16-bit address Jump on no Carry, Flag Status: CY=0 JNC 2050H
34. JP 16-bit address Jump on positive, Flag Status: S=0 JP 2050H
35. JM 16-bit address Jump on minus, Flag Status: S=1 JM 2050H
36. JZ 16-bit address Jump on zero, Flag Status: Z=1 JZ 2050H
37. JNZ 16-bit address Jump on no zero, Flag Status: Z=0 JNZ 2050H
38. JPE 16-bit address Jump on parity even, Flag Status: P=1 JPE 2050H
39. JPO 16-bit address Jump on parity odd, Flag Status: P=0 JPO 2050H

40. CALL 16-bit address The program sequence is transferred to the memory CALL 2034H
location specified by the 16-bit address given in the CALL XYZ
operand. Before the transfer, the address of the next
instruction after CALL (the contents of the program
counter) is pushed onto the stack.

Call conditionally The program sequence is transferred to the memory location specified
by the 16-bit address given in the operand based on the specified flag
of the PSW as described below. Before the transfer, the address of the
next instruction after the call (the contents of the program counter) is
pushed onto the stack.
41. CC 16-bit address Call on Carry, Flag Status: CY=1 CC 2050H
42. CNC 16-bit address Call on no Carry, Flag Status: CY=0 CNC 2050H
43. CP 16-bit address Call on positive, Flag Status: S=0 CP 2050H
44. CM 16-bit address Call on minus, Flag Status: S=1 CM 2050H
45. CZ 16-bit address Call on zero, Flag Status: Z=1 CZ 2050H
46. CNZ 16-bit address Call on no zero, Flag Status: Z=0 CNZ 2050H
47. CPE 16-bit address Call on parity even, Flag Status: P=1 CPE 2050H
48. CPO 16-bit address Call on parity odd, Flag Status: P=0 CPO 2050H

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 Unit-4 – Assembly Language Program

Sr. Instruction Description Example

49. RET The program sequence is transferred from the RET
subroutine to the calling program. The two bytes
from the top of the stack are copied into the program
counter, and program execution begins at the new
address.

Return from subroutine The program sequence is transferred from the subroutine to the calling
conditionally program based on the specified flag of the PSW as described below.
The two bytes from the top of the stack are copied into the program
counter, and program execution begins at the new address.
50. RC Return on Carry, Flag Status: CY=1 RC
51. RNC Return on no Carry, Flag Status: CY=0 RNC
52. RP Return on positive, Flag Status: S=0 RP
53. RM Return on minus, Flag Status: S=1 RM
54. RZ Return on zero, Flag Status: Z=1 RZ
55. RNZ Return on no zero, Flag Status: Z=0 RNZ
56. RPE Return on parity even, Flag Status: P=1 RPE
57. RPO Return on parity odd, Flag Status: P=0 RPO

58. PCHL The contents of registers H and L are copied into the PCHL
program counter. The contents of H are placed as the
high-order byte and the contents of L as the low-
order byte.
59. RST 0-7 The RST instruction is equivalent to a 1-byte call RST 3
instruction to one of eight memory locations
depending upon the number. The instructions are
generally used in conjunction with interrupts and
inserted using external hardware. However
these can be used as software instructions in a
program to transfer program execution to one of the
eight locations. The addresses are:
Instruction Restart Address
RST 0 0000H
RST 1 0008H
RST 2 0010H
RST 3 0018H
RST 4 0020H
RST 5 0028H
RST 6 0030H
RST 7 0038H

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 Unit-4 – Assembly Language Program

Sr. Instruction Description Example

The 8085 has four additional interrupts and these interrupts generate RST instructions internally and
thus do not require any external hardware.
60. TRAP It restart from address 0024H TRAP
61. RST 5.5 It restart from address 002CH RST 5.5
62. RST 6.5 It restart from address 0034H RST 6.5
63. RST 7.5 It restart from address 003CH RST 7.5
LOGICAL INSTRUCTIONS
64. CMP R The contents of the operand (register or memory) are CMP B
CMP M compared with the contents of the accumulator. Both CMP M
contents are preserved. The result of the comparison
is shown by setting the flags of the PSW as follows:
if (A) < (reg/mem): carry flag is set
if (A) = (reg/mem): zero flag is set
if (A) > (reg/mem): carry and zero flags are reset
65. CPI 8-bit data The second byte (8-bit data) is compared with the CPI 89H
contents of the accumulator. The values being
compared remain unchanged. The result of the
comparison is shown by setting the flags of the PSW
as follows:
if (A) < data: carry flag is set
if (A) = data: zero flag is set
if (A) > data: carry and zero flags are reset
66. ANA R The contents of the accumulator are logically ANDed ANA B
ANA M with the contents of the operand (register or ANA M
memory), and the result is placed in the accumulator.
If the operand is a memory location, its address is
specified by the contents of HL registers. S, Z, P are
modified to reflect the result of the operation. CY is
reset. AC is set.
67. ANI 8-bit data The contents of the accumulator are logically ANDed ANI 86H
with the 8-bit data (operand) and the result is placed
in the accumulator. S, Z, P are modified to reflect the
result of the operation. CY is reset. AC is set.
68. XRA R The contents of the accumulator are Exclusive ORed XRA B
XRA M with the contents of the operand (register or XRA M
memory), and the result is placed in the accumulator.
If the operand is a memory location, its address is
specified by the contents of HL registers. S, Z, P are
modified to reflect the result of the operation. CY and
AC are reset.

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 Unit-4 – Assembly Language Program

Sr. Instruction Description Example

69. XRI 8-bit data The contents of the accumulator are Exclusive ORed XRI 86H
with the 8-bit data (operand) and the result is placed
in the accumulator. S, Z, P are modified to reflect the
result of the operation. CY and AC are reset.
70. ORA R The contents of the accumulator are logically ORed ORA B
ORA M with the contents of the operand (register or ORA M
memory), and the result is placed in the accumulator.
If the operand is a memory location, its address is
specified by the contents of HL registers. S, Z, P are
modified to reflect the result of the operation. CY and
AC are reset.
71. ORI 8-bit data The contents of the accumulator are logically ORed ORI 86H
with the 8-bit data (operand) and the result is placed
in the accumulator. S, Z, P are modified to reflect the
result of the operation. CY and AC are reset.
72. RLC Each binary bit of the accumulator is rotated left by RLC
one position. Bit D7 is placed in the position of D0 as
well as in the Carry flag. CY is modified according to
bit D7. S, Z, P, AC are not affected.
73. RRC Each binary bit of the accumulator is rotated right by RRC
one position. Bit D0 is placed in the position of D7 as
well as in the Carry flag. CY is modified according to
bit D0. S, Z, P, AC are not affected.
74. RAL Each binary bit of the accumulator is rotated left by RAL
one position through the Carry flag. Bit D7 is placed
in the Carry flag, and the Carry flag is placed in the
least significant position D0. CY is modified according
to bit D7. S, Z, P, AC are not affected.
75. RAR Each binary bit of the accumulator is rotated right by RAR
one position through the Carry flag. Bit D0 is placed
in the Carry flag, and the Carry flag is placed in the
most significant position D7. CY is modified according
to bit D0. S, Z, P, AC are not affected.
76. CMA The contents of the accumulator are complemented. CMA
No flags are affected.
77. CMC The Carry flag is complemented. No other flags are CMC
affected.
78. STC The Carry flag is set to 1. No other flags are affected. STC
CONTROL INSTRUCTIONS
79. NOP No operation is performed. The instruction is fetched NOP
and decoded. However no operation is executed.

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 Unit-4 – Assembly Language Program

Sr. Instruction Description Example

80. HLT The CPU finishes executing the current instruction HLT
and halts any further execution. An interrupt or reset
is necessary to exit from the halt state.
81. DI The interrupt enable flip-flop is reset and all the DI
interrupts except the TRAP are disabled. No flags are
affected.
82. EI The interrupt enable flip-flop is set and all interrupts EI
are enabled. No flags are affected. After a system
reset or the acknowledgement of an interrupt, the
interrupt enable flip-flop is reset, thus disabling the
interrupts. This instruction is necessary to re enable
the interrupts (except TRAP).
83. RIM This is a multipurpose instruction used to read the RIM
status of interrupts 7.5, 6.5, 5.5 and read serial data
input bit. The instruction loads eight bits in the
accumulator with the following interpretations.
D7 D6 D4 D3 D2 D1 D0
SID I7 I6 I5 IE 7.5 6.5 5.5

Serial Input
Data bit Interrupts InteSeri
Interrupt
al
pending if masked
Output
if bit=1

84. SIM This is a multipurpose instruction and used to SIM

implement the 8085 interrupts 7.5, 6.5, 5.5, and serial
data output. The instruction interprets the
accumulator contents as follows.

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 Unit-4 – Assembly Language Program

2. Explain Addressing mode in 8085

1) Immediate Addressing Mode
 In this mode 8/16 bit data is specified in instruction itself as one of its operand.
 Example
MVI B 20H ; 20H is copied into register B.
LXI D 1000H ; 1000H is stored into DE register pair.

2) Direct Addressing Mode

 In this mode 8/16 bit address is directly specified in instruction itself as one of its operand.
 Example
LDA 2000H ; 2000H is memory address.
IN 08H ; 08H is port address.
OUT 10H ; 10H is port address.

3) Register Addressing Mode

 In this mode specifies register or register pair that contains data.
 Example
MOV A B ; A  B.
ADD B ; A=A+B.

4) Indirect Addressing Mode

 In this mode 16 bit memory address is indirectly provided with the instruction using a register pair.
 Example
LDAX D ; A  M[DE].
STAX D ; M[DE]  A.

5) Implicit Addressing Mode

 This mode doesn’t require any operand, data is specified by the Opcode itself.
 Example
CMA

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 Unit-5 – Assembly Language Program

1. Write an ALP to load register B with data 14H, register C with FFH, register D
with 29H and register E with 67H.
MVI B, 14H

MVI C, FFH

MVI D, 29H

MVI E, 67H

HLT

2. Write an ALP to transfer data from register B to C.

MVI B, 55H

MOV C, B

HLT

3. Write an ALP to store data of register B into memory location 2050H.

MVI B, 67H

MOV A, B

STA 2050H ; Store data of Accumulator at memory location 2050H

HLT

4. write an ALP which directly store data 56H into memory location 2050H.
LXI H, 2050H

MVI M, 56H

HLT

5. Write an 8085 assembly language program for exchanging two 8-bit numbers
stored in memory locations 2050h and 2051h.
LDA 2050H

MOV B, A

LDA 2051H

STA 2050H

MOV A, B

STA 2051H

HLT

6. Write an ALP to interchange 16-bit data stored in register BC and DE.

WITHOUT XCHG INSTRUCTION
MOV H, B

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 Unit-5 – Assembly Language Program
MOV L, C

MOV B, D

MOV C, E

MOV D, H

MOV E, L

HLT

WITH XCHG INSTRUCTION

MOV H, B

MOV L, C

XCHG ; The contents of register H are exchanged with the contents of register D, and the

; contents of register L are exchanged with the contents of register E.

MOV B, H

MOV C, L

HLT

7. Write the set of 8085 assembly language instructions to store the contents of B
and C registers on the stack.
MVI B, 50H

MVI C, 60H

PUSH B

PUSH C

HLT

8. Write an ALP to delete (Make 00H) the data byte stored at memory location
from address stores in register DE.
MVI A, 00H

STAX D

HLT

9. Write an 8085 assembly language program to add two 8-bit numbers stored in
memory locations 2050h and 2051h. Store result in location 2052h.
LXI H 2050H

MOV A M

INX H

ADD M

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 Unit-5 – Assembly Language Program
INX H

MOV M A

HLT

10. Subtract 8 bit data stored at memory location 2050H from data stored at
memory location 2051H and store result at 2052H.
LXI H 2050H

MOV A M

INX H

SUB M ; A = A - M

INX H

MOV M A

HLT

11. Write an 8085 assembly language program to add two 16-bit numbers
stored in memory.
LHLD 2050H

XCHG ; The contents of register H are exchanged with the contents of register D, and the

; contents of register L are exchanged with the contents of register E.

LHLD 2052H

MOV A E

ADD L

MOV L A

MOV A D

ADC H

MOV H A

SHLD 2054H ; Store Value of L Register at 2054 and value of H register at 2055.

HLT

12. Write an 8085 assembly language program to find the number of 1’s binary
representation of given 8-bit number.
MVI B 00H

MVI C 08H

MOV A D

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 Unit-5 – Assembly Language Program
BACK: RAR ; Rotate Accumulator Right through carry flag.

JNC SKIP

INR B

SKIP: DCR C ; Increment of B will skip.

JNZ BACK

HLT

13. Implement the Boolean equation D= (B+C) ∙ E, where B, C, D and E

represents data in various registers of 8085.
MOV A B

ORA C

ANA E

MOV D A

HLT

14. Write an 8085 assembly language program to add two decimal numbers
using DAA instruction.
LXI H 2050H

MOV A M

INX H

MOV B M

MVI C 00H

ADD B

DAA ; Decimal adjustment of accumulator.

JNC SKIP

INR C

SKIP: INX H ; Increment of C will skip.

MOV M A

INX H

MOV M C

HLT

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 Unit-5 – Assembly Language Program
15. Write an 8085 assembly language program to find the minimum from two
8-bit numbers.
LDA 2050H

MOV B A

LDA 2051H

CMP B

JNC SMALL

STA 2052H

HLT

SMALL: MOV A B

STA 2052H

HLT

16. Write an 8085 program to copy block of five numbers starting from
location 2001h to locations starting from 3001h.
LXI D 3100H

MVI C 05H

LXI H 2100

LOOP: MOV A M

STAX D

INX D

INX H

DCR C

JNZ LOOP

HLT

17. An array of ten data bytes is stored on memory locations 2100H onwards.
Write an 8085 assembly language program to find the largest number and
store it on memory location 2200H.
LXI H 2100H

MVI C 0AH

MOV A M

DCR C

LOOP: INX H

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 Unit-5 – Assembly Language Program
CMP M ; Compare Data of accumulator with the data of memory location specified by HL pair and

; set flags accordingly.

JNC AHED

MOV A M

AHED: DCR C

JNZ LOOP

STA 2200H

HLT

18. Write an 8085 assembly language program to add block of 8-bit numbers.
LXI H 2000H

LXI B 3000H

LXI D 4000H

BACK: LDAX B

ADD M

STAX D

INX H

INX B

INX D

MOV A L

CPI 0A

JNZ BACK

HLT

19. Write an 8085 assembly language program to count the length of string
ended with 0dh starting from location 2050h (Store length in register B).
LXI H 2050H

MVI B 00H

BACK: MOV A M

INR B

INX H

CPI 0DH

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 Unit-5 – Assembly Language Program
JNZ BACK

DCR B

HLT

20. An array of ten numbers is stored from memory location 2000H onwards.
Write an 8085 assembly language program to separate out and store the EVEN
and ODD numbers on new arrays from 2100H and 2200H, respectively.
LXI H 2000H

LXI D 2100H

LXI B 2200H

MVI A 0AH

COUNTER: STA 3000H

MOV A M

ANI 01H

JNZ CARRY

MOV A M

STAX B

INX B

JMP JUMP

CARRY: MOV A M ; This block will store Odd numbers.

STAX D

INX D

JUMP: LDA 3000H

DCR A

INX H

JNZ COUNTER

HLT

21. An array of ten data bytes is stored on memory locations 2100H onwards.
Write an 8085 assembly language program to find the bytes having
complemented nibbles (e.g. 2DH, 3CH, 78H etc.) and store them on a new array
starting from memory locations 2200H onwards.
LXI H 2100H

LXI D 2200H

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 Unit-5 – Assembly Language Program
MVI C 0AH

LOOP: MOV A M

ANI 0FH

MOV B A

MOV A M

ANI F0H

RRC

RRC

RRC

RRC

CPM B

JNZ NEXT

MOV A M

STAX D

INX D

NEXT: INX H

DCR C

JNZ LOOP

HLT

22. Write an 8085 assembly language program to count the positive numbers,
negative numbers, zeros, and to find the maximum number from an array of
twenty bytes stored on memory locations 2000H onwards. Store these three
counts and the maximum number on memory locations 3001H to 3004H,
respectively.
LXI H 2000

MVI C 14

MVI D 00

MVI B 00

MVI E 00

LOOP: MOV A M

CMP B

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 Unit-5 – Assembly Language Program
JC NEG

JNZ POS

INX H

DCR C

JNZ LOOP

JMP STORE

NEG: INR D ; Count Negative number

INX H

DCR C

JNZ LOOP

JMP STORE

POS: INR E ; Count Positive number

INX H

DCR C

JNZ LOOP

JMP STORE

STORE: MOV A E

STA 3001

MOV A D

STA 3002

LXI H 2000

MVI C 14

MVI D 00

MVI B 00

Prof. Vijay M. Shekhat, CE Department | 2150707 – Microprocessor and Interfacing 9

 Unit-5 – Assembly Language Program
MVI E 00

LOOP1: MOV A M ; Main Program for count Zero And Find Maximum.

CMP B

JZ ZERO

JNC MAX

INX H

DCR C

JNZ LOOP1

JMP STORE1

ZERO: INR D ; For count Zero

INX H

DCR C

JNZ LOOP1

JMP STORE1

MAX: CMP E ; Find Maximum.

JC SKIP

MOV E A

SKIP: INX H

DCR C

JNZ LOOP1

JMP STORE1

STORE1: MOV A D ; Store Number of zeros

STA 3003

MOV A E

STA 3004 ; Store maximum.

Prof. Vijay M. Shekhat, CE Department | 2150707 – Microprocessor and Interfacing 10

 Unit-5 – Assembly Language Program
HLT

23. Write an 8085 assembly language program to separate out the numbers
between 2010 and 4010 from an array of ten numbers stored on memory
locations 2000H onwards. Store the separated numbers on a new array from
3000H onwards.
LXI H 2000

LXI D 3000

MVI C 0A

LOOP: MOV A M

CPI 14

JZ NEXT

JC NEXT

CPI 28

JNC NEXT

STAX D

INX D

NEXT: INX H ; Skip Storing of Number.

DCR C

JNZ LOOP

HLT

24. Write an 8085 assembly language program sort an array of twenty bytes
stored on memory locations 2000H onwards in descending order.
MVI B 14

L2: LXI H 2000

MVI C 13

L1: MOV A M

INX H

CMP M

JC SWAP

bACK: DCR C

JNZ L1

Prof. Vijay M. Shekhat, CE Department | 2150707 – Microprocessor and Interfacing 11

 Unit-5 – Assembly Language Program
DCR B

JNZ L2

HLT

SWAP: MOV D M; This block swap values.

MOV M A

DCX H

MOV M D

INX H

JMP BACK

25. An array of twenty data bytes is stored on memory locations 4100H

onwards. Write an 8085 assembly language program to remove the duplicate
entries from the array and store the compressed array on a new array starting
from memory locations 4200H onwards.
MVI B 14H

MVI C 01H

LXI H 4101H

SHLD 3000H

LDA 4100H

STA 4200H

; This program fetch one by one value from original array and sore it on new array if it is not duplicate.

L1: LHLD 3000H

MOV A M

INX H

DCR B

JZ OVER

SHLD 3000H

LXI H 4200H

MOV D C

L2: CMP M

JZ L1

Prof. Vijay M. Shekhat, CE Department | 2150707 – Microprocessor and Interfacing 12

 Unit-5 – Assembly Language Program
INX H

DCR D

JNZ L2

MOV M A

INR C

JMP L1

OVER: HLT

26. Write an ALP to Pack the two unpacked BCD numbers stored in memory
locations 2200H and 2201H and store result in memory location 2300H.
Assume the least significant digit is stored at 2200H.
LDA 2201

RLC ; Rotate accumulator left 4 times without carry.

RLC

RLC

RLC

ANI F0

MOV C A

LDA 2200

ADD C

STA 2300

HLT

27. Write a set of 8085 assembly language instructions to unpack the upper
nibble of a BCD number.
MVI A 98

MOV B A

ANI F0

RRC ; Rotate accumulator left 4 times without carry.

RRC

RRC

RRC

STA 2000

Prof. Vijay M. Shekhat, CE Department | 2150707 – Microprocessor and Interfacing 13

 Unit-5 – Assembly Language Program
HLT

28. Write Assembly language program to subtract 2 16-bit BCD numbers.

LXI H 3040

LXI D 1020

MOV A L

SUB E

DAA

STA 2000

MOV A H

SBB D

DAA

STA 2001

HLT

29. Write an 8085 assembly language program to continuously read an input

port with address 50H. Also write an ISR to send the same data to output port
with address A0H when 8085 receives an interrupt request on its RST 5.5 pin.
LOOP: IN 50

EI

CALL DELAY

JMP LOOP

HLT

DELAY: NOP

NOP

NOP

NOP

RET

; This code must be write at memory location 002C onwards.

OUT A0

JMP LOOP

Prof. Vijay M. Shekhat, CE Department | 2150707 – Microprocessor and Interfacing 14

 Unit-5 – Assembly Language Program
30. Write an ALP to generate a square wave of 2.5 kHz frequency. Use D0 bit of
output port ACH to output the square wave.
MVI A 01H

REPEAT: OUT AC

MVI C Count

AGAIN: DCR C

JNZ AGAIN

CMA

JMP REPEAT

Calculation:
1
𝑇𝑖𝑚𝑒 𝑝𝑒𝑟𝑖𝑜𝑑 𝑜𝑓 𝑠𝑞𝑢𝑎𝑟𝑒 𝑤𝑎𝑣𝑒 = = 0.4 ∗ 10−3 𝑠.
2.5 ∗ 103
0.4 ∗ 10−3 𝑠
𝑇𝑖𝑚𝑒 𝑝𝑒𝑟𝑖𝑜𝑑 𝑜𝑓 𝑢𝑝𝑝𝑒𝑟 ℎ𝑎𝑙𝑓 𝑎𝑛𝑑 𝑙𝑜𝑤𝑒𝑟 ℎ𝑎𝑙𝑓 𝑜𝑓 𝑠𝑞𝑢𝑎𝑟𝑒 𝑤𝑎𝑣𝑒 = . = 0.2 ∗ 10−3 𝑠.
2
𝑙𝑒𝑡 𝑝𝑟𝑜𝑐𝑒𝑠𝑠𝑜𝑟 𝑡𝑖𝑚𝑒 𝑝𝑒𝑟𝑖𝑜𝑑 = 0.3 ∗ 10−6 𝑠.

0.2 ∗ 10−3
𝐷𝑒𝑙𝑎𝑦 𝑟𝑒𝑞𝑢𝑖𝑟𝑒𝑑 𝑏𝑒𝑤𝑒𝑒𝑛 𝑡𝑟𝑎𝑛𝑠𝑖𝑡𝑖𝑜𝑛 𝑜𝑓 𝑠𝑞𝑢𝑎𝑟𝑒 𝑤𝑎𝑣𝑒 = ≈ 666𝑇𝑠𝑡𝑎𝑡𝑒𝑠
0.3 ∗ 10−6
Now

666 = 7 + (14 ∗ 𝐶𝑜𝑢𝑛𝑡) − 3 + 4

658 = 14 ∗ 𝐶𝑜𝑢𝑛𝑡

𝐶𝑜𝑢𝑛𝑡 = 47

𝐶𝑜𝑢𝑛𝑡 = 2𝐹𝐻

Final Program:

MVI A 01H

REPEAT: OUT AC

MVI C 2F

AGAIN: DCR C

JNZ AGAIN

CMA

JMP REPEAT

Prof. Vijay M. Shekhat, CE Department | 2150707 – Microprocessor and Interfacing 15

 Unit-5 – Assembly Language Program

Prof. Vijay M. Shekhat, CE Department | 2150707 – Microprocessor and Interfacing 16

 Unit-6 – Stack & Subroutines

1. Stack
 Stack is a group of memory location in the R/W memory that is used for temporary storage of binary
information during execution of a program.
 The starting memory location of the stack is defined in program and space is reserved usually at the high
end of memory map.
 The beginning of the stack is defined in the program by using instruction LXI SP, 16-bit memory address.
Which loads a 16-bit memory address in stack pointer register of microprocessor.
 Once stack location is defined storing of data bytes begins at the memory address that is one less then
address in stack pointer register. LXI SP, 2099h the storing of data bytes begins at 2098H and continues
in reversed numerical order.

Fig. Stack

 Data bytes in register pair of microprocessor can be stored on the stack in reverse order by using the
PUSH instruction.
 PUSH B instruction sore data of register pair BC on sack.

Fig. PUSH operation on stack

 Data bytes can be transferred from the stack to respective registers by using instruction POP.

Prof. Vijay M. Shekhat, CE Department | 2150707 – Microprocessor and Interfacing 1