Preliminary Data Sheet No.

PD60030-N

IR2213(S)
HIGH AND LOW SIDE DRIVER
Features Product Summary
• Floating channel designed for bootstrap operation
Fully operational to +1200V VOFFSET 1200V max.
Tolerant to negative transient voltage
dV/dt immune
IO+/- 1.7A / 2A
• Gate drive supply range from 12 to 20V
VOUT 12 - 20V
• Undervoltage lockout for both channels
• 3.3V logic compatible ton/off (typ.) 280 & 225 ns
Separate logic supply range from 3.3V to 20V
Logic and power ground ±5V offset Delay Matching 30 ns
• CMOS Schmitt-triggered inputs with pull-down
• Cycle by cycle edge-triggered shutdown logic
• Matched propagation delay for both channels Packages
• Outputs in phase with inputs
Description
The IR2213(S) is a high voltage, high speed power
MOSFET and IGBT driver with independent high and
low side referenced output channels. Proprietary
HVIC and latch immune CMOS technologies enable 16-Lead SOIC
ruggedized monolithic construction. Logic inputs are 14-Lead PDIP (wide body)
compatible with standard CMOS or LSTTL outputs,
down to 3.3V logic. The output drivers feature a high
pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to
simplify use in high frequency applications. The floating channel can be used to drive an N-channel power
MOSFET or IGBT in the high side configuration which operates up to 1200 volts.
Typical Connection
up to 1200V

HO
V DD V DD VB
HIN HIN VS
TO
SD SD LOAD

LIN LIN V CC
V SS V SS COM
V CC LO

(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical
connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.

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IR2213(S)

Absolute Maximum Ratings

Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.

Symbol Definition Min. Max. Units

VB High Side Floating Supply Voltage -0.3 1225
VS High Side Floating Supply Offset Voltage VB - 25 VB + 0.3
VHO High Side Floating Output Voltage VS - 0.3 VB + 0.3
VCC Low Side Fixed Supply Voltage -0.3 25
VLO Low Side Output Voltage -0.3 VCC + 0.3 V
VDD Logic Supply Voltage -0.3 VSS + 25
VSS Logic Supply Offset Voltage VCC - 25 VCC + 0.3
VIN Logic Input Voltage (HIN, LIN & SD) VSS - 0.3 VDD + 0.3
dVs/dt Allowable Offset Supply Voltage Transient (Figure 2) — 50 V/ns
PD Package Power Dissipation @ TA ≤ +25° C (14 Lead PDIP) — 1.6
W
(16 Lead SOIC) — 1.25
RTHJA Thermal Resistance, Junction to Ambient (14 Lead PDIP) — 75
°C/W
(16 Lead SOIC) — 100
TJ Junction Temperature — 125
TS Storage Temperature -55 150 °C

TL Lead Temperature (Soldering, 10 seconds) — 300

Recommended Operating Conditions

The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential.

Symbol Definition Min. Max. Units

VB High Side Floating Supply Absolute Voltage VS + 12 VS + 20
VS High Side Floating Supply Offset Voltage Note 1 1200
VHO High Side Floating Output Voltage VS VB
VCC Low Side Fixed Supply Voltage 12 20
V
VLO Low Side Output Voltage 0 VCC
VDD Logic Supply Voltage VSS + 3 VSS + 20
VSS Logic Supply Offset Voltage -5 (Note 2) 5
VIN Logic Input Voltage (HIN, LIN & SD) VSS VDD

Note 1: Logic operational for VS of -5 to +1200V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
Note 2: When VDD<5V, the minimum VSS offset is limited to -VDD

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 IR2213(S)

Dynamic Electrical Characteristics

VBIAS (VCC, VBS, VDD) = 15V, CL = 1000 pF, TA = 25°C and VSS = COM unless otherwise specified. The dynamic
electrical characteristics are measured using the test circuit shown in Figure 3.

Symbol Definition Min. Typ. Max. Units Test Conditions

ton Turn-On Propagation Delay — 280 — VS = 0V
toff Turn-Off Propagation Delay — 225 — VS = 1200V
tsd Shutdown Propagation Delay — 230 — VS = 1200V
ns
tr Turn-On Rise Time — 25 —
tf Turn-Off Fall Time — 17 —
MT Delay Matching, HS & LS Turn-On/Off — — 30

Static Electrical Characteristics

VBIAS (VCC, VBS, VDD) = 15V, TA = 25°C and VSS = COM unless otherwise specified. The VIN, VTH and IIN parameters
are referenced to VSS and are applicable to all three logic input leads: HIN, LIN and SD. The VO and IO parameters are
referenced to COM and are applicable to the respective output leads: HO or LO.

Symbol Definition Min. Typ. Max. Units Test Conditions

VIH Logic “1” Input Voltage 9.5 — —
VIL Logic “0” Input Voltage — — 6.0
VOH High Level Output Voltage, VBIAS - VO — — 1.2 V IO = 0A
VOL Low Level Output Voltage, VO — — 0.1 IO = 0A
ILK Offset Supply Leakage Current — — 50 VB = VS = 1200V
IQBS Quiescent VBS Supply Current — 125 230 VIN = 0V or VDD
IQCC Quiescent VCC Supply Current — 180 340 VIN = 0V or VDD
µA
IQDD Quiescent VDD Supply Current — 15 30 VIN = 0V or VDD
IIN+ Logic “1” Input Bias Current — 20 40 VIN = VDD
IIN- Logic “0” Input Bias Current — — 1.0 VIN = 0V
VBSUV+ VBS Supply Undervoltage Positive Going 8.7 10.2 11.7
Threshold
VBSUV- VBS Supply Undervoltage Negative Going 7.9 9.3 10.7
Threshold
V
VCCUV+ VCC Supply Undervoltage Positive Going 8.7 10.2 11.7
Threshold
VCCUV- VCC Supply Undervoltage Negative Going 7.9 9.3 10.7
Threshold
IO+ Output High Short Circuit Pulsed Current 1.7 2.0` — VO = 0V, VIN = VDD
PW ≤ 10 µs
A
IO- Output Low Short Circuit Pulsed Current 2.0 2.5 — VO = 15V, VIN = 0V
PW ≤ 10 µs

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IR2213(S)
Functional Block Diagram

VB
UV
VDD DETECT
R Q
HV
LEVEL PULSE R HO
R Q SHIFT
S FILTER S
VDD /VCC
HIN LEVEL
SHIFT PULSE VS
GEN

SD
VCC
UV
DETECT
VDD /VCC
LIN LEVEL LO
S SHIFT
R Q DELAY

VSS COM

Lead Definitions
Symbol Description
VDD Logic supply
HIN Logic input for high side gate driver output (HO), in phase
SD Logic input for shutdown
LIN Logic input for low side gate driver output (LO), in phase
VSS Logic ground
VB High side floating supply
HO High side gate drive output
VS High side floating supply return
VCC Low side supply
LO Low side gate drive output
COM Low side return

Lead Assignments

14 Lead PDIP 16 Lead SOIC (Wide Body)

IR2213 IR2213S
Part Number

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 IR2213(S)

HV =10 to 1200V

<50 V/ns

Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit

HIN 50% 50%

LIN
(0 to 1200V)
ton tr toff tf

90% 90%

HO
LO 10% 10%

Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition

HIN 50% 50%

LIN
50%
SD
LO HO
tsd

HO 90% 10%
LO
MT MT

90%

LO HO
Figure 5. Shutdown Waveform Definitions Figure 6. Delay Matching Waveform Definitions

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IR2213(S)

100 100

80 80
Turn-On Rise Time (ns)

Turn-On Rise Time (ns)

60 60

Max.
40 40
M ax.
Typ.
Typ.
20 20

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)

Figure 10A. Turn-On Rise Time vs. Temperature Figure 10B. Turn-On Rise Time vs. Voltage

50 50

40 40
Turn-Off Fall Time (ns)

Turn-Off Fall Time (ns)

30 30

Max.

20 20
Typ. Max.

Typ.
10 10

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)

Figure 11A. Turn-Off Fall Time vs. Temperature Figure 11B. Turn-Off Fall Time vs. Voltage

15.0 15
Logic " 1" Input Threshold (V)

12.0 12
Logic "1" Input Threshold (V)

Min.
Max.
9.0 9

6.0 6

3.0
3

0
0.0
-50 -25 0 25 50 75 100 125 0 2 4 6 8 10 12 14 16 18 20
Temperature (°C) VDD Logic Supply Voltage (V)

Figure 12A. Logic “1” Input Threshold vs. Temperature Figure 12B. Logic “1” Input Threshold vs. Voltage

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 IR2213(S)

15.0 15

12.0 12

Logic "0" Input Threshold (V)

Logic "0" Input Threshold (V)

9.0 9
Min.
6.0
Max. 6

3
3.0

0
0.0
-50 -25 0 25 50 75 100 125 0 2 4 6 8 10 12 14 16 18 20
Temperature (°C) VDD Logic Supply Voltage (V)

Figure 13A. Logic “0” Input Threshold vs. Temperature Figure 13B. Logic “0” Input Threshold vs. Voltage

5.00 5.00

4.00 4.00
High Level Output Voltage (V)

High Level Output Voltage (V)

3.00 3.00

2.00 2.00

Max. M ax.

1.00 1.00

0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)

Figure 14A. High Level Output vs. Temperature Figure 14B. High Level Output vs. Voltage

1.00 1.00

0.80 0.80
Low Level Output Voltage (V)

Low Level Output Voltage (V)

0.60 0.60

0.40 0.40

0.20 0.20
Max. M ax.

0.00 0.00
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBIAS Supply Voltage (V)

Figure 15A. Low Level Output vs. Temperature Figure 15B. Low Level Output vs. Voltage

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IR2213(S)

500 500

400 400
Offset Supply Leakage Current (µA)

Offset Supply Leakage Current (µA)

300 300

200 200

100 100
Max.
Max.

0 0
-50 -25 0 25 50 75 100 125 0 200 400 600 800 1000 1200
Temperature (°C) VB Boost Voltage (V)

Figure 16A. Offset Supply Current vs. Temperature Figure 16B. Offset Supply Current vs. Voltage

500 500

400 400
VBS Supply Current (µA)

VBS Supply Current (µA)

300 300

Max.
200 200
Max.
Typ.

100 100 Typ.

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VBS Floating Supply Voltage (V)

Figure 17A. VBS Supply Current vs. Temperature Figure 17B. VBS Supply Current vs. Voltage

625 625

500 500
VCC Supply Current (µA)

VCC Supply Current (µA)

375 375

Max.

250 250
Max.
Typ.

125 125
Typ.

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (°C) VCC Fixed Supply Voltage (V)

Figure 18A. VCC Supply Current vs. Temperature Figure 18B. VCC Supply Current vs. Voltage

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 IR2213(S)

100 60

50
80

VDD Supply Current (µA)

40
VDD Supply Current (µA)

60
30
40 max
20
Max.

20 10
Typ. typ.
0
0
-50 -25 0 25 50 75 100 125
0 2 4 6 8 10 12 14 16 18 20
Temperature (°C) VDD Logic Supply Voltage (V)

Figure 19A. VDD Supply Current vs. Temperature Figure 19B. VDD Supply Current vs. VDD Voltage

100 60
Logic “1” Input Bias Current (µA)

50
80
Logic "1" Input Bias Current (µA)

40
60
30
40
20
Max.
max
20 10
Typ.
typ.
0
0
-50 -25 0 25 50 75 100 125 0 2 4 6 8 10 12 14 16 18 20
Temperature (°C) VDD Logic Supply Voltage (V)

Figure 20A. Logic “1” Input Current vs. Temperature Figure 20B. Logic “1” Input Current vs. VDD Voltage

5.00 5
Logic “0” Input Bias Current (µA)

4.00
4
Logic "0" Input Bias Current (µA)

3
3.00

2
2.00
max
1
Max.
1.00

0
0.00 0 2 4 6 8 10 12 14 16 18 20
-50 -25 0 25 50 75 100 125
VDD Logic Supply Voltage (V)
Temperature (°C)

Figure 21A. Logic “0” Input Current vs. Temperature Figure 21B. Logic “0” Input Current vs. VDD Voltage

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IR2213(S)

0.0 20.0

-3.0 16.0

VSS Logic Supply Offset Voltage (V)

Typ.
VS Offset Supply Voltage (V)

-6.0 12.0

-9.0 8.0 Typ.

-12.0 4.0

-15.0 0.0
10 12 14 16 18 20 10 12 14 16 18 20
VBS Floating Supply Voltage (V) VCC Fixed Supply Voltage (V)

Figure 36. Maximum VS Negative Offset vs. Figure 37. Maximum VSS Positive Offset vs.
VBS Supply Voltage VCC Supply Voltage

Case outlines

01-6010
14-Lead PDIP 01-3002 03 (MS-001AC)

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 IR2213(S)

01 6015
16-Lead SOIC (wide body) 01-3014 03 (MS-013AA)

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 3/25/2003

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