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TEACHING OF 8088/86 PROGRAMMING WITH 8086 ASSEMBLY EMULATOR

Conference Paper · April 2020

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 2019 Joint International Conference on Science, Technology and Innovation, Mandalay by IEEE

TEACHING OF 8088/86 PROGRAMMING WITH 8086

ASSEMBLY EMULATOR
San Hlaing Oo(1), Khin Trar Trar Soe(2), Kyaw Moe Khaing(3)
(1), (3)
Myanmar Aerospace Engineering University, Myanmar
(2)
Technological University (Kyaing Tong), Myanmar
(1)
sanhlaingoo1981@gmail.com,
(2)
khintrartrarsoe@gmail.com

ABSTRACT observation of their performance in learning process,

the monitoring can be conducted with assessment
As for students of Avionics in MAEU (Myanmar
reviews.
Aerospace Engineering University), microprocessor
and interfacing becomes a compulsory course under 1.1 Architecture of 8088/86 Microprocessor
embedded system field of avionics in accordance with 8088/86 are 16-bit microprocessors, which have
course objectives and course learning outcomes. In 1M byte of memory. Before programming concepts
teaching and learning activity, it needs to monitor have to be learnt, internal configurations of 8088/86
knowledge (cognitive domain) levels and skill microprocessor, especially internal registers with their
(psychomotor domain) levels of training on students’ functions, operation capabilities and limitations must
capacity building according to Bloom’s taxonomy. It be known. To provide the programmers in
describes teaching of 8088/86 programming in understanding the operation of microprocessor,
microprocessor and interfacing course with the aid of programming model is developed from a software
8086 assembly emulator in this paper. Assembly point of view [2]. In 8088/86, it contains thirteen 16-bit
programming of integer instructions, computations, internal registers as shown in Fig. 1.
interrupt, control flow and program structures for
8088/86 have been illustrated with typical simple
programs and simulation results. Also assessment
reviews of knowledge and skill levels, overall pass rate
and correlation between course learning outcomes
(CLO) and program outcomes (PO) have been
presented with the achievement of outcome results.
KEYWORDS: assembly emulator, assembly
programming, assessment review, simple programs,
microprocessor
1. INTRODUCTION
As for microprocessor and interfacing, the course
objective is “to develop the applicable programs for
interfacing input/output devices with the target Fig. 1 Programming model of 8088/86
microprocessor” and course learning outcomes are to
describe architectures and features of microprocessors, 1.2 Logical address and physical address
to illustrate programming proficiency with assembly The logical address is user address which can be
language and to demonstrate interfacing with described by segment base and offset address. The
input/output devices. It is able to teach for students physical address is the system address.
until they will meet knowledge levels of remembering,
understanding, applying and analyzing, and move skill
levels of perception, set, guided response, and
mechanism [1]. To get these levels of knowledge and
skill, not only teaching of theoretical knowledge on
programming but also doing lab experiment on
programming proficiency is needed to fulfill the
requirements of students’ learning capacity. For lab
Fig. 2 Generating physical address
experiments, 8086 assembly emulator can be used as
software tool to aid teaching/learning on programing in The physical address of 20-bit in length can be
microprocessor and interfacing. This emulator can give involved by combining 16-bit segment base address
exposure of realized experiments related to theoretical located in one of segment registers and offset address
knowledge of assembly programming. To get located in any pointer or index or base index register.

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 2019 Joint International Conference on Science, Technology and Innovation, Mandalay by IEEE
Generating physical address from logical addresses of
segment base and offset values are shown in Fig. 2.
Internal to the 8088, the offset in IP is combined with
the current value in CS to generate the address of the
instruction codes, which is denoted as CS:IP.
2. MICROPROCESSOR PROGRAMMING (a) (b)
It needs to study instruction sets of 8088/86 for Fig. 6 (a) Operands for arithmetic and logic
assembly programming language with their formats (b) Operands for INC and DEC
and operations before assembly program is built.
2.2.2 Multiplication and division instructions
2.1 Data transfer instruction MUL and DIV need one source operand [3].
Opcodes or mnemonic codes (MOV, ADD, SUB,
AND etc…) are the operation codes to carry out for
microprocessor. Operands are any registers or memory
locations in which the contents are stored. Data
movement and other opcodes are not allowed for
segment to segment (e.g. MOV ES, DS) and mixed Fig. 7 MUL and DIV instruction and allowed operands
size (e.g. MOV BL, DX) registers. In 8088/86, the
common used instruction set for data movement is 2.3 Control flow instructions
MOV for simple and tiny program [2].

Fig. 3 Instruction format

Fig. 8 Conditional and unconditional jump [3]

Fig. 4 MOV instruction and allowed operands Fig. 9 Conditional jump instructions [3]
In Fig. 4, it describes format, operation and Mnemonic Meaning Format Operation
allowed operands for MOV instruction by RET Return RET Return to main program
microprocessor [3]. LOOP Loop LOOP label CX=CX-1. Jump is
initiated to location by
label if CX not equal to 0,
2.2 Arithmetic and logic instructions otherwise execute next
The followings are arithmetic and logic sequential instruction
instructions with allowed operands. Fig. 10 RET and LOOP instruction [3]
2.2.1 Addition, subtraction, logic instructions 2.4 Interrupt instructions
INT 21h / AH=1 - read character from standard input,
with echo, result is stored in AL.
If there is no character in the keyboard buffer, the
function waits until any key is pressed.
INT 21h / AH=2 - write character to standard output.
entry: DL = character to write, after execution AL =
DL.
INT 21h / AH=5 - output character to printer.
entry: DL = character to print, after execution AL = DL.
INT 21h / AH=9 - output of a string at DS: DX. String
must be terminated by '$'.
INT 21h / AH=2Ah - get system date;
return: CX = year (1980-2099). DH = month. DL = day.
Fig. 5 Addition, subtraction and logic instructions AL = day of week (00h=Sunday)

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 2019 Joint International Conference on Science, Technology and Innovation, Mandalay by IEEE
INT 21h / AH=2Ch - get system time; program. The written assembly program in the text
return: CH = hour. CL = minute. DH = second. DL = editor can be emulated by [emulate] button as shown in
1/100 seconds. Fig. 14. In relation to knowledge concept on
2.5 Input/output instructions programming model, logical and physical address,
machine codes, assembly codes and contents of
registers, the appearance of registers, logical address
[CS: IP], physical address: machine codes and
disassembled codes have been observed in Fig. 15.
[0700h:0100h] of CS: IP generates the physical address
of 07100h. After assembling codes, the equivalent
machine codes are also observed in Fig. 15.
Fig. 11 IN and OUT instructions [3]
3. EMULATION WITH ASSEMBLY EMULATOR
After teaching instruction sets of assembly
language in 8088/86 programming, it needs to provide
how to illustrate programming model, how to operate
instruction sets and how to result after executions on
8086 assembly emulator for the students.
3.1 8086 Assembly emulator
Fig. 14 Text editor and emulate button in assembly
Emu8086 integrates an advanced source editor, emulator
assembler, disassembler and software emulator (Virtual
PC) with debugger [4]. In the appearance of 8086
assembly emulator version 4.08 as shown in Fig. 12,
there are four options: new, code examples, quit start
tutor and recent files, and the new option creates the
new program structure for 8086/88 assembly based on
programming instruction codes after taking lecture the
corresponding instruction sets. Learning programming
provides the students how to understand and use the
mnemonic, format and operation of instruction codes in
the program structure. This gives not only the
understanding level but also the applying level of the
cognitive domain for the students. Emulator software
will enforce applying of the instruction codes.

Fig. 15 Appearance window after clicking [emulate]

button
3.2 Sample programs
The tiny and simple executable programs with
pure machine codes have been described the following
sections.
3.2.1 Data movement, arithmetic and logic
Fig. 12 Emu8086 assembly emulator After writing the program in text editor as shown
in Fig. 16, it can be emulated to observe the concepts
on which how to storage the contents of registers and
how to generate the physical address and the machine
codes after clicking the [emulator] button. For the
students, Fig. 17 provides the illustration model on
these concepts in relative to the knowledge concepts in
classroom. This appearance of Fig. 17 also gives the
students the exposure of practical skill and aids the
skill levels of guided response and mechanism of the
psychomotor domain. In building the program
structure, ORG 100h refers to the origination of the
default address in .COM template and RET means
return to the main program. Before execution each
Fig. 13 Option templates in 8086 assembly emulator instruction, the environment of the registers’ storage
can be viewed and the execution process for each
In four templates of Fig. 13, the .COM template
instruction can be conducted by clicking the [single
can be chosen for the simple and tiny executable
step] button in Fig. 17.

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 2019 Joint International Conference on Science, Technology and Innovation, Mandalay by IEEE
execution MOV AX, 09h, the resultant content is 09h
in AX in Fig. 19.

Fig. 16 Program of movement, arithmetic and logic

Fig. 20 After execution MOV BX, 05h and before

execution ADD AX, BX

Fig. 17 Appearance window for written program in

Fig. 16
Fig. 21 After execution ADD AX, BX
After execution MOV BX, 05h, the resultant
content is 05h in BX in Fig. 20. For ADD AX, BX, it
gives the updated resultant content of 0Eh (i.e 09h +
05h = 0Eh) in AX while the old content of AX is
overwritten in Fig. 21.
3.2.2 Interrupts subroutine

Fig. 18 Before execution MOV AX, 09h

Fig. 23 (a) Reading character and waiting for input

Fig. 19 After execution MOV AX, 09h and before

execution MOV BX, 05h
From Fig. 18 to 21, the increment of IP can be
noticed while executing step by step instruction on
emulator window. According to the concepts of IP
register, its increment value points out the next
sequential instruction to execute. Increment IP value is
offset with relative to CS which will change the
Fig. 23 (b) ASCII code for reading character ‘b’ in AL
physical address of the corresponding instruction.
Increment IP value and physical address as in Fig. 20 The following interrupt functions illustrate how to
through Fig. 21 reflects on this concept. After wait for input character on video mode from the

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 2019 Joint International Conference on Science, Technology and Innovation, Mandalay by IEEE
standard input unit (keyboard) and the resultant In Fig. 27, Year = 07E3h (2019), Month = 06h
character is stored in AL. For example, the status on (June), Day = 13h (19), and 03h = Wednesday are the
waiting for input character from keyboard is shown in information of getting system by this interrupt
Fig. 23 (a) and the ASCII code of the read character ‘b’ function: int 21h/AH = 2Ah.
is 62h in AL as shown in Fig. 23. (b)
mov ah, 1h
int 21h
The following interrupt subroutine demonstrates
how to write character to the standard output unit
(monitor) as shown in Fig. 24.
mov dl, ‘k’
mov ah, 2
int 21h Fig. 27 System date
The following interrupt subroutine generates
system time with return: CH = hour, CL = minute, DH
= second and DL = 1/100 seconds.
mov ah, 2Ch
int 21h
In Fig. 28, CH = 14h (20):CL = 3Bh (59): DH =
22h (34) gives system time format of hour: minute:
second with 8:59:43 p.m. by this interrupt function: int
Fig. 24 Writing character ‘k’ on monitor 21h/AH = 2Ch.
The following interrupt subroutine shows how to
write character to the printer as shown in Fig. 25.
mov dl, ‘k’
mov ah, 5
int 21h

Fig. 28 System time

The following codes shows interfacing with the
output device to display information. Emulator
software supports user-created virtual devices that can
be accessed from assembly language program using in
and out instructions.
#start = led_display.exe#
Fig. 25 Writing character ‘k’ on virtual printer at
mov ax, 100
output port of 130dh
k1: out 199, ax
The following interrupt subroutine illustrates how dec ax
to display a string terminated by $ to the standard jnz k1
output as shown in Fig. 26. #start = led_display.exe# is used to access virtual
display db “Avionics $” device. AX is initialized with the value of 100. 199 is
mov dx, offset display output port address of LED display which writes the
mov ah, 9 content of AX. JNZ refers to Jump not zero. While
int 21h decrement has been executing, the decrement value is
displayed on LED display until the value is zero from
100. k1 is label of display and JNZ executes as loop
function and ends with zero. Fig. 29 (a) and (b) show
the execution of this concept.

Fig. 26 Output of a string

The following interrupt subroutine generates
system date with return: CX = year (1980-2099). DH =
month. DL = day. AL = day of week (00h=Sunday).
mov ah, 2Ah
int 21h Fig. 29 (a) Interfacing with LED display

735
 2019 Joint International Conference on Science, Technology and Innovation, Mandalay by IEEE
psychomotor levels. Assessment review has been
conducted for the number of 39 students which are in
line the class size and teaching/learning environment.
According to outcome results, assignment,
presentation, test and quiz give S3 and S4 level of
guided response and mechanism in psychomotor
domain which become satisfied for the students of this
course.
On knowledge (thinking) level of the students,
Fig. 29 (b) Interfacing with LED display showing they are taken the assessment activity of written
decrement value examination. Fig. 31 shows the different types of
questions which reflects on the corresponding
Emulator can access virtual I/O ports (0 to 65535). knowledge levels. According to outcome results, it
These ports are emulated in this file: c:\emu8086.io. In gives K2, K3 and S4 level of understanding, applying
emulator, there are also animated virtual devices such and analyzing in cognitive domain. Although the
as robot, stepper motor, traffic light, thermometer, etc... overall average rating is 60 % in outcome result, K4
levels result in 31 %, 36 % and 46 % which are under
4. ASSESSMENT REVIEWS
satisfaction.
It needs to review this question level and
implement more activities which support the analyzing
level. It needs to plan more teaching and learning
activities in assignments, presentation, discussion, quiz
and lab experiments which is related to analyzing
problems. It need to train design and analysis skill on
the designing and analyzing based problems of
programming for the students.

Fig. 30 Outcome result in skill level

After teaching/learning process to the course of
microprocessor and interfacing with the specific
knowledge and skill levels, it need to observe the
students’ capacity by means of the relevant review
which support the performance of students in
Fig. 32 Outcome result in total pass rate
accordance with the assessment criteria.
In Fig. 32 shows total pass rate of 92 % for applied
students of 39 based on the total assessments of
examination, test/quiz (T), practical lab (P) and
classroom performance (CP) of presentation,
assignment, project work, attendance, discussion,
participation, collaboration, discipline and extra
curriculum activities.

Fig. 31 Outcome result in knowledge level

On skill (doing) level of the students, they are Fig. 33 Correlation between question levels and course
taken the assessment activities of practical lab, outcomes
software simulation, assignment, quiz and tutorial test. The achievement with 74 %, 72 % and 74 % of
Fig. 30 highlight on the assessment review of this course outcomes: (a), (b) and (c) after mapping to

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 2019 Joint International Conference on Science, Technology and Innovation, Mandalay by IEEE
question levels are shown in Fig. 33. According to the of microprocessor and interfacing, it is quite evident
achievement of program outcomes in Fig. 34, PO1, from the results of assessment reviews that the
PO2, PO3 and PO8 are satisfied outcomes for course performance of students has been satisfied with the
learning outcomes. There are 49 % achievements of outcomes achievement. Also it is clearly observed that
PO4, PO7 and PO9 with the requirements of course this course has been to be met with the requirements of
learning outcomes. It should make action plans to PO (program outcomes). This course can be verified
motivate exam performance and motivate in more that is constructive in line with PO1, PO2, PO3 and
participation of class activities for focusing on those PO8 according to assessment reviews. The overall pass
students who need still enough knowledge and skill rate after total assessments is above 92 % of 39
level. The action plans of more individual discussion students under Department of Avionics, MAEU.
rather than group discussion, more oral test, and more However, performance of students on each analyzing
video lecturing for those students should be problems are not able to get satisfied achievement and
implemented to get satisfied achievement outcomes. they need to be trained more class activities on design
analysis skill.
ACKNOWLEDGEMENT
I would like to express my thanks to Dr. Kyi
Thwin, Rector of MAEU, Dr. Kyaw Moe Khaing, Pro-
rector of MAEU and Dr. Martoonyi Bu, teaching
trainer, for their suggestions to my assessment reviews.
Also, I would like to express my special thanks to my
lovely wife, Dr. Khin Trar Trar Soe, for her
encouragement. And then, I also would like to thank to
my parents for their noble support and encouragement.
REFERENCES
[1] Lorin Anderson, Krathwohl, Airasian, Cruikshank,
Mayer, Pintrich, Raths, Wittrock, “Bloom’s
Revised Taxonomy: Cognitive, Affective, and
Psychomotor”, 2000.
[2] Barry B. Brey, “The Microprocessor and Its
Architecture,” in The Intel Microprocessor,
Architecture, Programming, and Interfacing, 8th
ed., Pearson Prentice Hall, USA, pp. 52, 2009.
Fig. 34 Correlation between program outcomes and [3] Walter A. Triebel and Avtar Singh, “8088/86
course outcomes Programming I and II” in The 8088 and 8086
Microprocessors, Programming, Interfacing,
Software, Hardware, and Applications, 4th ed.,
Pearson Prentice Hall, USA, pp. 160–283, 2003.
[4] emu8086, Help for emu8086 manual, Available:
http://people.vts.su.ac.rs/~pmiki/STOREnGO/
Fig. 35 Program outcome achievement ASMzbirka/
Fig. 35 point outs program outcomes of [5] 8088/86 microprocessor programming I & II,
achievement which are mapping to the performance of C15_LECTURE_NOTE_05 and 06, Available:
students for the course of microprocessor and http://nova.bime.ntu.edu.tw/~ttlin/Course15/
interfacing. This achievement of Fig. 35 is based on the lecture_notes
matrix of course outcomes and program outcomes in [6] Bloom's Taxonomy: The Psychomotor Domain
Fig. 34. Available:http://www.nwlink.com/~donclark/hrd/
Bloom/psychomotor_domain.html
5. CONCLUSION [7] Dr. M. Enamul Hoque, “Three Domains of
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academic environment. It is also the key factor to Journal of EFL Education and Research, vol. 2,
enforcement of outcome based education to achieve the No 2, pp. 45–51, September, 2016.
expected course learning outcomes to program [8] Gowrishankar Kasilingam, Mritha ramalingam,
outcomes. After framework of program outcomes, it and Elanchezian Chinnavan, “Assessment of
should be work out the planning of the course learning learning domains to improve student’s learning in
outcomes (student learning outcomes) of the higher education,” Journal of Young Pharmacists,
corresponding courses. Base on course learning vol. 6, Issue 4, pp. 29–30, Jan–Mar, 2014.
outcomes, it should be planned the course modules. [9] Ir. Professor Academician Dato’ Dr. HT Chuah,
There should be teaching plan and lesson plan with President of FEIAP “Outcome Based Engineering
respect to time frame to meet the requirement of the Education”
student learning outcomes. In this paper, for the course [10] “Teacher training activity”, Dr. Martoonyi Bu

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