Data Sheet No. PD60208 Rev.
IR2175(S) & (PbF)
LINEAR CURRENT SENSING IC
Features Product Summary
• Floating channel up to +600V
• Monolithic integration VOFFSET 600Vmax
• Linear current feedback through shunt resistor
• Direct digital PWM output for easy interface IQBS 2mA
• Low IQBS allows the boot strap power supply Vin +/-260mVmax
• Independent fast overcurrent trip signal
• High common mode noise immunity Gain [Link] 20ppm/oC (typ.)
• Input overvoltage protection for IGBT short circuit
condition fo 130kHz (typ.)
• Open Drain outputs
• Also available LEAD-FREE Overcurrent trip 2µsec (typ)
signal delay
Description Overcurrent trip level +/-260mV (typ.)
The IR2175 is a monolithic current sensing IC designed
for motor drive applications. It senses the motor phase Packages
current through an external shunt resistor, converts from
analog to digital signal, and transfers the signal to the
low side. IR’s proprietary high voltage isolation tech-
nology is implemented to enable the high bandwidth
signal processing. The output format is discrete PWM
to eliminate need for the A/D input interface for the
IR2175. The dedicated overcurrent trip (OC) signal fa-
cilitates IGBT short circuit protection. The open-drain
outputs make easy for any interface from 3.3V to 15V. S
8 Lead PDIP 8 Lead SOIC
IR2175 IR2175S
Block Diagram
Up to 600V
15V VCC V+
PWM Output PO VS
IR2175
GND COM VB
Overcurrent OC To Motor Phase
(Refer to Lead Assignments for cor-
rect pin configuration). This/These
diagram(s) show electrical connec-
tions only. Please refer to our Appli-
cation Notes and DesignTips for
proper circuit board layout.
IR2175(S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal
resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol Definition Min. Max. Units
VS High side offset voltage -0.3 600
VBS High side floating supply voltage -0.3 25
VCC Low side and logic fixed supply voltage -0.3 25
VIN Maximum input voltage between VIN+ and VS -5 5 V
VPO Digital PWM output voltage COM -0.3 VCC +0.3
VOC Overcurrent output voltage COM -0.3 VCC +0.3
dV/dt Allowable offset voltage slew rate — 50 V/ns
PD Package power dissipation @ TA ≤ +25°C 8 lead SOIC — .625
W
8 lead PDIP — 1.0
RthJA Thermal resistance, junction to ambient 8 lead SOIC — 200
°C/W
8 lead PDIP — 125
TJ Junction temperature — 150
TS Storage temperature -55 150 °C
TL Lead temperature (soldering, 10 seconds) — 300
Note 1: Capacitors are required between VB and Vs when bootstrap power is used. The external power supply,
when used, is required between VB and Vs pins.
Recommended Operating Conditions
The output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended
conditions.
Symbol Definition Min. Max. Units
VB High side floating supply voltage VS +13.0 VS +20
VS High side floating supply offset voltage 0.3 600
VPO Digital PWM output voltage COM VCC V
VOC Overcurrent output voltage COM VCC
VCC Low side and logic fixed supply voltage 9.5 20
VIN Input voltage between VIN+ and VS -260 +260 mV
TA Ambient temperature -40 125 °C
2 [Link]
IR2175(S) & (PbF)
DC Electrical Characteristics
VCC = VBS = 15V, and TA = 25o unless otherwise specified.
Symbol Definition Min. Typ. Max. Units Test Conditions
VIN Nominal input voltage range before saturation -260 — 260
VIN+ _ VS
VOC+ Overcurrent trip positive input voltage — 260 — mV
VOC- Overcurrent trip negative input voltage — -260 —
VOS Input offset voltage -10 0 10 VIN = 0V (Note 1)
∆V OS/ ∆T A Input offset voltage temperature drift — 25 — µV/ C
o
G Gain (duty cycle % per VIN) 155 160 165 %/V max gain error=5%
(Note 2)
∆G/ ∆T A Gain temperature drift — 20 — ppm/ Co
ILK Offset supply leakage current — — 50 µA VB = VS = 600V
IQBS Quiescent VBS supply current — 2 — VS = 0V
mA
IQCC Quiescent VCC supply current — — 0.5
LIN Linearity (duty cycle deviation from ideal linearity — 0.5 1 %
curve)
∆VLIN/∆TA Linearity temperature drift — .005 — %/oC
IOPO Digital PWM output sink current 20 — — VO = 1V
2 — — VO = 0.1V
mA
IOCC OC output sink current 10 — — VO = 1V
1 — — VO = 0.1V
Note 1: ±10mV offset represents ±1.5% duty cycle fluctuation
Note 2: Gain = (full range of duty cycle in %) / (full input voltage range).
AC Electrical Characteristics
VCC = VBS = 15V, and TA = 25o unless otherwise specified.
Symbol Definition Min. Typ. Max. Units Test Conditions
Propagation delay characteristics
fo Carrier frequency output 100 130 180 kHz figure 1
∆ f/ ∆T A Temperature drift of carrier frequency — 500 — ppm/oC VIN = 0 & 5V
Dmin Minimum duty — 9 — % VIN+=-260mV,
Dmax Maximum duty — 91 — % VIN+=+260mV
BW fo bandwidth — 15 — kHz VIN+ = 100mVpk -pk
sine wave, gain=-3dB
PHS Phase shift at 1kHz — -10 — o
VIN+ =100mVpk-pk
sine wave
tdoc Propagation delay time of OC 1 2 —
µsec
twoc Low true pulse width of OC — 1.5 —
[Link] 3
IR2175(S) & (PbF)
Timing Waveforms Duty=9%
PO Vin+= -260mV
Vs = 0V
Duty=91%
PO Vin+= +260mV
Vs = 0V
Carrier Frequency =
130kHz
Figure 1 Output waveform
Application Hint:
Temperature drift of the output carrier frequency can be cancelled by measuring both a PWM period and the on-time
of PWM (Duty) at the same time. Since both periods vary in the same direction, computing the ratio between these
values at each PWM period gives consistent measurement of the current feedback over the temperature drift.
4 [Link]
IR2175(S) & (PbF)
Lead Definitions
Symbol Description
VCC Low side and logic supply voltage
COM Low side logic ground
VIN+ Positive sense input
VB High side supply
VS High side return
PO Digital PWM output
OC Overcurrent output (negative logic)
N.C. No connection
Lead Assignment
1
VC VIN 8 1
VC VIN 8
C + C +
2 PO Vs 7 2 PO Vs 7
V V
3 COM 6 3 COM 6
B B
4 OC NC 5 4 OC NC 5
8 lead SOIC 8 lead PDIP
Also available LEAD-FREE (PbF) Also available LEAD-FREE (PbF)
IR2175S IR2175
[Link] 5
IR2175(S) & (PbF)
Case Outlines
01-6014
8 Lead PDIP 01-3003 01 (MS-001AB)
INCHES MILLIMETERS
D B DIM
MIN MAX MIN MAX
A 5 FOOTPRINT A .0532 .0688 1.35 1.75
A1 .0040 .0098 0.10 0.25
8X 0.72 [.028]
b .013 .020 0.33 0.51
8 7 6 5 c .0075 .0098 0.19 0.25
6 H D .189 .1968 4.80 5.00
E E .1497 .1574 3.80 4.00
0.25 [.010] A
1 2 3 4 6.46 [.255] e .050 BASIC 1.27 BASIC
e1 .025 BASIC 0.635 BASIC
H .2284 .2440 5.80 6.20
K .0099 .0196 0.25 0.50
L .016 .050 0.40 1.27
6X e 3X 1.27 [.050] 8X 1.78 [.070] y 0° 8° 0° 8°
e1 K x 45°
A
C y
0.10 [.004]
A1 8X L 8X c
8X b
7
0.25 [.010] C A B
NOTES: 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
2. CONTROLLING DIMENSION: MILLIMETER 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
4. OUTLINE C ONFORMS TO JEDEC OUTLINE MS-012AA.
A SUBSTRATE.
01-6027
8 Lead SOIC 01-0021 11 (MS-012AA)
6 [Link]
IR2175(S) & (PbF)
LEADFREE PART MARKING INFORMATION
Part number IRxxxxxx
Date code YWW? IR logo
Pin 1 ?XXXX
Identifier
Lot Code
? MARKING CODE (Prod mode - 4 digit SPN code)
P Lead Free Released
Non-Lead Free
Released
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
Basic Part (Non-Lead Free) Leadfree Part
8-Lead PDIP IR2175 order IR2175 8-Lead PDIP IR2175 order IR2175PbF
8-Lead SOIC IR2175S order IR2175S 8-Lead SOIC IR2175S order IR2175SPbF
Thisproduct has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web Site [Link]
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
9/6/2004
[Link] 7
