Stack Segment

and
Flag Register
 What is a stack, and why is it needed?
 The stack is a section of read/write memory (RAM) used by the CPU to
store information temporarily.
 The CPU needs this storage area since there are only a limited number of
registers.
 The main disadvantage of the stack is its access time.
 The two main registers used to access the stack are the SS (stack
segment) register and the SP (stack pointer) register.
 These registers must be loaded before any instructions accessing the
stack are used.
 Every register inside the 80x86 (except segment registers and SP) can be
stored in the stack and brought back into the CPU from the stack memory.
 The storing of a CPU register in the stack is called PUSH, and loading the
contents of the stack into the CPU register is called POP.
 In the 80x86, the stack pointer register (SP) points at the current memory
location used for the top of the stack and as data is pushed onto the stack
it is decremented.
 SP is incremented as data is popped off the stack into the CPU.

2 SVU ACADEET Dr. M. Ibrahim Assembly Language

 Example
 Assuming that SP = 1236, AX = 24B6, DI = 85C2, and DX = 5F93,
show the contents of the stack as each of the following instructions is
executed:
PUSH AX
PUSH DI
PUSH DX BX = 5F93
POP BX
POP AX AX = 85C2
POP CX CX = 24B6

SS:1230 93
SS:1231 5F
SS:1232 C2 C2 C2
SS:1233 85 85 85
SS:1234 B6 B6 B6 B6 B6
SS:1235 24 24 24 24 24
SS:1236
PUSH AX PUSH DI PUSH DX POP BX POP AX POP CX
3 SVU ACADEET Dr. M. Ibrahim Assembly Language
 Example
 Assuming that SP = 1236, AX = 24B6, DI = 85C2, and DX = 5F93,
show the contents of the stack as each of the following instructions is
executed:
PUSH AX
PUSH DI
POP BX AX = 5F93
PUSH DX
POP AX BX = 85C2
POP CX CX = 24B6

SS:1230
SS:1231
SS:1232 C2 93
SS:1233 85 5F
SS:1234 B6 B6 B6 B6 B6
SS:1235 24 24 24 24 24
SS:1236
PUSH AX PUSH DI POP BX PUSH DX POP AX POP CX
4 SVU ACADEET Dr. M. Ibrahim Assembly Language
 Flag register (status register)
 The flag register is a 16-bit register.
 Only 9 of the bits are used and the rest are either undefined or reserved by
Intel.
 6 of the flags are called conditional flags: CF, PF, AF, ZF, SF, and OF
 They indicate some condition that resulted after an instruction was
executed
 3 flags are sometimes called control flags: DF, IF, and TF
 They are used to control the operation of instructions before they are
executed.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

R R R R OF DF IF TF SF ZF U AF U PF U CF
R = reserved U = undefined
CF = carry flag PF = parity flag AF = auxiliary carry flag
ZF = zero flag SF = sign flag OF = overflow flag
DF = direction flag IF = interrupt flag TF = trap flag

5 SVU ACADEET Dr. M. Ibrahim Assembly Language

 Bits of the flag register
 CF: Carry Flag
 This flag is set whenever there is a carry out, either from r7 after an 8-
bit operation, or from r15 after a 16-bit data operation.

a7 a6 a5 a4 a3 a2 a1 a0
OP
b7 b6 b5 b4 b3 b2 b1 b0
C r7 r6 r5 r4 r3 r2 r1 r0

 PF: Parity Flag

 After certain operations, the parity of the result's low-order byte is
checked
Low byte has an even number of 1s  PF=1; otherwise, PF=0
 AF: Auxiliary Carry Flag
 If there is a carry from d3 to d4 of an operation, this bit is set (AF=1;);
otherwise, AF=0.
 ZF: Zero Flag
 ZF=1, if the result of an arithmetic or logical operation is zero;
otherwise, ZF=0.

6 SVU ACADEET Dr. M. Ibrahim Assembly Language

 Bits of the flag register (Cont.)
 SF: Sign Flag
Signed numbers uses the most significant bit as the sign bit. After
arithmetic or logic operations, the status of this sign bit is copied into
the SF, thereby indicating the sign of the result.
 OF: Overflow Flag
 This flag is set whenever the result of a signed number operation is
too large, causing the high-order bit to overflow into the sign bit.
 In general, the carry flag is used to detect errors in unsigned
arithmetic operations.
 The overflow flag is only used to detect errors in signed arithmetic
operations.

7 SVU ACADEET Dr. M. Ibrahim Assembly Language

 Bits of the flag register (Cont.)
 Once a flag is set, it remains in that state until
another instruction that affects the flags is executed
 Not all instructions affect all status flags
 add and sub affect all six flags
 inc and dec affect all but the carry flag
 mov, push, and pop do not affect any flags

8 SVU ACADEET Dr. M. Ibrahim Assembly Language

 NOT, NEG
 Two types of operands are supported: REG,Memory
 REG: AX, BX, CX, DX, AH, AL, BL, BH, CH, CL, DH,
DL, DI, SI, BP, SP.
 Memory: [BX], [BX+SI+7], variable, etc...
 NOT instruction does not affect any flags!
 NEG instruction affects these flags only: CF, ZF, SF,
OF, PF, AF.
 NOT - Reverse each bit of operand.
 NEG - Make operand negative (two's complement).
Actually it reverses each bit of operand and then adds
1 to it. For example 5 will become -5, and -2 will
become 2.
9 SVU ACADEET Dr. M. Ibrahim Assembly Language
 Flag register and ADD instruction
 The flag bits affected by the ADD instruction are
 CF (carry flag),
 PF (parity flag),
 AF (auxiliary carry flag),
 ZF (zero flag),
 SF (sign flag), and
 OF (overflow flag): it relates only to signed number arithmetic

 The flag bits affected by the INC/DEC instructions are

 PF (parity flag),
 AF (auxiliary carry flag),
 ZF (zero flag),
 SF (sign flag), and
 OF (overflow flag)

10 SVU ACADEET Dr. M. Ibrahim Assembly Language

 Example
Show how the flag register is affected by the addition of 38H and 2FH
MOV BH,38H ; BH= 38H
ADD BH,2FH ; add 2F to BH, now BH = 67H

 Solution:
38 0011 1000
2F 0010 1111
67 0110 0111

 CF = 0 since there is no carry beyond d7

 PF = 0 since there is an odd number of Is in the result
 AF = 1 since there is a carry from d3 to d4
 ZF = 0 since the result is not zero
 SF = 0 since d7 of the result is zero
11 SVU ACADEET Dr. M. Ibrahim Assembly Language
 Example
Show how the flag register is affected by
MOV AL,9CH ; AL = 9CH
MOV DH,64H ; DH = 64H
ADD AL,DH ; now AL=0
 Solution:
9C 1001 1100
64 0110 0100
00 0000 0000

CF= 1 since there is a carry beyond d7

PF= 1 since there is an even number of 1s in the result
AF= 1 since there is a carry from d3 to d4
ZF= 1 since the result is zero
SF= 0 since d7 of the result is zero

12 SVU ACADEET Dr. M. Ibrahim Assembly Language

 Use of the zero flag for looping
 One of the most widely used applications of the flag register is the use of
the zero flag to implement program loops.
 The term loop refers to a set of instructions that is repeated a number of
times.
MOV CX,05 ;CX holds the loop count
MOV BX,0200H ;BX holds the offset data address
MOV AL,00 ;initialize AL
ADD_LP: ADD AL,[BX] ;add the next byte to AL
INC BX ;increment the data pointer
DEC CX ;decrement the loop counter
JNZ ADD_LP ;jump to next iteration if counter not zero

13 SVU ACADEET Dr. M. Ibrahim Assembly Language

 Use of the zero flag for looping
 Zero can result in several ways (e.g. overflow)
mov AX,0FFFFH mov AX,1
inc AX dec AX

cmp char,’$’ ; ZF = 1 if char is $ cmp AX,BX

Previous examples result in zero result and set ZF

 Related instructions

 jz : jump if zero (jump if ZF = 1)

 jnz : jump if not zero (jump if ZF = 0)

14 SVU ACADEET Dr. M. Ibrahim Assembly Language

 Operations on Flags
 CLC: Clear Carry Flag  CF = 0
 STC: Set Carry Flag  CF = 1
 CMC: Complement Carry Flag  if CF = 0  CF = 1, otherwise CF = 0

15 SVU ACADEET Dr. M. Ibrahim Assembly Language

 Wrap-around and Overlapping
 When adding the offset to the shifted segment register results in an
address beyond the maximum allowed range of FFFFFH
 In that situation, wrap-around will occur.

Example: What is the range of physical addresses if CS = FF59?

 The low range is FF590 (FF590 + 0000).
 The range goes to FFFFF and wraps around, from 00000 to 0F58F
(FF590 + FFFF = 0F58F), which is illustrated below.
 In calculating the physical address, it is possible that two segments can
overlap, which is desirable in some circumstances.

16 SVU ACADEET Dr. M. Ibrahim Assembly Language

 Can a single physical address-belong to many
different logical addresses?

Yes
Logical address (hex) Physical address (hex)
1000:5020 15020
1500:0020 15020
1502:0000 15020
1400:1020 15020
1302:2000 15020

17 SVU ACADEET Dr. M. Ibrahim Assembly Language

 Jump
 Unconditional Jump
xxx: ………
………
………
JMP xxx

 Conditional Jump
xxx: ………
………
………
JC xxx JNC xxx
JZ xxx JNZ xxx
JP xxx JNP xxx
JO xxx JNO xxx
JS xxx JNS xxx

18 SVU ACADEET Dr. M. Ibrahim Assembly Language

 Unsigned Numbers
 Unsigned numbers: Data in which all the bits are used to represent data
and no bits are set aside for the positive or negative sign.
 An 8-bit operand ranges from 00 to FFH (0 to 255 decimal)
 A 16-bit operand ranges from 0000 to FFFFH (0 to 65535 decimal)

 Example: A byte of memory contains (A3)16.

What decimal number does this represent if the byte is interpreted as
containing: - an eight-bit unsigned integer.
- an eight-bit signed integer.
Answer:
Unsigned integer (A3)16 =
(10100011)2 = 271 + 260 + 251 + 240 + 230 + 220 + 211 + 201 = 163
Signed integer (A3)16 =
(A3)16 = (10100011)2 = - (01011101)2 Get the two’s complement if MSB is 1
- (270 + 261 + 250 + 241 + 231 + 221 + 210 + 201) = -93

19 SVU ACADEET Dr. M. Ibrahim Assembly Language

 Addition of unsigned numbers

 ADD destination, source ; destination = destination + source

 ADC destination, source ; destination = destination + source + CF
 ADC Example:
STC ; set CF = 1
MOV AL, 5 ; AL = 5
ADC AL, 1 ; AL = 7
 The destination operand can be a register or in memory.
 The source operand can be a register, in memory, or immediate.
 Remember that memory-to-memory operations are never allowed in
80x86 Assembly language.

 The instruction could change any of the ZF, SF, AF, CF, or PF bits of the
flag register, depending on the operands involved.

20 SVU ACADEET Dr. M. Ibrahim Assembly Language

 Example
Show how the flag register is affected by
MOV AL,0F5H
ADD AL,0BH
F5 11110101
+
0B 00001011
100 100000000

 After the addition, the AL register (destination) contains 00

 CF = 1 since there is a carry out from D7
 SF = 0 the status of D7 of the result
 PF = 1 the number of 1s is zero (zero is an even number)
 AF = 1 there is a carry from D3 to D4
 ZF = 1 the result of the action is zero (for the 8 bits)

21 SVU ACADEET Dr. M. Ibrahim Assembly Language