A89303

Three-Phase Sensorless Pump Driver IC

FEATURES AND BENEFITS DESCRIPTION

• AEC-Q100 qualified The A89303 three-phase motor driver incorporates sensorless
• I2C serial port control drive intended to drive low power automotive BLDC motors.
• Fast startup features A trapezoidal drive algorithm is implemented to minimize time
• Trapezoidal drive to ramp up to maximum speed.
• Sensorless (no Hall sensors required)
• Low RDS(ON) power MOSFETs The device can be operated by PWM duty or I2C interface.
• FG speed output The I2C serial port can be used to customize the startup and
• Lock detection running operation via EEPROM.
• Soft start The A89303 is available in a 20-lead TSSOP with exposed
• Overcurrent protection power pad (suffix LP) and a 32-contact 5 mm × 5 mm QFN
• Overvoltage protection with exposed thermal pad and wettable flank (suffix ET).
• Diagnostic outputs
• Small form factor automotive pump

PACKAGES:

20-lead TSSOP with 32-contact QFN with

exposed thermal pad exposed thermal pad
(LP package) and wettable flank
5 mm × 5 mm × 0.90 mm
Not to scale (ET package)

0.22 µF/X7R
CP1
CP2

OCP Enable
Logic Supply Charge Pump VCP
Vds Monitor
VCP 0.22 µF/X7R
VBB
VBB Vin
CLK
I2C serial port 22 µF
&
DATA EEPROM

System OUTC
GATE
Variables DRIVE OUTB
OUTA

Duty In PWM/SCL
RSENSE
6
LSS
FG/SDA LSS
Control Ocl VRI
Logic Comp

FF1

Position
FF2 CTAP
Detect
OUTB
OUTC

OUTA

GND

Figure 1: Typical Application

A89303-DS, Rev. 1 March 10, 2021

MCO-0000950
A89303 Three-Phase Sensorless Pump Driver IC

SPECIFICATIONS
SELECTION GUIDE
Operating Temperature
Part Number Packaging Packing
Range (TA) (°C)
A89303KLPTR-T –40 to 125 20-lead TSSOP with exposed thermal pad 4000 pieces per 13-inch reel
A89303KETSR-J –40 to 125 32-contact QFN with exposed thermal pad and wettable flank 6000 pieces per 13-inch reel

ABSOLUTE MAXIMUM RATINGS

Characteristic Symbol Notes Rating Unit
Supply Voltage VBB –0.3 to 40 V
Logic Input Voltage Range VIN PWM –0.3 to 6 V
Logic Output VO FG, FF1, FF2 –0.3 to 6 V
Output Current IOUT 3.6 A
DC ±0.36 V
LSS VLSS
t < 200 ns ±2.5 V
Output Voltage VOUT OUTA, OUTB, OUTC –1.5 to VBB + 1 V
CTAP –0.6 to VBB + 0.6 V
VCP VBB – 0.3 to VBB + 8 V
CP1 –0.3 to VBB + 0.3 V
CP2 VBB – 0.3 to VCP + 0.3 V
Maximum EEPROM write cycles EEPROMW(MAX) 1000 cycles
Junction Temperature TJ 150 °C
Storage Temperature Range Tstg –55 to 150 °C
Operating Temperature Range TA –40 to 125 °C

THERMAL CHARACTERISTICS
Characteristic Symbol Test Conditions* Value Unit
20-lead TSSOP (package LP), on 2-sided PCB 1-in.2 copper 35 °C/W
Package Thermal Resistance RθJA
32-contact QFN (package ET), on 2-sided PCB 1-in.2 copper 40 °C/W
*Additional thermal information available on the Allegro website.

TABLE OF CONTENTS
Features and Benefits............................................................ 1 TSD/Fault Flag with PWM High Timing................................. 9
Description........................................................................... 1 Power On / Power Off Timing............................................ 10
Packages............................................................................. 1 Startup Sequence............................................................ 12
Typical Application................................................................. 1 PWM Control................................................................... 12
Specifications....................................................................... 2 EEPROM Map.................................................................... 13
Selection Guide................................................................. 2 Serial Port.......................................................................... 14
Absolute Maximum Ratings................................................. 2 I2C Timing Diagrams........................................................ 14
Recommended Operational Range...................................... 2 Write Command............................................................... 15
Thermal Characteristics...................................................... 2 Read Command.............................................................. 15
Pinout Diagram and Terminal List Table................................... 3 Programming EEPROM.................................................... 16
Electrical Characteristics........................................................ 4 Application Information........................................................ 18
Functional Description........................................................... 6 Pin Diagrams...................................................................... 19
Basic Operation................................................................. 6 Package Outline Drawings................................................... 20

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A89303 Three-Phase Sensorless Pump Driver IC

PINOUT DIAGRAMS AND TERMINAL LIST TABLE

Terminal List Table

Number
Name Description
CP2 1 20 VCP LP ET
CP1 2 19 OUTC
CP2 1 21 Charge pump capacitor
n/c 3 18 VBB

PWM/SCL 4 17 n/c
CP1 2 22 Charge pump capacitor
n/c 5 16 LSS n/c 3 23
PAD
n/c 6 15 OUTB PWM/SCL 4 24 Logic input – PWM duty or I2C clock
FF2 7 14 LSS
n/c 5 25, 26, 27
FF1 8 13 VBB

FG/SDA 9 12 OUTA
n/c 6 28, 29, 30
GND 10 11 CTAP FF2 7 31 Logic output signal
FF1 8 32 Logic output signal
n/c – 1
LP Package Pinout
FG/SDA 9 2 I/O – Speed output signal or I2C data
n/c – 3
GND 10 4 Ground
n/c – 5
CTAP 11 6 Motor common
FF1

FF2

n/c

n/c

n/c

n/c

n/c

n/c

OUTA 12 7 Motor terminal

32

31

30

29

28

27

26

25

n/c 1 24 PWM/SCL
n/c – 8
FG/SDA 2 23 n/c
VBB 13 9 Input supply
n/c 3 22 CP1

GND 4 21 CP2
n/c – 10
n/c 5 20 VCP LSS 14 11 Low-side source connection
CTAP 6 19 n/c n/c – 12
OUTC
OUTA 7 18
OUTB 15 13 Motor terminal
n/a 8 17 n/c
LSS 16 14 Low-side source connection
10

12

13

14

15

16
11
9

n/c 17 15
VBB

n/c

LSS

n/c

OUTB

LSS

n/c

VBB

VBB 18 16 Input supply

n/c – 17
ET Package Pinout
OUTC 19 18 Motor terminal
n/c – 19
VCP 20 20 Charge pump capacitor
PAD – – Exposed pad for enhanced thermal dissipation;
connect to GND pin

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A89303 Three-Phase Sensorless Pump Driver IC

ELECTRICAL CHARACTERISTICS: Valid for TJ = –40°C to 125°C and VBB = 5.5 to 40 V, unless noted otherwise
Characteristics Symbol Test Conditions Min. Typ. Max. Unit
GENERAL
Driving 5.5 – VBBOV V
Load Supply Operating Range VBB
Operating 5.5 – 40 V
VBB Supply Current IBB Active mode (PWM duty < DC_ON) – 8.5 12 mA
Relative to VBB, VBB = 8 V 6.5 7 7.7 V
Charge Pump VCP
Relative to VBB, VBB = 5.5 V 4 5 – V
POWER DRIVER
IOUT = 1.5 A, TJ = 25°C, VBB = 12 V – 300 – mΩ
Total Driver On-Resistance IOUT = 1.5 A, TJ = 125°C, VBB = 12 V – 450 520 mΩ
RDS(ON)
(Sink + Source) Source Driver, TJ = 25°C, VBB = 12 V – 150 – mΩ
Sink Driver, TJ = 25°C, VBB = 12 V – 150 – mΩ
Motor PWM Frequency fPWM 23.3 24.5 25.7 kHz
MOTOR CONTROL LOGIC
PWM Input Frequency Range fPWMIN 2.1 – 45 kHz
Duty Cycle On Threshold DCON 9.5 10 10.5 %
Duty Cycle Off Threshold DCOFF 7 7.4 8 %
External PWM Delay ON tPWM_ON 494 520 546 μs
External PWM Delay OFF tPWM_OFF 494 520 546 μs
PROTECTION CIRCUITS
VBB Undervoltage Threshold VBBUVLO VBB rising 4.7 4.85 5 V
VBB Undervoltage Hysteresis VBBHYS 400 500 600 mV
VBB Overvoltage VBBOV VBB rising 29 – 31.5 V
VBB Overvoltage Hysteresis VBBOVHYS 1.5 2 2.5 V
VCP UVLO VCPUVLO VCP rising 3.6 3.85 4.1 V
VCP UVLO Hysteresis VCPUVHYS 200 – 400 mV
Charge Pump Power Up Time [2] tVCPUV – 80 400 μs
POR Delay Time [2] tPOR_DELAY – 80 90 μs
Overcurrent Threshold VOCL VRI = 160 mV –5 0 5 %
Overcurrent Protection IOCP 5 – – A
Thermal Shutdown Temperature TJTSD Temperature increasing 165 175 185 °C
Thermal Shutdown Hysteresis ΔTJ Recovery = TJTSD – ΔTJ – 20 – °C

[1] Specified limits are tested at a single temperature and assured over temperature range by design and characterization.
[2] Ensured by design and characterization, not production tested

Continued on next page...

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A89303 Three-Phase Sensorless Pump Driver IC

ELECTRICAL CHARACTERISTICS (continued): Valid for TJ = –40°C to 125°C and VBB = 5.5 to 40 V, unless noted otherwise
Characteristics Symbol Test Conditions Min. Typ. Max. Unit
LOGIC/INPUT OUTPUT/I2C
Input Current (PWM, FG) IIN VIN = 0 to 5.5 V –5 <1 5 µA
Logic Input Low Level VIL 0 – 0.8 V
Logic Input High Level VIH 2 – 5.5 V
Logic Input Hysteresis VHYS 200 300 600 mV
Output Saturation Voltage VSAT I = 5 mA – – 0.3 V
Logic Output Leakage (FG, FF1, FF2) IFG V = 5.5 V, switch OFF – – 5 µA
I2C TIMING
SCL Clock Frequency fCLK 8 − 400 kHz
Bus Free-Time Between Stop/Start tBUF 1.3 – – μs
Hold Time Start Condition tHD:STA 0.6 – – μs
Setup Time for Start Condition tSU:STA 0.6 – – μs
SCL Low Time tLOW 1.3 – – μs
SCL High Time tHIGH 0.6 – – μs
Data Setup Time tSU:DAT 100 – – ns
Data Hold Time tHD:DAT 0 – 900 ns
Setup Time for Stop Condition tSU:STO 0.6 – – µs

[1] Specified limits are tested at a single temperature and assured over temperature range by design and characterization.

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A89303 Three-Phase Sensorless Pump Driver IC

FUNCTIONAL DESCRIPTION

Basic Operation number. This 9-bit “demand” is translated to a PWM duty cycle
applied to the motor windings, effectively a percentage of the
The A89303 targets automotive pump BLDC applications to meet power supply voltage.
the objectives of fast startup, high efficiency, and robust protec-
tion features. Protection features include lock detection with restart, overcur-
rent limit, overvoltage protection, motor output short-circuit
The speed of the fan is typically controlled by variable duty cycle protection (OCP), thermal shutdown, and undervoltage monitors
PWM input. The duty cycle is measured and converted to a 9-bit (VBB, VCP).

State/
3 4 5 0 1 2
FG

OUTA
Trap Drive
Dir=1=ABC OUTB

OUTC
Motor
Terminal
PWM (OUTA)

Current iA
Waveforms iB
iC

Figure 2: Trapezoidal Drive Sequence

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A89303 Three-Phase Sensorless Pump Driver IC

FG. Open-drain output. Represents electrical frequency of the OVP. The outputs can be disabled if power supply voltage
motor. Additionally, the FG pin serves as the data line (SDA) for exceeds threshold VBBOV.
I2C communication.
Motor Lead Fault (OCP). Overcurrent Protection, VDS moni-
PWM. Speed demand input. The demand can be in the form of tor. To protect from short to ground, shorted load, or short to
duty cycle, or direct I2C command. The PWM pin also is the I2C battery conditions for the motor lines, the voltage across the
clock input (SCL). The allowable frequency range for duty input power outputs are always monitored when the MOSFET is turned
is 2.1 to 45 kHz. There is a 520 µs delay after PWM changes for ON. There will be a short blank time before the motor outputs are
logic to detect a valid ON or OFF command. disabled if the overcurrent protection limit IOCP is exceeded. The
fault is latched off and can only be reset by power cycle or PWM
LOCK DETECT. During motor operation, the core logic will
on/off cycle.
check to see if motor is synchronized based on comparison of
expected back-EMF zero crossing to the actual back-EMF zero Note: During the shorted event, the absolute maximum ratings
crossing. If it is determined the rotor has lost synchronization, may be exceeded for the blank time.
the A89303 will disable the outputs before attempting a motor
OCL. Overcurrent Limit. The voltage on LSS pin is monitored
restart.
to limit current in the motor outputs. The overcurrent threshold
CTAP. Connection for the motor common. This pin must be left voltage VRI can be programmed via EEPROM.
open if not connected.
IOCL = VRI / RSENSE
CHARGE PUMP (VCP, CP1, CP2). A charge pump is used
to generate a gate supply 7 V greater than VBB in order to drive
where VRI = (Code + 1) × 10 mV ; Code = [15..31]
the source side DMOS gates. Two 0.22 µF ceramic capacitors
are required for this function, connected as shown in applica-
tion diagram. The charge pump is disabled when the PWM input
is less than duty cycle thresholds. The charge pump circuit also
integrates an undervoltage monitor to protect against turning on
DMOS outputs when VCP is too low.

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A89303 Three-Phase Sensorless Pump Driver IC

Fault Flags. Two open drain fault pins indicate status as follows.

FF2 FF1 Fault Condition

0 0 No Fault – Normal operation
0 1 Temperature Fault [1]
1 0 Motor Lead Fault – Short to Ground, Short to Battery, Shorted load, Rotor Lock
1 1 Voltage Fault – VBB UVLO, VBB OVP, VCP UVLO [2]

[1] TSD with PWM = high results in rotor lock fault. Rotor lock fault has priority. To check TSD when motor running, drive PWM low to observe FF
change from 10 to 01.
[2] If PWM is below DCON/DCOFF threshold, VCP UVLO fault will be masked.

Fault Fault Action Latched Reset Method

VBB Undervoltage Disable Outputs [1] N Restart attempted when VBB in valid range
TSD Disable Outputs, start TLOCK timer N Motor restart after TLOCK Timeout
VCP Undervoltage Disable Outputs N Restart attempted when VCP in valid range
VBB Overvoltage Disable Outputs N Restart attempted when VBB in valid range
VDS Fault (OCP) Disable Outputs Y Latch reset by PWM OFF→ON transition
Loss of Sync Disable Outputs, start TLOCK timer N Motor Restart after TLOCK Timeout

Output disable based on VBB UVLO can be masked by EEPROM bit UVMASK. In this case, the outputs will be protected by the charge pump
[1]
UVLO function.

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A89303 Three-Phase Sensorless Pump Driver IC

TSD/Fault Flag with PWM High Timing

1
5 6 7
2 3 4
TJTSD

ΔTJ

External
PWM
Internal Motor On
tPWM _OFF
On/Off command
Off

Motor Operation Normal Disabled Normal Disabled

Lock Timer

FF1
( External Pullup )

FF2
(External Pullup )

Figure 3: TSD/ Fault Flag with PWM High Timing

Description of events:
1. TSD threshold exceeded, short pulse on FF1, FF = 01
2. TSD triggers lock detect timer, FF = 10.
3. At end of lock timer. Since TSD condition still exists, Lock timer triggered again, FF = 10.
4. At end of lock timer, TSD is OK, normal motor operation can resume, FF = 00.
5. TSD threshold exceeded, short pulse on FF1, FF = 01, shortly followed by FF = 10.
6. Upon detection of FF = 10, controller wants to determine fault caused by motor lead fault or
TSD. Method is to drive PWM low
7. Short delay (tPWM_OFF) – before internal on/off signal changes state. This signal resets lock
timer (will not reset OCP fault). FF changes to 01.

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A89303 Three-Phase Sensorless Pump Driver IC

Power On / Power Off Timing

VCP uvlo 5

3
8
VBB uvlo
1

Internal Logic
Supply uvlo

6 7
Internal Logic
POR
tPOR_DELAY
External
PWM
Internal Motor On
tPWM _ON tPWM _OFF
On/Off command
Off

FF1
( External Pullup ) tVCPUV

FF2
(External Pullup )

Figure 4: Power On / Power Off Timing, PWM high on power up, low on power down

Conditions: PWM high on power up, low on power down.

Description of events:
1. POR delay signal (tPOR_DELAY) triggered by UV signal on internal 3p3 power supply.
Fault signals driven low during this delay.
2. At end of delay, logic is valid. FF = 11, voltage fault due to VBB below undervoltage
level. At this point, logic circuit is running PWM signal is checked.
3. FF = 00 voltage fault is released as VBB rises over VBBUVLO.
4. PWM logic high is detected after tPWM_ON. Charge pump is enabled. FF = 11 while VCP
is below UVLO level. The time for VCP to rise over its UVLO level is tVCPUV.
5. VCP rises over UVLO level and motor outputs turn on, FF back to 00.
6. PWM off starts tPWM_OFF timer.
7. PWM recognized low to turn off motor and charge pump. Fault flag does not check VCP
UV when PWM = low.
8. Power down UV fault, FF = 11, when VBB falls below (VBBUVLO – VBBHYS).
9. Internal logic reset when below internal V3p3 UVLO. This occurs when VBB is approxi-
mately 3.6 V.

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A89303 Three-Phase Sensorless Pump Driver IC

Power On / Power Off Timing (continued)

5
VCP UVLO

6
VBB UVLO
1

Internal Logic
Supply UVLO

2 4
3

Internal Logic
POR
tPOR_DELAY
External
PWM
Internal Motor On
tPWM _ON
On/Off command
Off

FF1
(External Pullup )

FF2
(External Pullup )

Figure 5: Power On / Power Off Timing, PWM low on power up, high on power down, VBB dv/dt < 80 µs

Conditions: PWM low on power up, high on power down, VBB dv/dt <80 µs.
Description of events:
1. POR delay signal (tPOR_DELAY) triggered by UV signal on internal 3p3 power supply.
Fault signals driven low during this delay.
2. At end of delay, logic is valid. Fault flag = 00, due to VBB above undervoltage level.
3. PWM ON starts tPWM_ON timer.
4. PWM recognized High to Turn On motor and Charge pump. Fault flag checks VCP UV
and pulse high for charge pump power up time. The time for VCP to rise over its UVLO
level is tVCPUV.
5. FF = 00 after VCPUVLO is exceeded.
6. Power down UV fault, FF = 11, when VBB falls below (VBBUVLO – VBBHYS)
7. Internal logic reset when below internal V3p3 UVLO. This occurs when VBB is approxi-
mately 3.6 V.

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A89303 Three-Phase Sensorless Pump Driver IC

Startup Sequence

3 Startup time

Measure PWM Duty/ Enable Outputs & Ramp to Continuous

Off State
Enable Charge Pump determine Rotor Position Maximum Speed Operation
1 2
Motor Current OCL Limit
Motor Speed

VCP

PWM

Figure 6: Startup Sequence

PWM Control
Motor will be disabled if PWM duty below DCON threshold of 10%. There is 2.6% hysteresis to DCOFF threshold of 7.4%.

100
PWM Duty Out

7.4%
0%
Disabled
7.4 10 100
PWM Duty In (%)

Figure 7: PWM Control

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A89303 Three-Phase Sensorless Pump Driver IC

EEPROM MAP
Table 1: EEPROM Map. Refer to application note and user interface for additional detail.
I2C Register EE Address Bits Name Description Default Setting
64 0 15:0 Dev1 Allegro Reserved n/a
65 1 15:0 Dev1 Allegro Reserved n/a
66 2 15:0 Dev1 Allegro Reserved n/a
67 3 15:0 Dev1 Allegro Reserved n/a
68 4 15:0 Dev1 Allegro Reserved n/a
69 5 15:0 Dev1 Allegro Reserved n/a
70 6 15:0 Dev1 Allegro Reserved n/a
71 7 15:0 Trim1 Allegro Reserved n/a
72 8 15:0 Trim2 Allegro Reserved n/a
0 UVMASK 0 = Normal 1 = Mask
1 OVPDIS 1 = Normal 1 = Disable
2 RETRY 0 = Disable 1 = Enable
73 9 0x005C
3 OVERLAP 0 = Disable 1 = Enable
4 Dev2 Allegro Reserved – Set to 1
6:5 Dev2 Allegro Reserved – Set to 0
0 DIR 0 = ACB, 1 = ABC
1 FGSTRT 0 = Disable 1 = Enable
4:2 BEMFILT Select Bemf Filter
6:5 BEMFHYS Select Bemf Hysteresis
74 10 7 WIND 0 = Disable 1 = Enable 0x480C
8 IPDENB 0 = Disable 1 = Enable
9 IPDDECAY 0 = SLOW 1 = FAST
10 Dev2 Allegro Reserved – Set to 0
13:11 STEPS Select trap states before BEMF detection
75 11 5:0 ALIGN Align Time 0x0001
76 12 5:0 LOCK Lock Time 0x002A
1:0 TOFF Fixed Off time Current Limit
7:2 OSC Startup Osc
77 13 0cFC4B
9:8 Unused n/a
15:10 COMST Com State Stall Limit
4:0 IPDINI IPD Start Level
78 14 7:5 IPDSTEP Select IPD steps 0x148D
12:8 OCL Select Current Limit
79 15 15:0 Trim2 Allegro Reserved n/a

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A89303 Three-Phase Sensorless Pump Driver IC

Serial Port
The A89303 uses standard fast mode I2C serial port format to program the EEPROM or to control the IC speed serially. The PWM pin
functions as the clock (SCL) input, and the FG pin is the data line (SDA). No special sequence is needed to begin transferring data. If
the motor is running, the FG may then pull the data line low while trying to initialize into serial port mode. Once an I2C command is
sent, the PWM input is ignored, and the motor will turn off as if a PWM duty command of 0% was sent.
The A89303 7-bit slave address is 0x55.

I2C Timing Diagrams

SDA
SDA

SCL
Start Stop SCL
Condition Condition

Figure 8: Start and Stop Conditions Figure 9: Clock and Data Bit Synchronization

tSU:STA tHD:STA tSU:DAT tHD:DAT tSU:STO tBUF

SDA

SCL

tLOW tHIGH

Figure 10: I2C-Compatible Timing Requirements

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A89303 Three-Phase Sensorless Pump Driver IC

Write Command
1. Start Condition
2. 7-bit I2C Slave Address (Device ID) 1010101, R/W Bit = 0
3. Internal Register Address
4. 2 data bytes, MSB first
5. Stop Condition

Acknowledge Acknowledge Acknowledge Acknowledge

Control Data Most Control Data Least

Start I2 C Slave Address R/W Register Address Stop
Significant Data Byte Significant Data Byte

SDA 1 0 1 0 1 0 1 0 AK A7 A6 A5 A4 A3 A2 A1 A0 AK D15 D14 D13 D12 D11 D10 D9 D8 AK D7 D6 D5 D4 D3 D2 D1 D0 AK

SCL 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9

Figure 11: Write Command

Read Command: Two Step Process

1. Start Condition
2. 7-bit I2C Slave Address (Device ID) 1010101, R/W Bit = 0
3. Internal Register Address to be read
4. Stop Condition
5. Start Condition
6. 7-bit I2C Slave Address (Device ID) 1010101, R/W Bit = 1
7. Read 2 data bytes
8. Stop Condition
Acknowledge Acknowledge

Start I2 C Slave Address R/W Register Address Stop

SDA 1 0 1 0 1 0 1 0 AK A7 A6 A5 A4 A3 A2 A1 A0 AK

SCL 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9

Acknowledge Acknowledge Acknowledge

from Master from Master
Control Data Most Control Data Least
Start I2 C Slave Address R/W Stop
Significant Data Byte Significant Data Byte

SDA 1 0 1 0 1 0 1 1 AK D15 D14 D13 D12 D11 D10 D9 D8 AK D7 D6 D5 D4 D3 D2 D1 D0 AK

SCL 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9

Figure 12: Read Command

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A89303 Three-Phase Sensorless Pump Driver IC

Programming EEPROM
The A89303 contains 63 words of 16-bit length. The EEPROM is
controlled with the following I2C registers. Refer to application
note for EEPROM definition.

Table 2: EEPROM Control – Register 161 (Used to control programming of EEPROM)

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 0 RD WR ER EN

Bit Name Description

0 EN Set EEPROM voltage required for writing or erasing
1 ER Sets mode to erase
2 WR Sets mode to write
3 RD Sets mode to read
15:4 n/a Do not use; always set to zero during programming process

Table 3: EEPROM Address – Register 162 (Used to set the EEPROM address to be altered)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 eeADDRESS

Bit Name Description

Used to specify EEPROM address to be changed. There are 20 addresses. Do not change address 0 or 19 as
4:0 eeADDRESS
these are factory controlled
15:5 n/a Do not use; always set to zero during programming process

Table 4: EEPROM DataIn – Register 163 (Used to set the EEPROM new data to be programmed)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
eeDATAin

Bit Name Description

15:0 eeDATAin Used to specify the new EEPROM data to be changed

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A89303 Three-Phase Sensorless Pump Driver IC

Table 5: DataOUT – Register 164 (Used for read operations)

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
eeDATAout

Bit Name Description

15:0 eeDATAout Used to readback EEPROM data from address defined in register 162

There are 3 basic commands: Read, Erase, and Write. To change

the contents of a memory location, the word must be first erased.
The EEPROM programming process (writing or erasing) takes
12 ms per word.
Each word must be written individually.

Example #1: Write EEPROM address 9 to 261 (0x0105)

1) Erase the word
I2C Write REGADDR[Data] ; comment
a. 162[9] ; set EEPROM address to erase
b. 163[0] ; set 0000 as Data In
c. 161[3] ; set control to Erase and Voltage High
d. Wait 12 ms ; required 12 ms High Voltage Pulse to Write
2) Write the new data
a. 162[9] ; set EEPROM address to write
b. 163[261] ; set Data In = 261
c. 161[5] ; set control to Write and Set Voltage High
d. Wait 12 ms ; required 12 ms High Voltage Pulse to Write

Example #2: Read EEPROM address 5 to confirm correct data properly programmed
1) Read the word
a. 9[I2C Read] ; read register 9; this will be the contents of EEPROM

17
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A89303 Three-Phase Sensorless Pump Driver IC

APPLICATION INFORMATION

FF1

FF2

n/c

n/c

n/c
n/c

n/c

n/c
RPWM

n/c PWM On/Off

RFG
FG n/c

CCP
n/c CP1

GND CP2

CVCP

n/c VCP

n/c
CTAP

OUTA OUTC

Exposed Pad
n/c n/c
OUTB
VBB

VBB
LSS

LSS
n/c

n/c

n/c

CVBB1
D1
+12Vin

CVBB2 TVS
RSENSE

Figure 13: Typical Application Circuit

Table 6: Typical Application Components
Name Suggested Value Comment
CVBB1 22 to 220 µF Power supply stabilization – electrolytic or ceramic OK.
CVBB2 22 µF Ceramic capacitor required
CVCP 0.22 µF Ceramic capacitor required
CCP 0.22 µF Ceramic capacitor required
D1 B24013F Required to isolate motor for reverse polarity protection
TVS SMBJ33A TVS to limit max VBB due to transients due to motor generation on power line
RFG, RPWM 500 Ω Isolate IC pin from noise or overvoltage transients or protect from connector issues
RSENSE 100 mΩ Resistor for current sensing
Layout Notes:
1. Add thermal vias to exposed pad area.
2. Add ground plane on top and bottom of PCB.
3. Place CVBB1 as close as possible to IC, connected to GND plane.

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A89303 Three-Phase Sensorless Pump Driver IC

PIN DIAGRAMS

VBB

FG
FF1
OUTA/B/C
FF2 10 V

LSS
LSS
7.5 kΩ
PWM
VBB
10 V 6.5 V
43 V VBB

8V
VBB

VCP
CTAP

CP2

VBB

CP1

Figure 14: Pin Diagrams

19
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955 Perimeter Road
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www.allegromicro.com
A89303 Three-Phase Sensorless Pump Driver IC

PACKAGE OUTLINE DRAWINGS

For Reference Only – Not for Tooling Use

(Reference MO-153 ACT)
NOT TO SCALE
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown

6.50 ±0.10

4.20
8º
0º
20
0.20
0.09

C
3.00 4.40 ±0.10 6.40 ±0.20

1.00 REF
0.60 ±0.15
1 2

0.25 BSC
20X C
1.20 MAX SEATING PLANE
0.10 C SEATING
PLANE GAUGE PLANE

0.30
0.65 BSC 0.15
0.19
0.00
0.45 0.65

NNNNNNN
20 YYWW
LLLLLLL
1.70
1

D Standard Branding Reference View

N = Device part number
= Supplier emblem
Y = Last two digits of year of manufacture
W = Week of manufacture
3.00 6.10 L = Lot number

A Terminal #1 mark area

B Reference land pattern layout (reference IPC7351 SOP65P640X110-21M);

all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
1 2
C Exposed thermal pad (bottom surface)
4.20
D Branding scale and appearance at supplier discretion
B PCB Layout Reference View

Figure 15: Package LP, 20-Lead TSSOP with Exposed Pad

20
Allegro MicroSystems
955 Perimeter Road
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A89303 Three-Phase Sensorless Pump Driver IC

For Reference Only – Not for Tooling Use

(Reference JEDEC MO-220VHHD-6)
Dimensions in millimeters – NOT TO SCALE
Exact case and lead configuration at supplier discretion within limits shown

5.00 ±0.10 0.25 0.50

32
32
0.90
1
1
2 A 2

5.00 ±0.10 3.60 5.00

DETAIL A 0.85 ±0.05

32× D C
3.60
0.08 C SEATING 5.00
PLANE
0.25 ±0.05
C PCB Layout Reference View
0.50 BSC 0.10 ±0.10
0.40 ±0.05

0.40 ±0.05
0.10 REF 0.203 REF

3.60 ±0.10
0.05 REF
B Detail A
2
1
A Terminal #1 mark area
32 0.25 REF B Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier
3.60 ±0.10 discretion)
C Reference land pattern layout (reference IPC7351 QFN50P500X500X100-33V6M);
all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet
application process requirements and PCB layout tolerances; when mounting on a
multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal
dissipation (reference EIA/JEDEC Standard JESD51-5)
D Coplanarity includes exposed thermal pad and terminals

Figure 16: Package ET, 32-Contact QFN with Exposed Pad and Wettable Flank

21
Allegro MicroSystems
955 Perimeter Road
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www.allegromicro.com
A89303 Three-Phase Sensorless Pump Driver IC

Revision History
Number Date Description
– August 27, 2020 Initial release
Updated product title, typical application (page 1), Logic Input Voltage Range, Logic Output (page 2);
added EEPROM Cycles (page 2); corrected CP1 and CP2 pin order in LP pinout diagram (page 3);
1 March 10, 2021
updated Duty Cycle Off Threshold (page 4), Setup Time for Stop Condition (page 5), DataOUT
EEPROM section (page 17), and other minor editorial updates.

Copyright 2021, Allegro MicroSystems.

Allegro MicroSystems reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit
improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems assumes no responsibility for its use; nor
for any infringement of patents or other rights of third parties which may result from its use.
Copies of this document are considered uncontrolled documents.

For the latest version of this document, visit our website:

www.allegromicro.com

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