ELL 740

Compact Modeling of Semiconductor Devices

Dr. Abhisek Dixit

Department of Electrical Engineering,
Indian Institute of Technology (IIT) Delhi

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 Course Details

l  3 credits, 3 lectures of 1 hour each per week in slot E

l  TUE, WED, FRI: 10-11hrs, LHC- Room 603
l  Distribution of marks (%)
-  Assignments (4) : 40
-  Minor Exams (2) : 30
-  Endsem (1) : 30
l  My contacts
-  Block II/Room 402-D, Ext:1156, Mob. on request

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 References: Books
•  Modern Semiconductor Devices for Integrated Circuits by Chenming C. Hu

•  Device Electronics for Integrated Circuits by Richard S. Muller & Theodore I. Kamins

•  Fundamentals of Semiconductor Devices by K. N. Bhat & M. K. Achuthan

•  Compact Modeling: Principles, Techniques and Applications by Gennady Gildenblat

•  MOSFET Models for SPICE Simulation: Including BSIM3v3 and BSIM4 by William Liu

•  Compact MOSFET Models for VLSI Design by A. B. Bhattacharyya

•  BSIM4 and MOSFET Modeling for IC Simulation by W. Liu and Chenming Hu

•  The Physics And Modeling of MOSFETs: Surface-Potential Model HiSIM� by Mitiko Miura-Mattausch, Hans J�rgen
Mattausch and Tatsuya Ezaki

•  FinFETs and Other Multi-Gate Transistors (Integrated Circuits and Systems) by J.-P. Colinge

•  The MOS Transistor, 3rd Edition by Yannis Tsividis

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 Course Outline
l  Introduction to AMS enablement and PDK elements (1)
l  Basics of semiconductor devices (1)
l  Device modeling tools- TCAD and SPICE (1)
l  Diode modeling (1.5), Assignment-1
l  Resistor modeling (1.5)
l  Minor-1 (1)
l  FEOL capacitor modeling (1), Assignment-2
l  MOS transistor modeling (8), Assignment-3
l  Minor-2 (1)
l  Variations, mismatch, corners and rest (3), Assignment-4
l  Major (1)

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Semiconductor Product Chain

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 Market Players

•  Product based: Apple, Nokia, Samsung, IBM, Sony…

–  Make money by integrating components (often IC’s)
–  biggest profit margin

•  Component based: Intel, IBM, STM, TI, ADI, RFMD…

–  Sell microprocessors, microcontrollers, DSP’s etc.
–  Highly competitive so small margin (e.g. DRAM, flash)

•  Service based: TSMC, UMC, NXP, IBM, Jazz…

–  Sell technology e.g. CMOS, RFCMOS, RFSOI, SiGe
–  Specialty business, less competitive, high profit margin

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 Analog Mixed Signal (AMS)

•  Digital systems typically perform common tasks based

on binary operations
–  Gates, ALU, Latches, FF, Microprocessors
•  What to do if you want to do real world applications?
–  Sensors, Radars
–  Basically deal with phenomena that can not be confined
with clock speed and binary operations
•  Temperature can vary from 1 to 45 deg C in Delhi
•  Transistors can be designed currently with minimum delay
of, say 1ps, that is 1THz but system can not perform at
that speed due to multiple limitations (fT vs fmax)

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 Typical AMS Applications

•  Onboard 150GHz weather radar (SiGe)

•  Low Noise Amplifier
•  Band gap reference
•  RF switch
•  ESD
•  Power amplifier (SiGe)
•  …

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 AMS Foundry
•  Companies going fabless or fablite
–  Lower operating cost to match up shrinking profit
margins
–  Enhanced focus on innovation in product design
•  Who manufactures their products
•  Foundry
•  Digital foundry (TSMC)
•  Analog foundry (Tower Jazz)
•  Digital and Analog foundry (IBM)
•  How customer’s design for a technology that is not
their own

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AMS Foundry Process Design Kit (PDK)
Enablement

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Example Interaction Between Customer and
Foundry
•  VT of 10X10 RVT transistor = 0.4V
•  VT of 10X0.18 RVT transistor = 0.25V
•  VT of 10X10 LVT transistor = 0.3V
•  VT of 10X0.18 LVT transistor = 0.2V
•  VT of 10X10 HVT transistor = 0.5V
•  VT of 10X0.18 HVT transistor = 0.4V
•  Resistance of 1X1 Silicon diffusion resistor = 10 Ohm
•  Capacitance of MIM capacitor with AM BEOL = 2fF/um2
•  Inductors (Q, resonant freq, inductance)…
•  Other resistors (resistance, VCR, TCR, mismatch, tolerance)…
•  Wires and transmission lines (R, L, G, C…)

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AMS Foundry PDK Enablement Activities

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Parasitic Extraction (PEX)

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Design Rule Check (DRC)

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The Big Picture of RF

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 Semiconductor Modeling

•  Fabrication of integrated circuits is an expensive affair

–  Circuit design should be first time right
–  Negligible trial and error, e.g. breadboard

•  The problem here is two-fold

–  To design devices, e.g. MOSFETs such that they meet
specific electrical performance (specs.)
–  To design circuit in such a way that when all the
elements, e.g. MOSFETs, resistors, capacitors etc.
come together, they achieve a specific electrical function

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 Device Modeling
•  Translation of electrical specifications of individual
devices, e.g. inductors, into a set of fabrication process
steps
•  Combining multiple device processes into a process
flow for a technology
•  In-depth simulation of electrical response of individual
devices
•  Understanding performance variations from nominal
operating conditions and accounting for them
•  Since focus is on a single device, simulator should be
highly accurate, even at the expense of speed

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 Circuit Modeling

•  Trial and error design of a circuit, comprising of

multiple devices, to achieve a specific task
•  Electrical response of the system under various
operating conditions
•  In-depth understanding performance variations and
accounting for them
•  Since multiple devices are involved, simulator should
be accurate enough and reasonably fast

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 Simulators: TCAD
•  Grid-based simulators
–  Device is described as a collection of grid points, e.g. finite-element, finite-
difference
–  Doping concentration at each grid point is specified
–  Material and interface details are specified
–  Input grid and doping profiles can be produced analytically or using a
process simulator (desired)
–  Simulator calculates current density at each grid point through a set of
specified equations, e.g. Poisson, Continuity, Drift-Diffusion, Energy
Balance
–  Advance simulation options such as quantum corrections (MLDA, DGA),
FD statistics, Monte-Carlo are available
–  Simulations can be highly accurate but time consuming, e.g. an Id-Vg
sweep on a 3-D FinFET could easily take 1 week if fully coupled
Schrödinger equations are simulated

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 Simulators: SPICE
•  Node-based simulator
–  Simulation Program with Integrated Circuit Emphasis (SPICE)
–  Works on nodal analysis
–  Uses all kinds of elements
•  Active devices
•  Passive devices
•  Voltage sources
•  Current sources
–  Every element can be a specific model
–  Performs multiple analyses
•  DC, small signal AC, transients, sensitivity etc.
–  It uses compact (just accurate, fast) models for the elements, so is much faster
compared to TCAD, e.g. transient response of a ring-oscillator with more than 200
transistors can be simulated in less than 5 minutes!

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 Compact Models
•  Include only basic equations (just accurate)
•  High on empirical content compared to TCAD
•  Rely heavily on calibration with hardware (TCAD when no hardware)
•  A compact model means:
–  A core model card for the device, written in SPICE, contains model parameters
–  May be a subc. wrapper on top of the core model, contains subcircuit parameters
–  Provision to simulate mismatch, process variations, corners for the device by
linking some of the key performance parameters with centralized process file for
all the models in the kit, e.g. M1 resistance tolerance
–  Provision to make high level changes in compact models through a design file,
e.g. wafer resistivity, BEOL metal stack

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 Compact Model Kit Topology & PDK

DA PEX Models Documentation

Design.scs

Fixed_corners.scs Process.scs

nfettw.scs
nch.scs
nfet.scs

pfet.scs

mimcap.scs

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 Commercial Tools in Compact Modeling
•  Many implementations of SPICE3F5
–  POWERSPICE (IBM Proprietory)
–  HSPICE (Synopsys)
–  Spectre (Cadence)
–  …
•  Spectre heavily used for AMS designs while HSPICE is preferred by digital folks
•  Spectre many add-ons, choice of integration methods, error tolerance, additional
analyses such as harmonic distortions etc.
•  Spectre is used for compact model simulations
•  But model development, extraction and calibration (more technical-our) piece of work
is done in Agilent-ICCAP tool

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 Commercial Tools … contd.: ICCAP
•  ICCAP can simulate using different circuit simulators, e.g. spectre, hspice etc.
•  ICCAP has capability to drive measurement setups also, e.g. HP4156 etc.
•  ICCAP provides automation necessary for fast turn around of model development
cycle
–  Parameter Optimization, choice of methods
–  Manage the model using DUT’s and set-up’s
–  Many more interesting and useful features
–  All this is done using Parameter Extraction Language (PEL)

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 Commercial Tools … (contd.)
•  Other tools
–  Cadence Analog Design Environment (ADE) for circuit simulations
–  Cadence Virtuoso for layout design and DRC
–  Mentor Graphics Calibre for LVS and PEX
–  Agilent ADS for RF simulations
–  Synopsys Sentaurus TCAD for generating data required for model extraction (if no h/w)

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Examples: A Design File

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Examples: A Process File

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Examples: A BSIM3 MOSFET MODEL CARD

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Reverse Bias

Junction capacitance?
Reverse-recovery?

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Diode I-V Characteristics

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 Diode Modeling

•  Diodes are used

–  For modeling FET S/D-B, triple-well junctions
–  In ESD protection devices
–  As standalone FEOL elements
•  A diode model is required to calculate
–  I-V (both forward and reverse biases, ideality etc.)
–  C-V (area and perimeter capacitances)
–  Temperature dependence of I and C (-40, 25, 120 deg C)

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The Diode Law

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Diode Law Plots

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Calculation of VD

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 Diode with a Resistive Load

•  Take an initial guess on VD in RHS and solve iteratively

by computer or calculator, easy to converge
•  But, this is not the best candidate for a compact model

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Diode Data

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The Compact Approach

Only Linear Elements

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 Small-signal Modeling: R and C
𝐼=​𝐼↓𝑆 (​𝑒↑​​𝑉↓𝐷 ∕(𝑛​𝑉↓𝑇 )  −1)≈​𝐼↓𝑆 ​𝑒↑​​𝑉↓𝐷 ∕(𝑛​𝑉↓𝑇 )  
​𝑔↓𝐷 =​|​𝑑𝐼/𝑑​𝑉↓𝐷  |↓𝑄 ≈​𝐼↓𝑆𝑄 /𝑛​𝑉↓𝑇  ​𝑒↑​​𝑉↓𝑄 ∕𝑛​𝑉↓𝑇   ≈​𝐼↓𝑄 /𝑛​𝑉↓𝑇  
​𝑟↓𝐷 =​1/​𝑔↓𝐷  ≈​𝑛​𝑉↓𝑇 /​𝐼↓𝑄  

​𝜏↓𝐹  is the forward transit time of charge carriers, QJ is the charge stored in junction due to
applied voltage

𝐹𝑖𝑟𝑠𝑡 𝑡𝑒𝑟𝑚 𝑖𝑛 𝑅𝐻𝑆 𝑖𝑠 𝐷𝑖𝑓𝑓𝑢𝑠𝑖𝑜𝑛 𝐶𝑎𝑝𝑎𝑐𝑖𝑡𝑎𝑛𝑐𝑒 𝑑𝑢𝑒 𝑡𝑜 𝑐𝑢𝑟𝑟𝑒𝑛𝑡 𝑓𝑙𝑜𝑤

𝑆𝑒𝑐𝑜𝑛𝑑 𝑡𝑒𝑟𝑚 𝑖𝑛 𝑅𝐻𝑆 𝑖𝑠 𝑡ℎ𝑒 𝐽𝑢𝑛𝑐𝑡𝑖𝑜𝑛 𝐶𝑎𝑝𝑎𝑐𝑖𝑡𝑎𝑛𝑐𝑒

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IV-data@25C

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Ideality and Saturation Current Extraction

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Resistance Effects

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Leakage Current

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Reverse Bias Capacitance

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Capacitance Parameter Extraction

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Temperature Effects

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