System Programming

System Software:
An Introduction to Systems Programming

Leland L. Beck
3rd Edition
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System Programming
 Chapter 1: Background
 Chapter 2: Assemblers
 Chapter 3: Loaders and Linkers
 Chapter 4: Macro Processors
 Chapter 5: Compilers
 Operating Systems
 Other System Software
 Software Engineering Issues

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 Chapter 1
Background

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Mr. Prashant Ankalkoti, Faculty, MCA Dept., JNNCE
Outline
 Introduction
 System Software and Machine Architecture
 The Simplified Instructional Computer (SIC)
 SIC Machine Architecture
 SIC/XE Machine Architecture
 SIC Programming Examples
 Traditional (CISC) Machines
 RISC Machines

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1.1 Introduction
 System Software consists of a variety of programs
that support the operation of a computer.
 The programs implemented in either software and (or)
firmware that makes the computer hardware usable.
 The software makes it possible for the users to focus on
an application or other problem to be solved, without
needing to know the details of how the machine works
internally.
 BIOS (Basic Input Output System)

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1.2 System Software and Machine Architecture
 System Software vs Application
 One characteristic in which most system software
differs from application software is machine
dependency.
 System programs are intended to support the operation
and use of the computer itself, rather than any
particular application.
 Examples of system software
 Text editor, assembler, compiler, loader or linker,
debugger, macro processors, operating system,
database management systems, software engineering
tools, …

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1.2 System Software and Machine Architecture

 Text editor
 To create and modify the program
 Compiler and assembler
 You translated these programs into machine language
 Loader or linker
 The resulting machine program was loaded into
memory and prepared for execution
 Debugger
 To help detect errors in the program

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System Software Concept
Users

Application Program

Utility Program
Debugger Macro Processor Text Editor
(Library)

Complier Assembler Load and Linker

OS
Memory Process Device Information
Management Management Management Management

Bare Machine (Computer)

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System Software and Machine Architecture
 Machine dependent
 Instruction Set, Instruction Format, Addressing Mode,
Assembly language …
 Machine independent
 General design logic / strategy, Two passes
assembler…

Machine independent
Machine Dependent

Computer

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1.3 The Simplified Instructional Computer
 Like many other products, SIC comes in two
versions
 The standard model
 An XE version
 “extra equipments”, “extra expensive”
 The two versions has been designed to be upward
compatible
 SIC (Simplified Instructional Computer)
 SIC/XE (Extra Equipment)
SIC Architecture
The SIC machine has basic addressing, storing most memory addresses in hexadecimal
integer format. Similar to most modern computing systems, the SIC architecture stores
all data in binary and uses the two's complement to represent negative values at
the machine level.
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1.3 The Simplified Instructional Computer
 SIC
 Upward compatible
 Memory consists of 8-bit bytes, 3 consecutive bytes
form a word (24 bits)
 There are a total of 32768 bytes (32 KB) in the
computer memory.
 5 registers, 24 bits in length
 A 0 Accumulator
 X 1 Index register
 L 2 Linkage register (JSUB)
 PC 8 Program counter
 SW 9 Status word (Condition Code)

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1.3.1 SIC Machine Architecture
 Data Formats
 Integers are stored as 24-bit binary number
 2’s complement representation for negative values
 Characters are stored using 8-bit ASCII codes
 No floating-point hardware on the standard version of
SIC

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Instruction Cycle
 CPU
 Control Unit (CU)
 Arithmetic and Logic Unit (ALU)
 Register
 Instruction Cycle
 Fetch Cycle
 Execution Cycle

Fetch Fetch
Decoder Computation Store Result
Instruction Operand

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1.3.1 SIC Machine Architecture
 Instruction format
 24-bit format
 The flag bit x is used to indicate indexed-addressing
mode 8 1 15
opcode x address

 Addressing Modes
 There are two addressing modes available
 Indicated by x bit in the instruction
 (X) represents the contents of reg. X

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1.3.1 SIC Machine Architecture
 Instruction set
 Format 3
 Load and store registers (LDA, LDX, STA, STX, etc.)
 Integer arithmetic operations (ADD, SUB, MUL, DIV)
 Compare instruction (COMP)
 Conditional jump instructions (JLT, JEQ, JGT)
 JSUB jumps to the subroutine, placing the return
address in register L.
 RSUB returns by jumping to the address contained in
register L.

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1.3.1 SIC Machine Architecture
 I/O
 I/O are performed by transferring 1 byte at a time to or
from the rightmost 8 bits of register A.
 Each device is assigned a unique 8-bit code as an
operand.
 Test Device (TD): tests whether the addressed device is
ready to send or receive
 < means ready = means not ready
 Read Data (RD)
 Write Data (WD)

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1.3.2 SIC/XE Machine Architecture
 Data format
 24-bit binary number for integer, 2’s complement for
negative values
 48-bit floating-point data type
 The exponent is between 0 and 2047
 f*2(e-1024)
 0: set all bits to 0

1 11 36

S exponent fraction

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1.3.2 SIC/XE Machine Architecture
 Instruction formats
 Relative addressing - format 3 (e=0)
 Extend the address to 20 bits - format 4 (e=1)
 Don’t refer memory at all - formats 1 and 2

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1.3.2 SIC/XE Machine Architecture
 Addressing modes
 n i x b p e
 Simple n=0, i=0 (SIC) or n=1, i=1
 Immediate n=0, i=1 TA=Values
 Indirect n=1, i=0 TA=(Operand)
 Base relative b=1, p=0 TA=(B)+disp
0 <= disp <= 4095
 PC relative b=0, p=1 TA=(PC)+disp
-2048 <= disp <= 2047

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 1.3.2 SIC/XE Machine Architecture

 Addressing mode
 Direct b=0, p=0 TA=disp

 Index x=1 TAnew=TAold+(X)

 Index+Base relative x=1, b=1, p=0 TA=(B)+disp+(X)

 Index+PC relative x=1, b=0, p=1 TA=(PC)+disp+(X)

 Index+Direct x=1, b=0, p=0

 Format 4 e=1

 Appendix and Fig. 1.1 Example

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Figure 1.1

 Memory address
 00000
(0000 0000 0000 0000 0000)

 ~FFFFF (Byte)
(1111 1111 1111 1111 1111)

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1.3.2 SIC/XE Machine Architecture
 Instruction set
 Format 1, 2, 3, or 4
 Load and store registers (LDB, STB, etc.)
 Floating-point arithmetic operations (ADDF, SUBF,
MULF, DIVF)
 Register-to-register arithmetic operations (ADDR, SUBR,
MULR, DIVR)
 A special supervisor call instruction (SVC) is provided,
executing this generates an interrput for OS.
 I/O
 1 byte at a time, TD, RD, and WD
 SIO, TIO, and HIO are used to start, test, and halt the
operation of I/O channels.
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1.3.3 SIC Programming Examples
 Sample data movement operations

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1.3.3 SIC Programming Examples

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1.3.3 SIC Programming Examples
 Sample arithmetic operations
 (ALPHA+INCR-1) assign to BETA (Fig. 1.3)
 (GAMMA+INCR-1) assign to DELTA

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1.3.3 SIC Programming Examples

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1.3.3 SIC Programming Examples
 String copy

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1.3.3 SIC Programming Examples

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1.3.3 SIC Programming Examples

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1.3.3 SIC Programming Examples

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1.3.3 SIC Programming Examples

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1.3.3 SIC Programming Examples

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1.3.3 SIC Programming Examples

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Traditional (CISC) Machines
 Complex Instruction Set Computers (CISC)
 complicated instruction set
 different instruction formats and lengths
 many different addressing modes
 e.g. VAX or PDP-11 from DEC
 e.g. Intel x86 family
 Reduced Instruction Set Computer (RISC)
 A reduced instruction set computer, or RISC (/rɪsk/), is a computer
with a small, highly optimized set of instructions, rather than the
more specialized set often found in other types of architecture, such
as in a complex instruction set computer (CISC).

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UltraSPARC Architecture
 UltraSPARC Architecture belongs to the SPARC
(Scalable Processor Architecture) family of processors. This
architecture is suitable for wide range of microcomputers and
supercomputers. UltraSPARC is example of RISC (Reduced
Instruction Set Computer).

UltraSPARC architecture:
Memory:
Memory consists of 8 bit-bytes. Two consecutive bytes form a
halfword, four bytes form a word, eight bytes form a doubleword.
UltraSPARC programs operates on Virtual Address
Space (264 bytes). Virtual Address Space is divided into pages and
these pages are stored in the physical memory or on disk.

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 Registers:
UltraSPARC architecture include a large file of registers that have
more than 100 general purpose registers. Any procedure can access
only 32 registers only. The SPARC hardware uses window into
registers file to manage all the operations of different procedures.

Data Formats : Integers are stored as 8-, 16-, 32-, or 64-bit Binary
numbers.
Characters are represented using 8-bit ASCII codes.
Floating points are represented using three different formats namely
single-precision format, double-precision format, quad-precision
format.

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RISC Machines
 RISC system
 instruction
 standard, fixed instruction format
 single-cycle execution of most instructions
 memory access is available only for load and store instruction
 other instructions are register-to-register operations
 a small number of machine instructions, and instruction format
 a large number of general-purpose registers
 a small number of addressing modes
 Three RISC machines
 SPARC family
 PowerPC family
 Cray T3E

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Basic Assembler Functions

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• The task of the assembler is to translate mnemonic
operation codes to their machine language equivalents.
• Assigning machine address to symbolic labels used by the
programmer.

Source Object
Program Assembler Code Linker

Executable
Code

Loader

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2.1 Basic Assembler Functions
 Assembler directives (pseudo-instructions)
 START – specify name and starting addr of program
 END – indicate the end of the source program and the
first executable instruction in the program.
 BYTE – Generate character or hexadecimal constant,
occupying many bytes as needed to represent the
constant.
 WORD- Generate one word integer constant
 RESB - Reserve the indicated number of bytes
 RESW – Reserve the indicated number of words
 These statements are not translated into machine
instructions.
 Instead, they provide instructions to the assembler itself.
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2.1 Basic Assembler Functions
 Data transfer (RD, WD)
 A buffer is used to store record
 Buffering is necessary for different I/O rates
 The end of each record is marked with a null character
(0016)
 Buffer length is 4096 Bytes
 The end of the file is indicated by a zero-length record
 Subroutines (JSUB, RSUB)
 RDREC, WRREC
 Save link (L) register first before nested jump

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2.1 Basic Assembler Functions
 Figure 2.1 shows an assembler language program
for SIC.
 The line numbers are for reference only.
 Indexing addressing is indicated by adding the modifier
“X”
 Lines beginning with “.” contain comments only.
 Reads records from input device (code F1)
 Copies them to output device (code 05)
 At the end of the file, writes EOF on the output device,
then RSUB to the operating system

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2.1.1 A simple SIC Assembler
 Figure 2.2 shows the generated object code for
each statement.
 Loc gives the machine address in Hex.
 Assume the program starting at address 1000.
 Translation functions
 Translate STL to 14.
 Translate RETADR to 1033.
 Build the machine instructions in the proper format (,X).
 Translate EOF to 454F46.
 Write the object program and assembly listing.

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2.1.1 A simple SIC Assembler
 Assembler’s Functions
 Convert mnemonic operation codes to their machine
language equivalents
 STL to 14
 Convert symbolic operands (referred label) to their
equivalent machine addresses
 RETADR to 1033
 Build the machine instructions in the proper format
 Convert the data constants to internal machine
representations
 Write the object program and the assembly listing

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2.1.1 A simple SIC Assembler
 Example of Instruction Assemble
 Forward reference
 STCH BUFFER, X

8 1 15
549039
opcode x address
m
(54)16 1 (001)2 (039)16

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2.1.1 A simple SIC Assembler
 Forward reference
 Reference to a label that is defined later in the program.

Loc Label OP Code Operand

1000 FIRST STL RETADR

1003 CLOOP JSUB RDREC

… … … …
1012 J CLOOP
… … … …
1033 RETADR RESW 1

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2.1.1 A simple SIC Assembler
 The functions of the two passes assembler.
 Pass 1 (define symbol)
 Assign addresses to all statements (generate LOC).
 Save the values (address) assigned to all labels for Pass
2.
 Perform some processing of assembler directives.
 Pass 2
 Assemble instructions.
 Generate data values defined by BYTE, WORD.
 Perform processing of assembler directives not done
during Pass 1.
 Write the OP (Fig. 2.3) and the assembly listing (Fig. 2.2).
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2.1.2 Assembler Algorithm & Data Structures
 Our simple assembler uses two internal data structures : The
OPTAB (operation code table )and SYMTAB (symbol table).
 OPTAB is used to look up mnemonic operation codes and translate
them to their machine language equivalents.
 LDA→00, STL→14, …
 SYMTAB is used to store values (addresses) assigned to labels.
 FIRST→1000, COPY→1000, …

 Location Counter LOCCTR

 LOCCTR is a variable for assignment addresses.
 LOCCTR is initialized to address specified in START.
 When reach a label in source program, the current value of LOCCTR
gives the address to be associated with that label.

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2.1.2 Assembler Algorithm & Data Structures
 The Operation Code Table (OPTAB)
 Contain the mnemonic operation & its machine
language equivalents (at least).
 Contain instruction format & length.
 During Pass 1, OPTAB is used to look up and validate
operation codes.
 During Pass 2, OPTAB is used to translate the operation
codes to machine language.
 In SIC/XE, assembler search OPTAB in Pass 1 to find
the instruction length for incrementing LOCCTR.
 Organized as a hash table, with mnemonic operation
code as the key (Static table).

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2.1.2 Assembler Algorithm & Data Structures
 The Symbol Table (SYMTAB)
 Include the name and value (address) for COPY 1000
FIRST 1000
each label. CLOOP 1003
 Include flags to indicate error conditions ENDFIL 1015
 Contain type, length. EOF 1024
THREE 102D
 Pass 1, labels are entered into SYMTAB, ZERO 1030
along with assigned addresses (from RETADR 1033
LOCCTR). LENGTH 1036
BUFFER 1039
 Pass 2, symbols used as operands are look RDREC 2039
up in SYMTAB to obtain the addresses.
 Organize as a hash table (static table).
 The entries are rarely deleted from table.

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2.1.2 Assembler Algorithm & Data Structures
 Pass 1 usually writes an intermediate file.
 Contain source statement together with its assigned
address, error indicators.
 This file is used as input to Pass 2.
 Figure 2.4 shows the two passes of assembler.
 Format with fields LABEL, OPCODE, and OPERAND.
 Denote numeric value with the prefix #.
#[OPERAND]

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SIC / XE Program
ABC = ALPHA * 10 – 50
 LDA #10 //ALPHA

 LDS #10 //S is a general purpose register.

 MULR S,A // Multiply Registers & Store Result in Accumulator

 LDT #50 // T is a general purpose register.

 SUBR T,A // Subtract Registers & Store Result in Accumulator

 STA ABC // Store Final Result in ABC

ABC RESW 1

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