Examination Questions

1. Describe the stages of the fetch-decode-execute cycle. 1 - Structure and function of the processor (AS / A Level) UNIT 1
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Specification Points / Learning Objectives: PGOnline text book page ref: 1-12
………………………………………………………………………………………………………………………………...... AS Level A Level Specification point description
1.1.1a 1.1.1a The arithmetic logic unit; ALU, Control Unit and Registers (Program Counter; PC, Accumulator; ACC, Memory Address Register;
MAR, Memory Data Register; MDR, Current Instruction Register; CIR). Busses: data, address and control: How this relates to
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1.1.1b 1.1.1b The fetch-decode-execute cycle, including its effect on registers
1.1.1c 1.1.1c The factors affecting the performance of CPU, clock speed, number of cores, cache
………………………………………………………………………………………………………………………………...... 1.1.1d The use of pipelining in a processors to improve efficiency
1.1.1d 1.1.1e Von Neumann, Harvard and contemporary processor architecture
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………………………………………………………………………………………………………………………………. [4] Expectations / Learning Outcomes:

 Terms 1-21 from your A Level Key Terminology PowerPoint should be included and underlined.
2. Increasing the number of cores affects the performance of the CPU. Explain why this increase in  You must include at least one diagram which depicts the fetch-decode-execute cycle.
performance is not linear.  You must include at least one diagram which shows the direction and connections of the 3 busses.
 You must include at least one diagram which illustrates how the various registers interact during a typical fetch-
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Grade TG. Breadth Depth Presentation Understanding
………………………………………………………………………………………………………………………………...... Quad Quad
A/A* LINK / FORMULATE
Create, Generate,
Core Core
ALL
Hypothesis, Reflect,
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Theorise, Consider
Dual Dual
3. State the purpose of the address bus.
B/C EXPLAIN / ANALYSE
Apply, Argue, Compare, Core Core
MOST
Contrast, Criticise,
Relate, Justify
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DESCRIBE / IDENTIFY Single Single
D/E Name, Follow Simple Core Core
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Procedure, Combine,
List, Outline

4. Name one register other than the PC found in the CPU and describe its purpose. U FEW
Very little depth of
understanding shown
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MY ASSESSMENT GRADE IN THIS TOPIC IS:
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How To Improve:
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5. Explain why the Little Man Computing (LMC) instructions BRA / BRP would cause the contents of the PC to
change.

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My Response Is: (Set yourself specific targets / objectives as to how you will achieve your HTI)

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