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Computer Organization and Architecture

This document outlines the evaluation, course objectives, contents, and textbook for the course "Computer Organizations and Architecture". The course is evaluated based on sessions, a final exam, and a practical component. The objectives are to understand computer system fundamentals and modern trends from a practical perspective. The contents cover topics like instruction set architecture, computer organization, CPU and memory design, I/O, and parallel processing. The textbook is listed as well as reference materials.

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Anil Marsani
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© © All Rights Reserved
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505 views

Computer Organization and Architecture

This document outlines the evaluation, course objectives, contents, and textbook for the course "Computer Organizations and Architecture". The course is evaluated based on sessions, a final exam, and a practical component. The objectives are to understand computer system fundamentals and modern trends from a practical perspective. The contents cover topics like instruction set architecture, computer organization, CPU and memory design, I/O, and parallel processing. The textbook is listed as well as reference materials.

Uploaded by

Anil Marsani
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Computer Organizations and Architecture (3-1-2)

Evaluation:
Theory Practical Total
Sessiona 30 20 50
l
Final 50 - 50
Total 80 20 100

Course Objectives:
Undergoing this course will help a student to build up a sound background in understanding
the fundamentals of organization of the Computer System and the associated components.
This course exposes a student to the modem trends and technology behind computer
organization in a practical perspective with examples taken from real world.

Course Contents:

1 Instruction Set Architecture. (2 hrs)


1.1 Levels of Programming Language
1.2 Language Category, Compiling and Assembling Programs
1.3 Assembly Language Instructions
1.4 Instruction Type, Data Types, Addressing Modes, Instruction Formats
1.5 Instruction Set Architecture Design

2 Computer Organization (6 hrs)


2.1 Basic Computer Organization
2.2 System Buses
2.3 Instruction Cycles
2.4 CPU Organization
2.5 Memory Sub-system Organization and Interfacing
2.6 I/O Sub-system Organization and interfacing

3 RTL and HDL (4 hrs)


3.1 Micro-Operations and RTL
3.2 Using RTL to specify a Digital System
3.3 Specification of Digital Component,
3.4 Specification and Implementation of Simple System.
3.5 Introduction to VHDL: Syntax, Levels of Abstraction in Design

4 CPU Design (7 hrs)


4.1 Specification of a CPU
4.2 Design and Implementation of a Very Simple and Relatively Simple CPU
4.3 Instruction Execution, Fetch, Decode, Data Path
4.4 ALU Design
4.5 Designing Hardwired Control Unit
4.6 Design Verification
5 Control Unit Design (4 hrs)
5.1 Basic Micro-sequencer (Control Unit) Design and Operations
5.2 Micro-instruction Formats
5.3 Design and Implementation of a Very Simple Micro-sequencer
5.4 Control Unit: Layout, Control Sequence Generation, Mapping Logic
5.5 Generation of Micro-Operations using Horizontal and Vertical Microcode
5.6 Directly Generating the Control Signals from the Microcode
5.7 Reducing tile Number of Micro-Instructions
5.8 Micro-programmed vs. Hardwired Control Unit

6 Arithmetic Unit (6 hrs)


6.1 Representations of Binary Number and Arithmetic in Unsigned Notation
6.2 Addition and Subtraction in Unsigned Notation
6.3 Multiplication in Unsigned Notation, Shift Add Multiplication Algorithm,
Booth’s Algorithm
6.4 Division in Unsigned Notation, Shift Subtract Division Algorithm
6.5 Signed Notation
6.6 Addition and Subtraction in Signed Notation
6.7 Binary Coded Decimal (BCD), BCD Numeric Format, BCD Addition
6.8 Specialized Arithmetic Hardware: Lookup ROM, Wallace Tree, Arithmetic
Pipeline
6.9 Floating Point Numbers, Numeric Format
6.10 IEEE 754 Floating Point Standard, Numeric Format

7 Memory Organization (4 hrs)


7.1 Hierarchical Memory System
7.2 Cache Memory: Associative Memory
7.3 Cache Mapping with Associative, Direct and Set-Associative Mapping
7.4 Replacing Data in Cache, Writing Data to the Cache, Cache Performance
Basics
7.5 Virtual Memory: Paging, Segmentation, and Memory Protection

8 Input /Output Organization (6 hrs)


8.1 Asynchronous Data Transfer
8.2 Modes of Asynchronous Data Transfer
8.3 Programmed I/O
8.4 Interrupts, Interrupts Driven Data Transfer. Types of Interrupts, Interrupts
Processing, Interrupt Hardware and Priority
8.5 Direct Memory Access (DMA), DMA Transfer Modes,I/O Processors
8.6 Serial Communication, UART
8.7 USB Standards

9 Introduction to RISC (3 hrs)


9.1 RISC Fundamentals, RISC Instruction Set
9.2 Instruction Pipeline, Register Windows and Renaming
9.3 Conflicts in Instruction Pipeline: Data Conflicts, Branch Conflicts
9.4 RISC vs. CISC
10 Introduction to Parallel Processing (3 hrs)
10.1 Parallelism in Uniprocessor System
10.2 Organization of Multi-Processor System: Flynn’s Taxonomy, System
Topologies, MIMD System Architectures
10.3 Communication in Multi-Processor Systems: Fixed Connections and
Reconfigurable Connections
10.4 Memory Organization in Multi-processor System: Shared Memory, Cache
Coherence

Laboratory
Develop a project or a case study report in the field of computer Organization. The faculty
concerned will provide the topic of the project work. Anoral presentationwith a
demonstration in case of project should be part of work with submission of report as a
component for evaluation.

Few topics of case study could be:


1. 8085/8086 Instruction Set Architecture
2. Internal Architecture of 8085/8086 Microprocessors
3. Micro-coded CPU in a Pentium Processor
4. Cache hierarchy in Itanium Processor
5. Addressing Modes in Power PC Processor
6. Parallel Processing abilities of Dual Core and Quad Core Processor
7. Advanced Features of Atom Processor
8. Systolic Arrays
9. Neural Networks

Text Book:
Carpineili, John D., Computer System Organization and Architecture, Addison
Wesley. Pearson Education Asia (LPE.), 2001

References:
1. Hayes, John P., McGraw-Hill, Third Edition, 1998
2. W.Stalling, and Architecture, Prentice Hall India Limited. New Delhi.
3. Tanebaum, A.S., Structured Computer Organization, Prentice Hall India Limited,
New Delhi, Fourth Edition, 1999

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