Lab Report
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lesh allanoLab Report
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lesh allanoKENYATTA UNIVERSITY
NAME : LESHAO ALLAN KISIRA
REG NO : J174/4614/2015
UNIT CODE : EEE305
UNIT NAME : DIGITAL ELECTRONICS
DEPT : ELECTRICAL AND ELECTRONIC
ENGINEERING
TASK : LAB REPORT ON COMMON
GATES
Objectives
1. Simplification of the given equation using Karnaugh map.
Given the equation Y=AB’ + A’CD + A’B’C + AB’CD’
2. Simulation of the digital circuit using Proteus software.
3. Implementation of the circuit on a bread board.
Apparatus and requirements
1. 2 input AND gate and 3 input AND gate
2. NOT gate(inverter) and 3 input NOR gate
3. Bread board and Cables
4. Proteus software installed in computer
Theoretical background
Boolean expression can be simplified or manipulated. Table below shows all the basic laws of
Boolean algebra. It helps to manipulate logic equations.
AND Form OR Form
IDENTITY LAW A.1 = A A+0 = A
ZERO AND ONE LAW A.0 = 0
INVERSE LAW A.A’=A A+A’=1
IDEMPOTENT LAW A.A = A A+A = A
COMMUTATIVE LAW A.B = B.A A+B = B+A
ASSOCIATIVE LAW A.(B.C) = (A.B).C A+(B+C) = (A+B) +C
DISTRIBUTIVE LAW A+(B.C) = (A+B).(A+C) A.(B+C) = (A.B) + (A.C)
ABSORPTION LAW A(A+B) = A A+A.B = AA+A’B= A+B
DEMORGAN’S LAW (A’B’) = A’+B’ (A’+B’) = A’.B’
DOUBLE COMPLEMENT LAW X’’ = x
A Karnaugh map provides a pictorial method of grouping together expressions with common
factors and therefore eliminating unwanted variables. The Karnaugh map can also be described
as a special arrangement of a truth table
Procedure
1. Simplify the equation
2. Fill truth table to represent the equation
3. Represent it on Karnaugh map
4. Simulate the equation on Proteus
5. Represent the equation on a bread board
Results and discussion
The simplified truth table is as follows:
INPUTS EQUATION OUTPUT
Dec value A B C D AB’CD’ A’B’C A’CD AB’ Y
0 0 0 0 0 0 0 0 0 0
1 0 0 0 1 0 0 0 0 0
2 0 0 1 0 0 1 0 0 1
3 0 0 1 1 0 1 1 0 1
4 0 1 0 0 0 0 0 0 0
5 0 1 0 1 0 0 0 0 0
6 0 1 1 0 0 0 0 0 0
7 0 1 1 1 0 0 1 0 1
8 1 0 0 0 0 0 0 1 1
9 1 0 0 1 0 0 0 1 1
10 1 0 1 0 1 0 0 1 1
11 1 0 1 1 0 0 0 1 1
12 1 1 0 0 0 0 0 0 0
13 1 1 0 1 0 0 0 0 0
14 1 1 1 0 0 0 0 0 0
15 1 1 1 1 0 0 0 0 0
The simplified Karnaugh map for the equation was as follows:
Y= AB’ + A’CD + B’C
1. Representation of the equation using Proteus
When Proteus was used to represent the above design, the following circuit was obtained.
When the inputs which in this case are zeros and ones were changed to match decimal zero to sixteen,
the LEDs went on at different inputs as shown in the table above where Y is the output
2. Representation of the equation on a bread board
Using the gates and inverters provided, the equation representation was done on the bread board. The
following figures show the circuit of the gates.
Conclusion
When the LEDs in Proteus were on, the output was one and when they were off, The output was zero.
Different inputs gave different outputs. This is shown in the truth table.
