MP1495

High Efficiency 3A, 16V, 500kHz

Synchronous Step Down Converter
The Future of Analog IC Technology

DESCRIPTION FEATURES
The MP1495 is a high-frequency, synchronous, • Wide 4.5V-to-16V Operating Input Range
rectified, step-down, switch-mode converter • 80mΩ/30mΩ Low RDS(ON) Internal Power
with built-in power MOSFETs. It offers a very MOSFETs
compact solution to achieve a 3A continuous • High-Efficiency Synchronous Mode
output current with excellent load and line Operation
regulation over a wide input supply range. The • Fixed 500kHz Switching Frequency
MP1495 has synchronous mode operation for • Synchronizes to a 200kHz to 2MHz External
higher efficiency over the output current load Clock
range. • AAM Power-Save Mode
Current-mode operation provides fast transient • Internal Soft-Start
response and eases loop stabilization. • OCP Protection and Hiccup
Full protection features include over-current • Thermal Shutdown
protection and thermal shut down. • Output Adjustable from 0.8V
• Available in an 8-pin TSOT-23 package
The MP1495 requires a minimal number of
readily-available standard external components, APPLICATIONS
and is available in a space-saving 8-pin • Notebook Systems and I/O Power
TSOT23 package. • Digital Set-Top Boxes
• Flat-Panel Television and Monitors
• Distributed Power Systems
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Quality Assurance. “MPS” and “The
Future of Analog IC Technology” are Registered Trademarks of Monolithic
Power Systems, Inc.

TYPICAL APPLICATION
Efficiency vs. Load Current
R4
4.5V-16V 10
VIN=12V, VOUT=3.3V, AAM=0.5V
2 5
VIN IN BST
100
C1
C4
22 MP1495 95
3 3.3V/2A
6 SW
EN/SYNC L1
90
EN/
C2
SYNC R1
7 R9 40.2k
47 85 VIN=12V VIN=5V
VCC 8 33k
C3 R3 FB
0.1 90.9k 80
1 R2
AAM
GND 13k
75 VIN=16V
R5 4
10k
70
0.01 0.1 1 10
LOAD CURRENT(A)

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 MP1495 – SYNCHRONOUS STEP-DOWN CONVERTER

ORDERING INFORMATION
Part Number* Package Top Marking
MP1495DJ TSOT-23-8 ACS

For Tape & Reel, add suffix –Z (e.g. MP1495DJ–Z);

For RoHS, compliant packaging, add suffix –LF (e.g. MP1495DJ–LF–Z).

PACKAGE REFERENCE

ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance

(5)
θJA θJC
VIN ..................................................-0.3V to 17V TSOT-23-8............................. 100 ..... 55... °C/W
VSW ......................................................................
Notes:
-0.3V (-5V for <10ns) to 17V (19V for <10ns) 1) Exceeding these ratings may damage the device.
VBS ......................................................... VSW+6V 2) About the details of EN pin’s ABS MAX rating, please refer to
All Other Pins ................................ -0.3V to 6V (2) Page 9, Enable/SYNC control section.
(3) 3) The maximum allowable power dissipation is a function of the
Continuous Power Dissipation (TA = +25°C) maximum junction temperature TJ (MAX), the junction-to-
........................................................... 1.25W ambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
Junction Temperature ...............................150°C any ambient temperature is calculated by PD (MAX) = (TJ
Lead Temperature ....................................260°C (MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
Storage Temperature................. -65°C to 150°C regulator will go into thermal shutdown. Internal thermal
(4) shutdown circuitry protects the device from permanent
Recommended Operating Conditions damage.
Supply Voltage VIN ...........................4.5V to 16V 4) The device is not guaranteed to function outside of its
operating conditions.
Output Voltage VOUT ................ 0.8V to VIN*DMAX 5) Measured on JESD51-7, 4-layer PCB.
Operating Junction Temp. (TJ). -40°C to +125°C

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ELECTRICAL CHARACTERISTICS (6)

VIN = 12V, TA = 25°C, unless otherwise noted.
Parameter Symbol Condition Min Typ Max Units
Supply Current (Shutdown) IIN VEN = 0V 1 μA
Supply Current (Quiescent) Iq VEN = 2V, VFB = 1V, AAM=0.5V 0.5 1 mA
HS Switch-ON Resistance HSRDS-ON VBST-SW=5V 80 mΩ
LS Switch-ON Resistance LSRDS-ON VCC =5V 30 mΩ
Switch Leakage SWLKG VEN = 0V, VSW =12V 1 μA
Current Limit (6) ILIMIT Under 40% Duty Cycle 4.2 5 A
Oscillator Frequency fSW VFB=0.75V 440 500 580 kHz
Fold-Back Frequency fFB VFB<400mV 0.25 fSW
Maximum Duty Cycle DMAX VFB=700mV 90 95 %
Minimum ON Time(6) tON_MIN 60 ns
Sync Frequency Range fSYNC 0.2 2 MHz
TA =25°C 791 807 823
Feedback Voltage VFB mV
-40°C<TA<85°C (7) 787 807 827
Feedback Current IFB VFB=820mV 10 50 nA
EN Rising Threshold VEN_RISING 1.2 1.4 1.6 V
EN Falling Threshold VEN_FALLING 1.1 1.25 1.4 V
VEN=2V 2 μA
EN Input Current IEN
VEN=0 0 μA
EN Turn-Off Delay ENtd-off 8 μs
VIN Under-Voltage Lockout
INUVVth 3.7 3.9 4.1 V
Threshold-Rising
VIN Under-Voltage Lockout
INUVHYS 650 mV
Threshold-Hysteresis
VCC Regulator VCC 5 V
VCC Load Regulation ICC=5mA 3 %
Soft-Start Period tSS 1.5 ms
Thermal Shutdown (6) 150 °C
Thermal Hysteresis (6) 20 °C
Notes:
6) Guaranteed by design.
7) Not tested in production and guaranteed by over temperature correlation.

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TYPICAL PERFORMANCE CHARACTERISTICS

Performance waveforms are tested on the evaluation board of the Design Example section.
VIN = 12V, VOUT = 3.3V, AAM=0.5V, TA = 25°C, unless otherwise noted.

Load Regulation
VIN=4.5V-16V, IOUT=0-2A

100 100 0.20

0.15
95 95 VIN=12V
VIN=5V
0.10
90 VIN=12V 90
VIN=5V 0.05 VIN=16V
85 VIN=16V 85 0.00
VIN=12V
-0.05 VIN=4.5V
80 80 VIN=16V
-0.10
75 75
-0.15

70 70 -0.20
0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3
LOAD CURRENT(A) LOAD CURRENT(A) OUTPUT CURRENT(A)

Line Regulation Peak Current vs. Duty Disabled Supply Current

VIN=5-16V Cycle vs. Input Voltage
VIN=6-16V, IOUT=0A
1.0 5.9 50
0.8 IOUT=0A 40
0.6 5.5
INPUT CURRENT(nA) 30
PEAK CURRENT(A)

0.4
5.1
0.2 IOUT=1.5A 20
0.0 4.7 10
-0.2
0
-0.4 IOUT=3A 4.3
-10
-0.6
3.9
-0.8 -20
-1.0 3.5 -30
4 6 8 10 12 14 16 10 20 30 40 50 60 70 4 6 8 10 12 14 16 18
INPUT VOLTAGE(V) INPUT VOLTAGE(V)

Enabled Supply Current Case Temperature Rise

vs. Input Voltage vs. Output Current
VIN=6-16V, IOUT=0A IOUT=0-3A
540 30
535
25
530
20
525
520 15
515
10
510
5
505
500 0
4 6 8 10 12 14 16 18 0 0.5 1 1.5 2 2.5 3
INPUT VOLTAGE(V) OUTPUT CURRENT(A)

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TYPICAL PERFORMANCE CHARACTERISTICS (continued)

Performance waveforms are tested on the evaluation board of the Design Example section.
VIN = 12V, VOUT = 3.3V, AAM=0.5V, TA = 25°C, unless otherwise noted.

Start up through Input Shutdown through Input

Voltage Voltage
IOUT=0A IOUT=0A

VEN VEN
VOUT/AC 5V/div. 5V/div.
100mV/div.

VOUT VOUT
2V/div. 2V/div.

VSW VSW
5V/div. 5V/div.
IOUT I-inductor I-inductor
1A/div. 2A/div. 2A/div.

Start up through Input Shutdown through Input Startup through Enable

Voltage Voltage IOUT=0A
IOUT=3A IOUT=3A

VEN
5V/div.
VEN VEN
5V/div. 5V/div. VOUT
2V/div.
VOUT VOUT
2V/div. 2V/div.

VSW VSW VSW

5V/div. 5V/div. 5V/div.
I-inductor
I-inductor I-inductor
2A/div.
2A/div. 2A/div.

Shuthdown through Enable Startup through Enable Shutdown through Enable

IOUT=0A IOUT=3A IOUT=3A

VEN VEN VEN

5V/div. 5V/div. 5V/div.

VOUT VOUT VOUT

2V/div. 2V/div. 2V/div.

VSW VSW
VSW
5V/div. 5V/div.
5V/div.
I-inductor
2A/div. I-inductor I-inductor
2A/div. 2A/div.

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 MP1495 – SYNCHRONOUS STEP-DOWN CONVERTER

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

Performance waveforms are tested on the evaluation board of the Design Example section.
VIN = 12V, VOUT = 3.3V, AAM=0.5V, TA = 25°C, unless otherwise noted.

Input / Output Ripple Short Circuit Entry Short Circuit Recovery

IOUT=3A IOUT=0A IOUT=0A

VIN/AC
200mV/div.
VOUT VOUT
2V/div. 2V/div.
VOUT/AC
20mV/div.

VSW VSW
5V/div. 5V/div.
VSW
10V/div.
I-inductor I-inductor
5A/div. 5A/div.
I-inductor
2A/div.

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 MP1495 – SYNCHRONOUS STEP-DOWN CONVERTER

PIN FUNCTIONS
Package
Name Description
Pin #
Advanced Asynchronous Modulation. Connect the tap of 2 resistor dividers to force the
1 AAM MP1495 into non-synchronous mode under light loads. Drive AAM pin high (VCC) to
force the MP1495 into CCM.
Supply Voltage. The MP1495 operates from a 4.5V to 16V input rail. Requires C1 to
2 IN
decouple the input rail. Connect using a wide PCB trace.
3 SW Switch Output. Connect using a wide PCB trace.
System Ground. This pin is the reference ground of the regulated output voltage, and
4 GND PCB layout requires special care. For best results, connect to GND with copper traces
and vias.
Bootstrap. Requires a capacitor connected between SW and BST pins to form a floating
5 BST supply across the high-side switch driver. A 10Ω resistor placed between SW and BST
cap is strongly recommended to reduce SW spike voltage.
Enable/Synchronize. EN high to enable the MP1495. Apply an external clock to the EN
6 EN/SYNC
pin to change the switching frequency.
Bias Supply. Decouple with 0.1μF-to-0.22μF capacitor. Select a capacitor that does not
7 VCC
exceed 0.22μF. VCC capacitor should be put closely to VCC pin and GND pin.
Feedback. Connect to the tap of an external resistor divider from the output to GND, to
set the output voltage. The frequency fold-back comparator lowers the oscillator
8 FB
frequency when the FB voltage is below 400mV to prevent current limit runaway during a
short-circuit fault condition.

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BLOCK DIAGRAM

Figure 1: Functional Block Diagram

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OPERATION
The MP1495 is a high-frequency, synchronous, For example, with 12V connected to VIN,
rectified, step-down, switch-mode converter RPULLUP ≥ (12V – 6.5V) ÷ 100µA = 55kΩ.
with built-in power MOSFETs. It offers a very
Connecting the EN pin is directly to a voltage
compact solution to achieve 3A continuous
source without any pullup resistor requires
output current with excellent load and line
limiting voltage amplitude to ≤ 6V to prevent
regulation over a wide input supply range.
damage to the Zener diode.
The MP1495 operates in a fixed-frequency,
peak-current–control mode to regulate the
output voltage. An internal clock initiates a
PWM cycle. The integrated high-side power
MOSFET turns on and remains on until its
current reaches the value set by the COMP Figure 2: 6.5V-type Zener Diode
voltage. When the power switch is off, it Connect an external clock with a range of
remains off until the next clock cycle starts. If 200kHz to 2MHz 2ms after output voltage is set
the current in the power MOSFET does not to synchronize the internal clock rising edge to
reach the current value set by COMP within the external clock rising edge. The pulse width
95% of one PWM period, the power MOSFET of external clock signal should be less than
will be forced to turn off. 1.7μs.
Internal Regulator Under-Voltage Lockout
The 5V internal regulator power most of the Under-voltage lockout (UVLO) protects the chip
internal circuitries. This regulator takes the VIN from operating at an insufficient supply voltage.
input and operates in the full VIN range: When The MP1495 UVLO comparator monitors the
VIN exceeds 5.0V, the output of the regulator is output voltage of the internal regulator, VCC.
in full regulation; when VIN falls below 5.0V, the The UVLO rising threshold is about 3.9V while
output decreases and requires a 0.1µF its falling threshold is 3.25V.
decoupling ceramic capacitor.
Internal Soft-Start
Error Amplifier The soft-start prevents the converter output
The error amplifier compares the FB pin voltage voltage from overshooting during startup. When
against the internal 0.8V reference (REF) and the chip starts, the internal circuitry generates a
outputs a COMP voltage—this COMP voltage soft-start voltage (SS) that ramps up from 0V to
controls the power MOSFET current. The 1.2V. When SS is lower than REF, SS
optimized internal compensation network overrides REF so the error amplifier uses SS as
minimizes the external component count and the reference. When SS exceeds REF, the
simplifies the control loop design. error amplifier uses REF as the reference. The
Enable/SYNC control SS time is internally set to 1.5ms.
EN/Sync is a digital control pin that turns the Over-Current Protection and Hiccup
regulator on and off: Drive EN high to turn on The MP1495 has cycle-by-cycle over current
the regulator, drive it low to turn it off. An limit for when the inductor current peak value
internal 1MΩ resistor from EN/Sync to GND exceeds the set current limit threshold. If the
allows EN/Sync to be floated to shut down the output voltage starts to drop until FB is below
chip. the Under-Voltage (UV) threshold—typically
The EN pin is clamped internally using a 6.7V 50% below the reference—the MP1495 enters
series Zener diode, as shown in Figure 2. hiccup mode to periodically restart the part.
Connect the EN input pin through a pullup
resistor to any voltage connected to the VIN
pin—the pullup resistor limits the EN input
current to less than 100µA.

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This protection mode is especially useful when

the output is dead-shorted to ground. The
average short-circuit current is greatly reduced
to alleviate the thermal issue and to protect the
regulator. The MP1495 exits the hiccup mode
once the over-current condition is removed.
Thermal Shutdown
Thermal shutdown prevents the chip from
operating at exceedingly high temperatures.
When the silicon die temperature exceeds
150°C, it shuts down the whole chip. When the
temperature drops below its lower threshold
(typically 130°C) the chip is enabled again.
Floating Driver and Bootstrap Charging
An external bootstrap capacitor powers the
floating power MOSFET driver. This floating
driver has its own UVLO protection, with a
rising threshold of 2.2V and hysteresis of
150mV. The bootstrap capacitor voltage is
regulated internally by VIN through D1, M1, C4,
L1 and C2 (Figure 3). If (VIN-VSW) exceeds 5V,
U1 regulates M1 to maintain a 5V BST voltage
across C4. A 10Ω resistor placed between SW and
BST cap is strongly recommended to reduce SW
spike voltage.

Figure 3: Internal Bootstrap Charging Circuit,

Startup and Shutdown
If both VIN and EN exceed their appropriate
thresholds, the chip starts: The reference block
starts first, generating stable reference voltage
and currents, and then the internal regulator is
enabled. The regulator provides stable supply
for the remaining circuitries.
Three events can shut down the chip: EN low,
VIN low, and thermal shutdown. In the shutdown
procedure, the signaling path is first blocked to
avoid any fault triggering. The COMP voltage
and the internal supply rail are then pulled down.
The floating driver is not subject to this
shutdown command.

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 MP1495 – SYNCHRONOUS STEP-DOWN CONVERTER

APPLICATION INFORMATION
Setting the Output Voltage Where ΔIL is the inductor ripple current.
The external resistor divider sets the output
Choose an inductor ripple current to be
voltage. The feedback resistor R1 also sets the
approximately 30% of the maximum load current.
feedback loop bandwidth with the internal
The maximum inductor peak current is:
compensation capacitor (see Typical Application
on page 1). Choose R1 around 40kΩ, then R2 is: ΔIL
IL(MAX) = ILOAD +
2
R1
R2 = Use a larger inductor for light-load conditions
VOUT
−1 (below 100mA) for improved efficiency.
0.807V Setting the AAM Voltage
Use the T-type network when VOUT is low, as The AAM voltage sets the transition point from
shown in Figure 4. AAM to CCM. Select a voltage that balances
efficiency, stability, ripple, and transient: A
8 RT R1 relatively low AAM voltage improves stability and
FB VOUT
ripple, but degrades transient and efficiency
R2 during AAM mode; a relatively high AAM voltage
improves the transient and efficiency during AAM,
but degrades stability and ripple.
Figure 4: T-Type Network
AAM voltage is set from the tap of a resistor
divider from the VCC (5V) pin, as shown in Figure
Table 1 lists the recommended T-type resistor 5.
value for common output voltages.
VCC(5V)
Table 1: Resistor Selection for Common Output
Voltages
VOUT (V) R1 (kΩ) R2 (kΩ) Rt (kΩ) R3
1.0 20.5(1%) 82(1%) 82(1%) AAM

1.2 30.1(1%) 60.4(1%) 82(1%) R4

1.8 40.2(1%) 32.4(1%) 56(1%)

2.5 40.2(1%) 19.1(1%) 33(1%)
Figure 5: AAM Network
3.3 40.2(1%) 13(1%) 33(1%) Generally, choose R4 to be around 10kΩ, then
5 40.2(1%) 7.68(1%) 33(1%) R3 is:
Selecting the Inductor ⎛ VCC ⎞
R3 = R4⎜ − 1⎟
For most applications, use a 1µH-to-10µH ⎝ AAM ⎠
inductor with a DC current rating that is at least
25% percent higher than the maximum load
current. Select an inductor with a DC resistance
less than 15mΩ for highest efficiency. For most
designs, the inductance value can be derived
from the following equation.
VOUT × (VIN − VOUT )
L1 =
VIN × ΔIL × fOSC

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0.8 possible. When using ceramic capacitors, make

VOUT=3.3V sure that they have enough capacitance to
0.7 VOUT=2.5V
VOUT=5V provide sufficient charge to prevent excessive
0.6
voltage ripple at the input. The input voltage
0.5 ripple caused by capacitance can be estimated
AAM(V)

0.4
by:
VOUT=1.8V ILOAD V ⎛ V ⎞
0.3 ΔVIN = × OUT × ⎜ 1 − OUT ⎟
fS × C1 VIN ⎝ VIN ⎠
0.2 VOUT=1.05V
Selecting the Output Capacitor
0.1
0 2 4 6 8 10 12 The output capacitor (C2) maintains the DC
output voltage. Use ceramic, tantalum, or low-
Figure 6: AAM Selection for Common Output ESR electrolytic capacitors. For best results, use
Voltages (VIN=4.5V to 16V) low-ESR capacitors to keep the output voltage
ripple low. The output voltage ripple can be
Selecting the Input Capacitor estimated by:
The input current to the step-down converter is
discontinuous and therefore requires a capacitor to VOUT ⎛ VOUT ⎞ ⎛ 1 ⎞
ΔVOUT = × ⎜1 − ⎟ × ⎜ RESR + ⎟
supply the AC current to the step-down converter fS × L1 ⎝ VIN ⎠ ⎝ 8 × fS × C2 ⎠
while maintaining the DC input voltage. Use low-ESR
capacitors for the best performance. For best results, Where L1 is the inductor value and RESR is the
use ceramic capacitors with X5R or X7R equivalent series resistance (ESR) value of the
dielectrics because of their low ESR and small output capacitor.
temperature coefficients. Use a 22µF capacitor For ceramic capacitors, the capacitance
for most applications. dominates the impedance at the switching
C1 requires an adequate ripple current rating since it frequency, and thus causes the majority of the
absorbs the input switching current. Estimate the output voltage ripple. For simplification, the
RMS current in the input capacitor with: output voltage ripple can be estimated by:
VOUT ⎛ V ⎞
VOUT ⎛⎜ VOUT ⎞ ΔVOUT = × ⎜ 1 − OUT ⎟
I C1 = ILOAD × × 1− ⎟
8 × fS × L1 × C2 ⎝
2
VIN ⎠
VIN ⎜⎝ VIN ⎟
⎠

The worst case condition occurs at VIN = 2VOUT, For tantalum or electrolytic capacitors, the ESR
where: dominates the impedance at the switching
frequency. For simplification, the output ripple
ILOAD can be approximated to:
IC1 =
2
VOUT ⎛ V ⎞
ΔVOUT = × ⎜ 1 − OUT ⎟ × RESR
For simplification, choose an input capacitor fS × L1 ⎝ VIN ⎠
whose RMS current rating greater than half of the
maximum load current. The characteristics of the output capacitor also
affect the stability of the regulation system. The
The input capacitor can be electrolytic, tantalum MP1495 can be optimized for a wide range of
or ceramic. When using electrolytic or tantalum capacitance and ESR values.
capacitors, place a small, high-quality ceramic
capacitor (e.g. 0.1μF) as close to the IC as

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External Bootstrap Diode

An external bootstrap diode may enhance the GND C3

regulator efficiency under the following

R1
R3 C4
conditions: SW
C6
z VOUT is 5V or 3.3V; and

R2

R9

R4
VOUT

5
z Duty cycle is high: D= >65%
VIN

R8

C5
R7
Connect the BST diode from the VCC pin to the

4
BST pin, as shown in Figure 7. R6 R5
C1
L1
External BST Diode
C1A
IN4148
BST VCC
CBST
MP1495
Vin
SW
L
COUT C2 Vout
C2A
GND
Figure 7: Optional External Bootstrap Diode for
Enhanced Efficiency
The recommended external BST diode is
IN4148, and the BST capacitor is 0.1 µF to 1μF.
PC Board Layout (8)
PCB layout is very important to achieve stable GND
operation especially for VCC capacitor and
input capacitor placement. For best results,
VCC
follow these guidelines:
EN/SYNC
1) Use large ground plane directly connect to BST

GND pin. Add vias near the GND pin if bottom

layer is ground plane.
SW
2) Place the VCC capacitor to VCC pin and
GND pin as close as possible. Make the trace
length of VCC pin-VCC capacitor anode-VCC
capacitor cathode-chip GND pin as short as
possible.
3) Place the ceramic input capacitor close to IN
and GND pins. Keep the connection of input
capacitor and IN pin as short and wide as
GND
possible.
4) Route SW, BST away from sensitive analog
areas such as FB. It’s not recommended to
route SW, BST trace under chip’s bottom side.
5) Place the T-type feedback resistor R9 close
to chip to ensure the trace which connects to
FB pin as short as possible
Notes:
8) The recommended layout is based on the Figure 8 Typical
Application circuit on the next page.

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TYPICAL APPLICATION CIRCUITS

U1
R4
2 5 10
IN BST
C1A
NS
7
VCC
MP1495 3.3V
R7 3
90.9k SW
1 C3
AAM
R8 C5 R1 15pF
10k 1nF 40.2k R3
R5
28.7k R9 0
6 33k
EN/SYNC FB 8
R2
R6 13k
11k GND
4

Figure 8: 12VIN, 3.3V/3A

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 MP1495 – SYNCHRONOUS STEP-DOWN CONVERTER

PACKAGE INFORMATION
TSOT23-8

NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.

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© 2016 MPS. All Rights Reserved.