32-BIT ARM CORTEX-M3 LPC1768 MICROCONTROLLER BLOCK
DIAGRAM
FEATURES OF 32-BIT ARM CORTEX-M3 LPC1768
MICROCONTROLLER
ARM Cortex-M3 processor, running at frequencies of up to 100 MHz. A
Memory Protection Unit (MPU) supporting eight regions is included.
ARM Cortex-M3 has built-in Nested Vectored Interrupt Controller
(NVIC).
Up to 512 kB on-chip flash programming memory. Enhanced flash
memory accelerator enables high-speed 100 MHz operation with zero
wait states.
In-System Programming (ISP) and In-Application Programming (IAP)
via on-chip bootloader software.
On-chip SRAM includes:
32/16 kB of SRAM on the CPU with local code/data bus for high-
performance CPU access.
Two/one 16 kB SRAM blocks with separate access paths for
higher throughput.
Eight channel General Purpose DMA controller (GPDMA) on the AHB
multilayer matrix.
USB 2.0 full-speed device/Host/OTG controller with dedicated DMA
controller and on-chip PHY for device, Host, and OTG functions.
Four UARTs with fractional baud rate generation, internal FIFO, DMA
support, and RS-485 support.
One UART has modem control I/O, and one UART has IrDA
support.
CAN 2.0B controller with two channels.
70 General Purpose I/O (GPIO) pins with configurable pull-up/down
resistors and a new, configurable open-drain operating mode.
Four general purpose timers/counters, with a total of eight capture
inputs and ten compare outputs. Each timer block has an external
count input and DMA support.
One motor control PWM with support for three-phase motor control.
FEATURES OF 32-BIT ARM CORTEX-M3 LPC1768
MICROCONTROLLER
Standard JTAG test/debug interface for compatibility with existing
tools.
Emulation trace module enables non-intrusive, high-speed real-time
tracing of instruction execution.
Integrated PMU (Power Management Unit) automatically adjusts
internal regulators to minimize power consumption during Sleep, Deep
sleep, Power-down, and Deep power-down modes.
Four reduced power modes: Sleep, Deep-sleep, Power-down, and Deep
power-down.
Single 3.3 V power supply (2.4 V to 3.6 V).
Four external interrupt inputs configurable as edge/level sensitive. All
pins on PORT0 and PORT2 can be used as edge sensitive interrupt
sources.
Non-maskable Interrupt (NMI) input.
Clock output function that can reflect the main oscillator clock, IRC
clock, RTC clock, CPU clock, and the USB clock.
The Wakeup Interrupt Controller (WIC) allows the CPU to automatically
wake up from any priority interrupt that can occur while the clocks are
stopped in deep sleep, Power-down, and Deep power-down modes.
USB PLL for added flexibility.
Available as 100-pin LQFP package (14 × 14 × 1.4 mm).
APPLICATIONS:
EMetering
Lighting
Industrial networking
Alarm systems
White goods
Motor control
Pin configuration LQFP100 package