NIF9N05CL
Protected Power MOSFET
2.6 A, 52 V, N−Channel, Logic Level,
Clamped MOSFET w/ ESD Protection
in a SOT−223 Package
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Benefits
• High Energy Capability for Inductive Loads VDSS
• Low Switching Noise Generation (Clamped)
RDS(ON) TYP ID MAX
52 V 107 mΩ 2.6 A
Features
• Diode Clamp Between Gate and Source
• ESD Protection − HBM 5000 V
Drain
(Pins 2, 4)
• Active Over−Voltage Gate to Drain Clamp
• Scalable to Lower or Higher RDS(on)
MPWR
• Internal Series Gate Resistance Gate
Overvoltage
Protection
(Pin 1) RG
Applications
• Automotive and Industrial Markets:
ESD Protection
Solenoid Drivers, Lamp Drivers, Small Motor Drivers
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating Symbol Value Unit Source
(Pin 3)
Drain−to−Source Voltage Internally Clamped VDSS 52−59 V
Gate−to−Source Voltage − Continuous VGS ±15 V
Drain Current − Continuous @ TA = 25°C ID 2.6 A
− Single Pulse (tp = 10 s) (Note 1) IDM 10
SOT−223
Total Power Dissipation @ TA = 25°C (Note 1) PD 1.69 W CASE 318E
STYLE 3
Operating and Storage Temperature Range TJ, Tstg −55 to °C
150 MARKING DIAGRAM
1
Single Pulse Drain−to−Source EAS 110 mJ
GATE 4
Avalanche Energy (VDD = 50 V, ID(pk) = 1.17 A,
AWW
F9N05
2
VGS = 10 V, L = 160 mH, RG = 25 )
DRAIN DRAIN
Thermal Resistance °C/W 3
− Junction−to−Ambient (Note 1) RJA 74 SOURCE
− Junction−to−Ambient (Note 2) RJA 169
(Top View)
Maximum Lead Temperature for Soldering TL 260 °C
Purposes, 1/8″ from Case for 10 s F9N05 = Specific Device Code
Maximum ratings are those values beyond which device damage can occur. A = Assembly Location
Maximum ratings applied to the device are individual stress limit values (not WW = Work Week
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and ORDERING INFORMATION
reliability may be affected.
1. When surface mounted to an FR4 board using 1″ pad size, (Cu area 1.127 in2)
Device Package Shipping†
2. When surface mounted to an FR4 board using minimum recommended pad
size, (Cu area 0.412 in2)
NIF9N05CLT1 SOT−223 1000/Tape & Reel
NIF9N05CLT3 SOT−223 4000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Semiconductor Components Industries, LLC, 2004 1 Publication Order Number:
July, 2004 − Rev. 3 NIF9N05CL/D
NIF9N05CL
MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage (Note 3) V(BR)DSS
(VGS = 0 V, ID = 1.0 mA, TJ = 25°C) 52 55 59 V
(VGS = 0 V, ID = 1.0 mA, TJ = −40°C to 125°C) 50.8 54 59.5 V
Temperature Coefficient (Negative) −9.3 mV/°C
Zero Gate Voltage Drain Current IDSS A
(VDS = 40 V, VGS = 0 V) 10
(VDS = 40 V, VGS = 0 V, TJ = 125°C) 25
Gate−Body Leakage Current IGSS A
(VGS = ±8 V, VDS = 0 V) ±10
(VGS = ±14 V, VDS = 0 V) ±22
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage (Note 3) VGS(th)
(VDS = VGS, ID = 100 A) 1.3 1.75 2.5 V
Threshold Temperature Coefficient (Negative) −4.1 mV/°C
Static Drain−to−Source On−Resistance (Note 3) RDS(on) m
(VGS = 3.5 V, ID = 0.6 A) 190 380
(VGS = 4.0 V, ID = 1.5 A) 165 200
(VGS = 10 V, ID = 2.6 A) 107 125
Forward Transconductance (Note 3) (VDS = 15 V, ID = 2.6 A) gFS 3.8 Mhos
DYNAMIC CHARACTERISTICS
Input Capacitance Ciss 155 250 pF
Output Capacitance VDS = 35 V, VGS = 0 V, Coss 60 100
f = 10 kHz
Transfer Capacitance Crss 25 40
Input Capacitance Ciss 170 pF
Output Capacitance VDS = 25 V, VGS = 0 V, Coss 70
f = 10 kHz
Transfer Capacitance Crss 30
3. Pulse Test: Pulse Width ≤ 300 s, Duty Cycle ≤ 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
NIF9N05CL
MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time td(on) 275 465 ns
Rise Time VGS = 4.5 V, VDD = 40 V, tr 1418 2400
Turn−Off Delay Time ID = 2.6 A, RD = 15.4 td(off) 780 1320
Fall Time tf 1120 1900
Turn−On Delay Time td(on) 242 ns
Rise Time VGS = 4.5 V, VDD = 40 V, tr 1165
Turn−Off Delay Time ID = 1.0 A, RD = 40 td(off) 906
Fall Time tf 1273
Turn−On Delay Time td(on) 107 ns
Rise Time VGS = 10 V, VDD = 15 V, tr 290
Turn−Off Delay Time ID = 2.6 A, RD = 5.8 td(off) 1540
Fall Time tf 1000
Gate Charge QT 4.5 7.0 nC
VGS = 4.5 V, VDS = 40 V, Q1 0.9
ID = 2.6 A (Note 3)
Q2 2.6
Gate Charge QT 3.9 nC
VGS = 4.5 V, VDS = 15 V, Q1 1.0
ID = 1.5 A (Note 3)
Q2 1.7
SOURCE−DRAIN DIODE CHARACTERISTICS
Forward On−Voltage IS = 2.6 A, VGS = 0 V (Note 3) VSD 0.81 1.5 V
IS = 2.6 A, VGS = 0 V, TJ = 125°C 0.66
Reverse Recovery Time trr 730 ns
IS = 1.5 A, VGS = 0 V, ta 200
dIs/dt = 100 A/s (Note 3)
tb 530
Reverse Recovery Stored Charge QRR 6.3 C
ESD CHARACTERISTICS
Electro−Static Discharge Human Body Model (HBM) ESD 5000 V
Capability
Machine Model (MM) 500
3. Pulse Test: Pulse Width ≤ 300 s, Duty Cycle ≤ 2%.
4. Switching characteristics are independent of operating junction temperatures.
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NIF9N05CL
TYPICAL PERFORMANCE CURVES
6 6
VGS = 10, 5 & 4 V 3.8 V TJ = 25°C
VDS ≥ 10 V
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
3.6 V 5
4 4
3.4 V
3
3.2 V
TJ = −55°C
2 3V 2
2.8 V TJ = 25°C
2.6 V 1
2.4 V TJ = 100°C
0 0
0 1 2 3 4 5 6 7 8 9 10 1 2 3 4 5 6
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE ()
RDS(on), DRAIN−TO−SOURCE RESISTANCE ()
0.4 0.24
TJ = 25°C
ID = 2 A
TJ = 25°C
0.3 0.2
VGS = 4 V
0.2 0.16
0.1 0.12
VGS = 10 V
0 0.08
2 4 6 8 10 12 1 2 3 4 5 6
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Gate−to−Source Figure 4. On−Resistance vs. Drain Current and
Voltage Gate Voltage
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
1000000
1.9 ID = 2.6 A
VGS = 12 V
1.7
IDSS, LEAKAGE (A)
1.5 100000
1.3
TJ = 150°C
1.1
10000 TJ = 100°C
0.9
0.7
0.5 1000
−50 −25 0 25 50 75 100 125 150 30 35 40 45 50 55
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with Figure 6. Drain−to−Source Leakage Current
Temperature vs. Voltage
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NIF9N05CL
TYPICAL PERFORMANCE CURVES
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
5 50
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
500
Ciss TJ = 25°C QT
VDS
400 VDS = 0 V VGS = 0 V 4 40
C, CAPACITANCE (pF)
VGS
QGS QGD
300 Crss 3 30
200 2 20
Ciss
100 Coss 1 10
ID = 2.6 A
Crss TJ = 25°C
0 0 0
10 5 0 5 10 15 20 25 30 35 0 1 2 3 4 5
VGS VDS
QG, TOTAL GATE CHARGE (nC)
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 8. Gate−to−Source Voltage vs. Total
Figure 7. Capacitance Variation Gate Charge
100000 3
VDD = 40 V IS, SOURCE CURRENT (AMPS) VGS = 0 V
ID = 2.6 A TJ = 25°C
VGS = 10 V
10000
2
t, TIME (ns)
td(off)
tf
1000
tr
1
td(on)
100
10 0
1 10 100 0.5 0.6 0.7 0.8 0.9 1
RG, GATE RESISTANCE () VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistance Switching Time Variation Figure 10. Diode Forward Voltage vs. Current
vs. Gate Resistance
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NIF9N05CL
PACKAGE DIMENSIONS
SOT−223
CASE 318E−04
ISSUE K
A
F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
4
INCHES MILLIMETERS
S B DIM MIN MAX MIN MAX
1 2 3
A 0.249 0.263 6.30 6.70
B 0.130 0.145 3.30 3.70
C 0.060 0.068 1.50 1.75
D 0.024 0.035 0.60 0.89
D F 0.115 0.126 2.90 3.20
G 0.087 0.094 2.20 2.40
L
G H 0.0008 0.0040 0.020 0.100
J 0.009 0.014 0.24 0.35
J K 0.060 0.078 1.50 2.00
C L 0.033 0.041 0.85 1.05
M 0 10 0 10
0.08 (0003) M S 0.264 0.287 6.70 7.30
H
K
STYLE 3:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
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