EE2070
Digital Systems
Vinod Prasad
Professor, Electrical Engineering Dept.
IIT Palakkad
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General Information
Prof. Vinod Prasad
Email: [email protected]
Office: Transit campus (Placement building)
Phone: 04923226-419 / 513
Assessment
Test 1 - 20%
Test 2 - 20%
Final Exam - 60%
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General Information
Text Book:
Digital Design With an Introduction to the Verilog HDL, 5th
Edition, M. Morris Mano, Michael D. Cileti, Pearson Education
Reference Book:
Vahid Frank, Digital Design, Preview Edition, Wiley India Pvt
Ltd,
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Class timetable
SLOT SYSTEM – A for Semester IV courses
08.00-08.50 09.00-09.50 10.00-10.50 11.00-11.50 12.00-12.50 13.00-13.50 14.00-14.50 15.00-15.50 16.00-16.50 17.00-17.50
M
o G A B C D P1 E*
n
T
u F G A B C P2 H
e
W
e D E F G A Lunch Break H
d
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h B C D E F P3 G*
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F
r A B C D E P4 F*
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We will follow:
Monday: Slot A (9 am – 10 am)
Tuesday Slot P2 (2 pm – 4 pm)
Wednesday: Slot A (12 Noon – 1 pm)
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Objectives of the Course
Learn the fundamental building elements of digital
systems
Explore digital system design and analysis methods
Study the use of Verilog Hardware Description Language
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Course Contents
Introduction
Number systems and codes
Boolean algebra and logic gates
Gate-Level minimization
Combinational logic
Synchronous sequential logic
Registers and counters
Memory and programmable logic
Register transfer level (RTL)
Asynchronous sequential logic
State Machine Design
Memory and Programmable Logic Devices
Field Programmable Gate Arrays
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1. Introduction
Analog systems Digital systems
Weighing
Machine
Blood
Pressure
Monitor
Ammeter
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1. Introduction
Analog systems Digital systems
Process
control
systems
Radio
TV
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Advantages of Digital Systems over Analog Systems
- Greater flexibility: Digital systems can be programmed and
reprogrammed (reconfigured) to perform a variety of functions,
without modifying the hardware – This is one of the biggest
advantages of Digital systems.
Reconfiguration of analog systems usually necessitates
hardware redesign followed by testing and verification.
- Guaranteed accuracy: Determined by the number of bits
used (ADC and Digital Processor wordlengths).
Tolerances in analog circuit components make it extremely
difficult for the system designer to control the accuracy of
analog systems.
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Advantages of Digital Systems over Analog Systems
- Perfect reproducibility: No variation in performance due to
component tolerances.
- No drift in performance due to temperature or age.
- Easy storage: Digital signals can be easily stored in data
storage devices without loss of signal fidelity. Therefore, digital
signals are transportable and can be processed offline in a
computer/digital signal processor.
- Can we store analog signal/data?
- Cost: In many cases, digital implementation of signal
processing is cheaper than its analog counterpart (digital
10 hardware is cheaper, flexibility for modifications).
Limitations of Digital Systems
- Speed: The speed of operation of ADC (and DAC) and digital
signal processor may be insufficient for large bandwidth
signals.
Currently available fast ADCs (and DACs) either are too
expensive or do not have sufficient resolution for large
bandwidth signals (or consume too much power). Speed
limitation of Digital Processor is also a constraint.
- Finite wordlength problems: Finite wordlength in digital
signal processors will cause degradation in system
performance.
Question: As technology matures in future, will digital signal
processing completely replace analog signal processing?
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Introduction
Analog Analog
signal
Analog
signal
input System Output
Digital Digital
Digital
signal signal
input System Output
Building blocks (Components) of Analog systems:
Resistors, inductors, capacitors, transistors, Operational amplifiers, etc.
Building blocks of Digital systems:
Digital systems: Logic gates, latches, flip-flops, etc.
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Analog and Digital Signals
Analog signals:
continuous in time, continuous in amplitude
Discrete-time signals:
discrete in time, continuous in amplitude
Digital signals:
discrete in time, discrete in amplitude
13 Analog signal Digital signal
Analog to Digital Conversion
The analog to digital conversion involves two processes:
Sampling
conversion from continuous time, continuous
amplitude to discrete time, continuous amplitude.
Quantization
conversion from discrete time, continuous
amplitude to discrete time, discrete amplitude.
Sampled signal xs(t) is
obtained by sampling the
continuous signal x(t) at
a sampling rate of fs
samples per sec.
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Role of ADC and DAC in a typical Process Plant Control
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Analog to Digital Conversion
One of the most desirable properties is that the analog
signal reconstructed from the digital signal should look the
same as the original analog signal.
Analog signal Reconstructed Analog
Digital signal
signal
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Signal Sampling
How often (fast) should we sample a signal?
• How to choose sampling frequency
(rate).
How many data (samples) do we need to
take from the signal?
Sampling of Signal
Example 1:
Frequency of signal fSIG = 1 KHz (1 cycle in 1 msec)
Sampling frequency fS = 6 KHz (6 samples in 1 msec)
time
1 msec
Reconstructed signal frequency (Observed
frequency) = 1 KHz (OK)
Ratio: fS/fSIG = 6/1 = 6
Sampling of Signal (cont)
Example 2: (further reduced in samples per
cycle)
Frequency of signal fSIG = 2 KHz
• 2 cycles in 1 msec
Sampling frequency fS = 6 KHz
• 6 samples in 1 msec
time
1 msec
Observed frequency = 2 KHz (OK)
Ratio: fS/fSIG = 6/2 = 3
Sampling of Signal (cont)
Example 3:
Frequency of signal fSIG = 3 KHz
• (3 cycles in 1 msec)
Sampling frequency fS = 6 KHz
time
1 msec
Observed frequency = 3KHz (OK)
Ratio: fS/fSIG = 6/3 = 2
Sampling of Signal (cont)
Example 4:
Frequency of signal fSIG = 4 KHz (4 cycles in 1 msec)
Sampling frequency fS = 6 KHz (6 samples in 1 msec)
time
1 msec
Observed frequency = 2 KHz! (i.e. wrong; reconstructed
signal is different from the original signal aliasing
occurred). Ratio: fS/fSIG = 6/4 = 1.5
What should be the Minimum Sampling
Frequency?
Example 5: (Example 3 where fS/fSIG = 2)
Frequency of signal fSIG = 3 KHz (3 cycles in 1 msec)
Sampling frequency fS = 6 KHz (6 samples in 1 msec)
time
1 msec
Observed frequency = 3KHz i.e. correct freq
(Ratio: fS/fSIG = 6/3 = 2)
Minimum Sampling Frequency (cont)
Example 6:
Frequency of signal fSIG = 3 KHz (3 cycles in 1 msec)
Sampling frequency fS = 6 KHz (6 samples in 1 msec)
Ratio: fS/fSIG = 6/3 = 2
time
1 msec
Observed frequency = 3KHz
i.e. correct frequency but wrong amplitude & phase
because sampling is not done in phase with signal.
In this case, it is safer to fix fS/fSIG slightly larger than 2.
Minimum Sampling Frequency - critically sampled
Example 7:
Frequency of signal fSIG = 3 KHz
Sampling frequency fS = 6 KHz
time
1 msec
Observed frequency = 0Hz!
Ratio: fS/fSIG = 6/3 = 2
Nyquist-Shannon Sampling Theorem
Harry Nyquist (1889-1976, Engineer @ Bell Labs) and
Claude Shannon (1916-2001, Engineer @ Bell Labs)
Shannon’s Mouse ("Theseus“) - First Artificial
Intelligence Device (1950) !
Maze navigation: Magnetic mouse whose
movement controlled by electromechanical relay
circuit.
The mouse was designed to search through the
corridors until it found the target.
The mouse could be placed anywhere it had been
before, and because of its prior experience it
could go directly to the target.
If placed in unfamiliar territory, it was programmed
to search until it reached a known location and
then it would proceed to the target, adding the
new knowledge to its memory and learning new
behaviour.
Sampling Theorem
A bandlimited continuous-time signal, with highest
frequency (bandwidth) Fmax, can be uniquely
reconstructed from its samples provided that the
sampling rate Fs ≥ 2 Fmax.
Sampling frequency must be
• At least twice the signal bandwidth:
FS ≥ 2Fmax
i.e. Signal bandwidth must be
• less than half the sampling frequency:
Fmax ≤ ½ FS
Nyquist Frequency
Nyquist Frequency
• highest frequency of a signal that can be sampled
properly (without causing aliasing), i.e., Fmax.
• equal to half the sampling frequency, i.e., Fs / 2.
Nyquist Rate
• The minimum sampling rate required to avoid aliasing of
signal, i.e., Fs.
• i.e. Nyquist rate is twice the highest frequency of the
signal, Fs = 2 Fmax.
• A signal is
• under-sampled if sampled below the Nyquist rate
• critically sampled if sampled at Nyquist rate
• over-sampled if sampled higher than the Nyquist rate
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Aliasing occurs if sampling theorem is not
satisfied
• An aliased signal provides a poor representation of the
analog signal.
• Aliasing is an effect that causes different signals to
become indistinguishable (or aliases of one another)
when sampled.
• Aliasing causes false frequency (or even amplitude &
phase) component to appear in the reconstructed signal.
• It is not possible to reconstruct the original signal from
the signal samples once aliasing occurs.
Practical Sampling rates
• Signal bandwidth refers to the difference between
the highest frequency in the signal and the lowest
frequency in the signal.
• If the lowest frequency is zero, then the signal’s
bandwidth is equal to the highest frequency.
Signal Quantization
Conversion from discrete time, continuous amplitude to
discrete time, discrete amplitude.
When an analog signal is converted into digital form
• Quantization of signal into multilevel signals
• loss of signal resolution
Example:
A 3-bit Analog-to-Digital Converter
• input voltage range: 0 to 10V
• i.e. infinite values (in between 0V to10V range)
• output:
• possible output values: 0, 1, 2 ….. 7
• i.e. only 23 = 8 values
Quantizing and Encoding
• Approximates a continuous range of values and
replaces it with a binary number
• Error is introduced between input voltage and
output binary representation
• Error depends on the resolution of the ADC
Increase in resolution improves the accuracy of the conversion
Minimum voltage step recognized by ADC
Analog Signal Digitized Signal- High Digitized Signal- Low
Resolution Resolution
Quantization Size
111
?
110
101
100
011
010
001 Q = 1.25V
INPUT (Analog)
000
0V 1.25V 2.5V 3.75V 5.0V 6.25V 7.50 8.25V
10V
Quantization Step-Size (Quantum) Q
• the input voltage range for which its digital o/p value remains the
same
determines the uncertainty (error) in the actual input analog
value
• Q = FS/2n (where ‘FS’ is the full-scale value and ‘n’ is number of
bits).
Quantization Error
The quantization
error, eq, is bounded
by half of the step-
size, that is,
where Δ is the
quantization step-
size, or the ADC
resolution in volts
(also referred as
Vmin, minimum
detectable voltage)
or the LSB value of
the ADC.
Resolution of ADC
Can be expressed/described in terms of
• number of bits (n) of ADC
e.g. 8-bit, 10-bit
• actual Quantization step-size Q = FS/2n
where FS = Full Scale input
e.g. 1.25V (for a 0V-10V, 3-bit ADC)
2.44mV (for a ±5V, 12-bit ADC)
Since FS/2n = Least Significant Bit size
• Q is also described as 1 LSB
e.g. Error = ±½ Q = ±½LSB
Note:1 LSB error for 8-bit ADC = 1/28 ≡ 0.4%!
Note:1 LSB error for 16-bit ADC = 1/216 ≡ 0.002%
Digitized-quantized signal bit rate
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Binary valued digital signal
Binary signal ‐‐ only two possible values
Usually represented as logic values 0 and 1.
Logic value 0 0 volts (High)
Logic value 1 +5 volts (Low)
These voltages may differ, depending on the
hardware used to implement.
A ‘binary digit’ is called a ‘bit’
Sometimes, Logic 1 is denoted as True and logic
value 0 is denoted as False
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Binary logic
Consists of binary variables (that take on two
discrete values, 0 or 1) and a set of logical
operations.
Basic logical operations: AND, OR, and NOT
Logical
operations
listed in a
compact form
called Truth
Tables
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Binary logic
Binary Logic should not be confused with
Binary Arithmetic
Binary logic on a single bit logic variable 1
or 0
Binary arithmetic on a multibit arithmetic
variable (a number)
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Components of digital systems
Logic gates, flip flops, latches, etc. Inputs
and outputs of these hardware components
are logic values 0 and 1. These components
consists of basic components such as
transistors, diodes, resistors, capacitors etc.
Digital systems implement Boolean functions
Logic design -- digital system design
Basic component in digital circuits - Transistor
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