EEE 4308L Electronics I Laboratory

Laboratory #1

Operational Amplifier-Based Integrators

Sample Report

Name(s): _________________
_________________

10 September 2009
OBJECTIVES:

This lab will investigate the characteristics of an operational amplifier (op-amp)

integrator circuit. Design goals (input resistance and gain) will be used to determine
component values for the circuit. The circuit will then be constructed and its
performance compared with theoretical calculations and computer simulations.

INTRODUCTION:

Integrated circuit (IC) op-amps can be used as building blocks to design circuits. The op-
amp is a two-input device that amplifies the difference between the two input signals.
Characteristics of the ideal op-amp include:

1) Infinite open-loop gain

2) Infinite input impedance
3) Zero output impedance
4) Zero common-mode gain
5) Infinite bandwidth

Luckily, physical devices behave much like the ideal model. This allows the ideal model
to be used for analysis, with only small errors expected when the circuit is physically
implemented.

While the ideal open-loop gain is infinite, the op-amp is commonly configured with
negative feedback to produce linear amplifiers with finite gain. This is accomplished by
connecting a feedback resistor (or complex impedance) between the output terminal and
the inverting input. Negative feedback is used to produce basic inverting and non-
inverting amplifier configurations. The inverting amplifier arrangement, shown in Figure
1-1, is the basis of the integrator circuit discussed in this lab.

Rf

Vin _
Rin
Vout
+

Figure 1-1: Op-Amp Inverting Amplifier

The feedback resistor Rf closes the feedback loop. Closed-loop gain of the inverting
amplifier is the ratio of the feedback resistance to the input resistance. Polarity of the
output is opposite that of the input (inversion).

Gain, A = Vout = -Rf

Vin Rin
The presence of negative feedback allows the use of the “Summing Point Constraint,” a
useful tool in analysis of op-amp circuits. Since ideal op-amp input impedance is infinite,
no current flows into either op-amp input. And since op-amp gain is very large (ideally
infinite), voltage between the input terminals is very small (ideally zero), creating a
“virtual short circuit” between the input terminals. When negative feedback is present,
the Summing Point Constraint leads to the following assumptions:

Vin(+) = Vin(-)

Iin(+) = Iin (-) = 0

Applying these constraints to the inverting amplifier, it can be found that the output
voltage is developed across the feedback resistance (or complex impedance). This fact
will be used in the analysis of the integrator circuit.

Vin _
Rin
Vout
+

Figure 1-2: Op-amp Inverting Integrator

The configuration of the op-amp inverting integrator is shown in Figure 1-2. The voltage
across a capacitor can be described as the integral of the current into the capacitor divided
by the capacitance value. This fact leads to the development of an expression for the
output voltage of the integrator circuit:

t
−1 ⎤ ⌠
Vout( t ) := ⎡⎢ ⎥ ⋅ ⎮ Vin( t) dt
⎣ ( C⋅ R) ⎦ ⌡0
(Equation 1-1)

Details of the development of this expression can be found in Chapter 2 of the course
text.

The output of the integrator is proportional to the integral of its input. The constant of
proportionality is based on the values of Rin and C. C times Rin is known as the
“integrator time-constant.”

Physical op-amps closely approach ideal behavior in many ways. However, non-ideal
characteristics exist in physical devices and may affect circuit performance. The effects
of offset voltage, bias current and finite gain in physical devices are expected. If you are
aware of these imperfections, their impact on circuit operation can be accounted for.
PROCEDURE:

PRELAB

Prelab hand calculations and simulation plots are included as Appendix A at the end of
this report. Prelab activities are summarized in the following paragraphs. Please refer to
the Appendix as needed during the discussion of Prelab activities.

An expression was found for output voltage of the integrator circuit by analysis using
ideal op-amp characteristics. The result was Equation 1-1 above. The input resistance of
the integrator was found to be equal to the value of the input resistor.

An input containing a DC component was considered next. If the input signal contains a
DC component, this component will be continuously integrated over time by the circuit.
This would result in a circuit output that continues to rise (or fall depending on input
polarity) toward infinity. In the case of physical devices, the output would eventually
reach the saturation output voltage and remain there (see sketch included with hand
calculations). To avoid this problem, a resistor may be placed in parallel with the
capacitor in the feedback loop, effectively limiting the DC gain of the circuit.

Given the input conditions of Prelab Step 3, a sketch of the expected output was obtained.
The input conditions and output expression were also modeled in Mathcad. The Mathcad
plot is reproduced here as Figure 1-3. The output waveform has a sawtooth shape,
running between zero volts and a peak value.

Vin( t )
0 Vout( 0.5) = −0.5
Vout( t )

0 0.5 1
t

Figure 1-3: Mathcad Results for Square-wave Input to Integrator

An expression for the peak output voltage, in terms of input voltage (V), R, C, and input
frequency was developed.

Vo (peak) =__-V__
2CRf (Equation 1-2)

Evaluated with all variables equal to one, as in the Mathcad model, Vo should peak at
one-half the magnitude of the input voltage. Another way to envision the peak voltage is
as the integral of the positive alternation of the square-wave input. Integration of this
constant voltage is equal to the area of the rectangle as t goes from zero to T/2.

Prelab Part 4 called for the design of an integrator with input resistance of 10-kohms that
produces a five-volt peak-to-peak output when the input is a 1kHz square wave
alternating between –2.5 volts and +2.5 volts. Using Equation 1-2 and solving for C, a
value of 25 nF was found for the capacitor. Design values were verified using Mathcad.
The circuit was simulated in PSpice, using a 741 op-amp device. The PSpice simulation
schematic and output plot are included in Appendix A. A rather large DC offset was
noted in the output plot. The PSpice model includes offset voltage and bias currents for
the physical 741 device. This may explain the DC level of the output trace in the
simulation. Otherwise, the output trace had the expected shape and nearly the expected
peak-to-peak voltage.

A sinusoidal input was considered next. Phasor analysis was used to obtain an
expression for the frequency response of the ideal integrator circuit:

H(jω) = _-1__ = __-1__

jωRC j2πfRC (Equation 1-3)

The frequency where the magnitude of H(jω) is equal to one was found to be 4000
rad/sec, or 636.62 Hz. The text refers to this value as the “integrating frequency.”

PSpice was used to plot the magnitude of the frequency response using the model of the
physical circuit. Plotted results, included in the Appendix, were examined with cursors to
determine the integrating frequency. The transfer function magnitude was found to be
equal to one at a frequency of 614.636 Hz, very close to the theoretical prediction (~3.6%
error).

IN LAB

With Prelab activities complete, the circuit was constructed on a breadboard using
components from lab stores. There were no 25 nF capacitors available, so several
capacitors were combined in parallel to achieve the desired nominal value. A 22 nF
mylar capacitor was combined with three .001 uF ceramic disc units. The capacitance of
the combination was measured at 25.32 nF. A 10-kohm nominal resistor was selected.
Its resistance was measured at 9.839-kohms. The 741 op-amp and passive components
were assembled on the breadboard in the desired circuit configuration. A data sheet for
the eight-pin DIP 741 was retrieved from the web to ensure proper pin assignments were
used. Bipolar power (plus and minus 15.0 volts) was provided to the circuit from the
power supply. A ground lead was run from the power supply to the breadboard to
facilitate grounding of input signal and scope probe leads.

The function generator was set to produce a 1kHz square wave output that varied
between –2.5 volts and +2.5 volts. This signal was connected to the circuit input and
ground. Using a tee, this input signal was also fed to the oscilloscope channel 1 input.
The oscilloscope probe (channel 2) was connected between the op-amp output and
ground. Power was applied to the circuit and the scope adjusted to produce the display
shown in Figure 1-4.

Figure 1-4: Integrator Input/Output Traces

Measurement functions on the oscilloscope were used to determine the peak-to-peak

voltage of the output waveform. The measured value of 5.04 volts was less than 1%
away from the predicted value, but slightly higher than both the theoretical prediction and
the PSpice simulation. The measurement also indicated that there was a large DC offset
of the output signal. This agrees with the PSpice simulation. It was noted that initial
voltage on the capacitor could influence the DC offset. Shorting the capacitor briefly
(removing any voltage) before each measurement produced consistent offset
measurements. As an experiment, a 100-kohm resistor was placed in parallel with the
capacitor in the feedback loop. The DC offset of the output was greatly reduced, almost
to zero. This resistor was removed and the procedure continued.

Next, a sinusoidal input was applied to the circuit. Amplitude of the sinusoid remained
constant (1 Vrms) while the frequency was varied until integrator output voltage,
monitored on the scope, became the same as the input. This occurred when the function
generator was set for 650 Hz. This value is higher than both the theoretical prediction
(636.62 Hz) and the simulation (614.636 Hz).

Without changing the setup, the input frequency was varied over the range of 100 Hz to
10 kHz in 50 Hz steps. Output values at each frequency were entered into a table in
Excel, and a semi-log plot produced. This plot is shown in Figure 1-5. The plot has the
same descending slope character of the PSpice simulation.
 Integrator Output (1Vrms sine input)

10

1
Output (Vrms)

0.1

0.01
100 1000 10000
Frequency (Hz)

Figure 1-5: Integrator Output –vs- Frequency

The phase difference between input and output was addressed next. With a 1 kHz sine
wave applied to the circuit input, the output was viewed on the scope. Cursors were
placed at the crest of the input and output waveforms and scope-based time measurement
used to determine the time between the peaks. The scope display is shown in Figure 1-6.

Figure 1-6: Integrator Phase Measurement

The time between peaks was found to be 250 uSec. This corresponds to a phase shift of
one-quarter cycle, or 90 degrees. Examination of the display indicated that the positive
output peak occurs ahead of the input peak in time, dictating the assignment of a positive
phase shift, +90 degrees (leading). This measurement was repeated at several frequencies
with no notable change in results.

To make sense of the positive phase shift I recalled the transfer function and calculated
its argument (angle) in Mathcad:

−1
H( ω) := arg( H( ω) ) = 90deg
j⋅ ω⋅ R⋅ C

This confirms that the angle should be 90 degrees for all sinusoidal inputs. I believe that
my confusion stems from the inverting nature of the circuit and the fact that the output
signal is using a sine reference rather than a cosine reference.

Other input waveforms were applied to the circuit. Choices were limited to the triangular
and sawtooth waveforms available from the function generator. Figures 1-7 and 1-8
show these inputs and the integrator output for each.

Figure 1-7: Integrator Output with Sawtooth Input

The ramping sawtooth wave may be approximated as k*t during each cycle. The
integrator output has the shape of an inverted bowl during each cycle. The inverted bowl
shape often corresponds to a –x2 function. This agrees with the integral of the k*t
approximation: -(k/2) * t2. Since the input wave is bipolar, the integrator output changes
direction at the beginning of each cycle. The 90-degree phase shift is not apparent in the
output plot.
 Figure 1-8: Integrator output with Triangular Input

The triangular input may be thought of as alternating positive-ramping and negative

ramping sawtooth waveforms. With this in mind, the output could be considered to be
alternating positive and negative versions of the integrator output with sawtooth input.
An inverted bowl shape is followed by a non-inverted copy. Again, the 90-degree phase
shift is not apparent in the output plot.

CONCLUSIONS:

The inverting integrator does indeed perform integration of input signals. Sinusoidal
inputs are accompanied by a 90-degree phase shift of the output. Non-sinusoidal signals
are integrated and inverted without phase shift. Output amplitude and integrating
frequency are influenced by the values of R and C that are used.

Overall, this lab seemed to go well. All of the objectives for the procedure were achieved
with minimal problems. Further experience with PSpice and the laboratory instruments
was gained. I hope to include other resources, such as Matlab, in future labs.
APPENDIX A: Prelab Calculations and Simulations
APPENDIX A: Prelab Calculations and Simulations
APPENDIX A: Prelab Calculations and Simulations
APPENDIX A: Prelab Calculations and Simulations

EEL4304L...Lab 1...Mathcad Calculations

1
n := 0 , 1 .. 10 A := 1 ω := 1 T := j := −1 s := j⋅ ω R := 1 C := 1
ω

T
Vin( t) := A if 0 < t ≤ t
−1 ⎞ ⌠
Vout( t) := ⎛⎜
2 Vin( t)
Ic( t) := ⎟ ⋅ ⎮ Vin( t) dt
R ⎝ C⋅ R ⎠ ⌡0
( −A ) if ⎛⎜ ⎞⎟ < t ≤ T
T
⎝ 2⎠

Vin( t )
0 Vout( 0.5) = −0.5
Vout( t )

0 0.5 1
t

−1 4 −9
f := 1000 ω := 2⋅ π⋅ f T := f φ := 0⋅ deg R := 10 C := 25⋅ 10
v1( t) := sin ( ω⋅ t + φ) A := 2.5 t
Vo( t) := ⎛⎜
−1 ⎞ ⋅⌠
v2( t) := A if v1( t) ≥ 0 ⎟ ⎮ v2( t) dt
⎝ C⋅ R ⎠ ⌡0
( −A ) if v1( t) < 0

0
v2( t )

Vo( t )
2

Vo⎛⎜
T⎞
4 ⎟ = −5
⎝ 2⎠
2 .10 4 .10 6 .10 8 .10
4 4 4 4
0
t
APPENDIX A: Prelab Calculations and Simulations

f := 636.62
ω := 2⋅ π⋅ f t
v1( t) := sin ( ω⋅ t + φ) Vo1( t) := ⎛⎜
−1 ⎞ ⋅⌠
⎟ ⎮ v1( t) dt
⎝ C⋅ R ⎠ ⌡0

0
v1( t )

Vo1( t )

2
5 .10
4
0 0.001 0.0015
t
magH( ω) := magH( ω) = 1
1
( ω⋅ C⋅ R)

−1
H( ω) := arg( H( ω) ) = 90deg
j⋅ ω⋅ R⋅ C
APPENDIX A: Prelab Calculations and Simulations
APPENDIX A: Prelab Calculations and Simulations
APPENDIX A: Prelab Calculations and Simulations
APPENDIX A: Prelab Calculations and Simulations
APPENDIX A: Prelab Calculations and Simulations