Embedded Systems

CSEE W4840
Prof. Stephen A. Edwards

Columbia University

Embedded Systems – p. 1/2

Spot the Computer

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Hidden Computers

Casio Nokia 7110 Sony

Camera Browser Playstation 2
Watch Phone

Philips Philips
DVD Player TiVo Recorder
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Technical Challenges

Real-time Complexity

Concurrency Legacy LanguagesEmbedded Systems – p. 4/2

Software complexity growing

Size of Typical Embedded System

1985 13 kLOC
1989 21 kLOC ↓ 44 % per year
1998 1 MLOC
2000 2 MLOC

2008 16 MLOC ≈ Windows NT 4.0

2010 32 MLOC ≈ Windows 2000
Source: “ESP: A 10-Year Retrospective,” Embedded Systems Programming,
November 1998

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Written in stone-age languages

“Which of the following programming languages

have you used for embedded systems in the last
12 months?”
C 81%
Assembly 70%
C++ 39%
Visual Basic 16%
Java 7%

Source: “ESP: A 10-Year Retrospective,” Embedded Systems Programming,

November 1998

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Digital Camera Block Diagram

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The Design Challenge

Design optimal device that meets constraints on

Price Functionality

Performance Size

Power Time-to-market

Maintainability Safety
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The Time-to-Market Challenge

Possible Revenue
Typical
time-to-market
constraint:
8 months

Market
Window

Time

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Simplified Revenue Model
Sales Loss due to delay
Market ramp On-time curve

Delayed curve

Time
D W 2W
Assuming a constant market ramp, on-time revenue is 12 bh = 12 · 2W · W = W 2
and delayed revenue is 12 (2W − D)(W − D) so fractional revenue loss is

D(3W − D)
2
= O(D 2 )
2W

Example: when W = 26 and D = 10, fraction lost is about 50%.

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 NRE

Nonrecurring engineering cost:

The cost of producing the first one.

NRE cost dominates

Production cost dominates

log Unit Cost

Low NRE, high production costs

High NRE, low production costs

log Volume
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Embedded System Technologies

Integrated Circuits

Processing elements

Design tools

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IC Technology

1947: First transistor (Shockley, Bell Labs)

1958: First integrated circuit (Kilby, TI)

1971: First microprocessor (4004: Intel)

Today: six wire layers, 100 nm features

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Moore’s Law

Gordon Moore, 1965: Exponential growth in the

number of transistors per IC
Source: Intel

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$1000 buys you this many CPS
Electromechanical Relay Tube Transistor Integrated Circuit

108

106

104

102

1

10−2

10−4

1900 1910 1920 1930 1940 1950 1960 1970 1980 1990 2000
Source: Ray Kurzweil, The Age of Spiritual Machines
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1918 Sears Roebuck Catalog

About $100 in today’s dollars.

From Donald Norman, The Invisible Computer, 1998.

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Spectrum of IC choices
Flexibility
You choose
Full Custom polygons (Intel)

ASIC circuit (Sony)

Gate Array wires

FPGA logic network

PLD logic function
GP Processor program (e.g., Pentium)
SP Processor program (e.g., DSP)
Multifunction settings (e.g., Ethernet)
Fixed-function part number (e.g., 74LS00)
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Hardware and Software

Hardware Software
Parallel Sequential
Synchronous Asynchronous
Logic Gates Stored programs
Wire-based Memory-based
communication communication
Fixed topology Highly programmable
Low power High power
More detailed Less detailed
High NRE No NRE
Faster Slower
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Design Tools

Hardware Software
Logic Synthesis Compilers
Place-and-route Assemblers
DRC/ERC/LVS Linkers
Simulators Debuggers

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Cost of Designs is Rising

1981: 100 designer-months for leading-edge chip

10k transistors, 100 transistors/month
2002: 30 000 designer-months
150M transistors, 5000 transistors/month
Design cost increased from $1M to $300M
10G i p
c h
o r s per
100M s is t
Tra n
1M
e r - m o n t h
10k r s / d e s i g n
Transist o
100
1980 1985 1990 1995 2000 2005 2010
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Your Nemesis: The XESS XSB-300E

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 Overview of the XSB Board Circuitry

Block Diagram
The XSB Board has two major groups of components that connect to the FPGA: 1) those
with dedicated buses, and 2) those that share a peripheral bus. Components that process
video and audio data streams use dedicated buses, while all other components use the
shared Peripheral Bus. (The audio codec actually connects to both types of buses: it is
loaded with configuration data through the Peripheral Bus but it sends and receives
digitized audio data through a dedicated bus.) The chip-selects for components on the
Peripheral Bus are controlled by the FPGA to prevent contention.
XC2S300E FPGA
CPLD
XC9572 CPLD
256K x 16 SRAM

Connector
4 Mb

RS232
Flash

8M x 16 SDRAM
512K x 8 Flash

Expansion
Connector
256K x 16
SRAM
Video
DAC
6-channel NTSC video decoder
12-bit, 30 MSPS ADC
80 MHz, 30-bit video DAC
Video
8M x 16
SDRAM
Decoder
20-bit, 4-input, 1-output stereo codec
Microphone/line-in/line-out jacks
Peripheral Bus

30 MSPS
ADC 10/100 Ethernet MAC+PHY
Ethernet
MAC+PHY
USB 2.0 peripheral port
Audio
Six pushbuttons, DIP switch
Expansion Codec
Connector Two LED digits, bargraph
Three programmable oscillators
Expansion
Connector

USB 2.0 Two expansion headers w/ 75 I/O pins

Peripheral header w/ 18 I/O pins
Connector

Parallel and Serial port

IDE Disk

Buttons LEDs
Compact Flash
Connector
Compact Flash interface
IDE hard disk interface
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XSB BOARD V1.0 MANUAL 19 8/20/2003
Class Structure

First half project: TV Typewriter. Six Labs:

1. Count in C on the 7-segment display

2. Hello World in C to video display
3. TV Typewriter in C
4. Count in VHDL on the 7-segment display
5. Character Generator in VHDL
6. TV Typewriter in HW/SW

Second half project: Design-your-own

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Custom Project Ideas

Broadly: C + VHDL + peripheral(s)

Digital tone control

Digital sound effects processor
Real-time spectrum analyzer
Simple video effects processor
Speech synthesizer
Digital picture frame
Internet radio

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