IRFP460B, SiHG460B

[Link]
Vishay Siliconix
D Series Power MOSFET
FEATURES
PRODUCT SUMMARY
• Optimal Design
VDS (V) at TJ max. 550
- Low Area Specific On-Resistance
RDS(on) max. at 25 °C () VGS = 10 V 0.25
- Low Input Capacitance (Ciss)
Qg max. (nC) 170
- Reduced Capacitive Switching Losses
Qgs (nC) 14
- High Body Diode Ruggedness
Qgd (nC) 28
- Avalanche Energy Rated (UIS)
Configuration Single • Optimal Efficiency and Operation
D - Low Cost
- Simple Gate Drive Circuitry
TO-247AC
- Low Figure-of-Merit (FOM): Ron x Qg
- Fast Switching
• Material categorization: For definitions of compliance
G please see [Link]/doc?99912
Note
* Lead (Pb)-containing terminations are not RoHS-compliant.
Exemptions may apply.
S
D S
G APPLICATIONS
N-Channel MOSFET
• Consumer Electronics
- Displays (LCD or Plasma TV)
• Server and Telecom Power Supplies
- SMPS
• Industrial
- Welding
- Induction Heating
- Motor Drives
• Battery Chargers
• SMPS
- Power Factor Correction (PFC)

ORDERING INFORMATION
Package TO-247AC
Lead (Pb)-free IRFP460BPbF
Lead (Pb)-free and Halogen-free SiHG460B-GE3

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage VDS 500
Gate-Source Voltage ± 20 V
VGS
Gate-Source Voltage AC (f > 1 Hz) 30
TC = 25 °C 20
Continuous Drain Current (TJ = 150 °C) VGS at 10 V ID
TC = 100 °C 13 A
Pulsed Drain Currenta IDM 62
Linear Derating Factor 2.2 W/°C
Single Pulse Avalanche Energyb EAS 281 mJ
Maximum Power Dissipation PD 278 W
Operating Junction and Storage Temperature Range TJ, Tstg - 55 to + 150 °C
Drain-Source Voltage Slope TJ = 125 °C 24
dV/dt V/ns
Reverse Diode dV/dtd 0.36
Soldering Recommendations (Peak Temperature) for 10 s 300c °C
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature.
b. VDD = 50 V, starting TJ = 25 °C, L = 10 mH, Rg = 25 , IAS = 7.5 A.
c. 1.6 mm from case.
d. ISD  ID, starting TJ = 25 °C.

S12-0812-Rev. B, 16-Apr-12 1 Document Number: 91502

For technical questions, contact: hvm@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 IRFP460B, SiHG460B
[Link]
Vishay Siliconix

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT
Maximum Junction-to-Ambient RthJA - 40
°C/W
Maximum Junction-to-Case (Drain) RthJC - 0.45

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 μA 500 - - V
VDS Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 250 μA - 0.56 - V/°C
Gate-Source Threshold Voltage (N) VGS(th) VDS = VGS, ID = 250 μA 2 - 4 V
Gate-Source Leakage IGSS VGS = ± 20 V - - ± 100 nA
VDS = 500 V, VGS = 0 V - - 1
Zero Gate Voltage Drain Current IDSS μA
VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 10
Drain-Source On-State Resistance RDS(on) VGS = 10 V ID = 10 A - 0.2 0.25 
Forward Transconductance gfs VDS = 50 V, ID = 10 A - 12 - S
Dynamic
Input Capacitance Ciss VGS = 0 V, - 3094 -
Output Capacitance Coss VDS = 100 V, - 152 -
Reverse Transfer Capacitance Crss f = 1 MHz - 13 -
Effective output capacitance, energy pF
Co(er) - 131 -
relateda VGS = 0 V,
Effective output capacitance, time VDS = 0 V to 400 V
Co(tr) - 189 -
relatedb
Total Gate Charge Qg - 85 170
Gate-Source Charge Qgs VGS = 10 V ID = 10 A, VDS = 400 V - 14 - nC
Gate-Drain Charge Qgd - 28 -
Turn-On Delay Time td(on) - 24 50
Rise Time tr - 31 62
VDD = 400 V, ID = 10 A, ns
Turn-Off Delay Time td(off) VGS = 10 V, Rg = 9.1  - 117 176
Fall Time tf - 56 112
Gate Input Resistance Rg f = 1 MHz, open drain - 1.8 - 
Drain-Source Body Diode Characteristics
MOSFET symbol
Continuous Source-Drain Diode Current IS D
- - 20
showing the
A
integral reverse G

Pulsed Diode Forward Current ISM p - n junction diode S

- - 80

Diode Forward Voltage VSD TJ = 25 °C, IS = 10 A, VGS = 0 V - - 1.2 V

Reverse Recovery Time trr - 437 - ns
TJ = 25 °C, IF = IS = 10 A,
Reverse Recovery Charge Qrr - 5.9 - μC
dI/dt = 100 A/μs, VR = 20 V
Reverse Recovery Current IRRM - 25 - A
Notes
a. Coss(er) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 % to 80 % VDS.
b. Coss(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 % to 80 % VDS.

S12-0812-Rev. B, 16-Apr-12 2 Document Number: 91502

For technical questions, contact: hvm@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 IRFP460B, SiHG460B
[Link]
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

80 3
TOP 15 V
ID, Drain-to-Source Current (A)

14 V
13 V TJ = 25 °C

On Resistance (Normalized)
12 V
11
11 V
V
2.5 ID = 10 A

RDS(on), Drain-to-Source
60 10 V
9V
8V
7V
2
6V
BOTTOM 5 V
40 1.5

1
20 VGS = 10 V
0.5

0 0
0 5 10 15 20 25 30 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160
VDS, Drain-to-Source Voltage (V) TJ, Junction Temperature (°C)

Fig. 1 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature

40 10 000
TOP 15 V
ID, Drain-to-Source Current (A)

14 V
13 V TJ = 150 °C
12 V ġ
11 V
11 V
1000 Ciss VGS = 0 V, f = 1 MHz
30 10 V
Capacitance (pF)

9V
8V
Ciss = Cgs + Cgd, Cds Shorted
ġ
7V Crss = Cgd ġ
6V Coss = Cds + Cgd
BOTTOM 5 V
20 100 ġ
Coss

10 10 ġ
Crss

0 1
0 5 10 15 20 25 30 0 100 200 300 400 500
VDS, Drain-to-Source Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig. 2 - Typical Output Characteristics Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

80 24
VDS = 400 V
VGS, Gate-to-Source Voltage (V)
ID, Drain-to-Source Current (A)

TJ = 25 °C VDS = 250 V
20 VDS = 100 V
60
16

TJ = 150 °C
40 12

8
20
4

0 0
0 5 10 15 20 25 0 30 60 90 120 150 180
VGS, Gate-to-Source Voltage (V) Qg, Total Gate Charge (nC)

Fig. 3 - Typical Transfer Characteristics Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

S12-0812-Rev. B, 16-Apr-12 3 Document Number: 91502

For technical questions, contact: hvm@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 IRFP460B, SiHG460B
[Link]
Vishay Siliconix

100 20
ISD, Reverse Drain Current (A)

TJ = 150 °C 16

ID, Drain Current (A)

10 TJ = 25 °C
ġ 12

8
1 ġ

VGS = 0 V ġ

0.1 0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 25 50 75 100 125 150
VSD, Source-Drain Voltage (V) TJ, Case Temperature (°C)

Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 9 - Maximum Drain Current vs. Case Temperature

1000 625
Operation in this area
limited by RDS(on)
600
Brakdown Voltage (V)
VDS, Drain-to-Source
100
ID, Drain Current (A)

575

10 100 μs 550
Limited by RDS(on)*
1 ms 525
1
TC = 25 °C
TJ = 150 °C 500
Single Pulse BVDSS Limited 10 ms
0.1 475
1 10 100 1000 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160
VDS, Drain-to-Source Voltage (V)
TJ, Junction Temperature (°C)
* VGS > minimum VGS at which RDS(on) is specified

Fig. 8 - Maximum Safe Operating Area Fig. 10 - Temperature vs. Drain-to-Source Voltage

1
Normalized Effective Transient

Duty Cycle = 0.5

Thermal Impedance

0.2

0.1
0.1
0.02

0.05

Single Pulse
0.01
0.0001 0.001 0.01 0.1 1
Pulse Time (s)

Fig. 11 - Normalized Thermal Transient Impedance, Junction-to-Case

S12-0812-Rev. B, 16-Apr-12 4 Document Number: 91502

For technical questions, contact: hvm@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 IRFP460B, SiHG460B
[Link]
Vishay Siliconix

RD
VDS QG
10 V
VGS
D.U.T.
RG QGS QGD
+
- VDD

10 V VG
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %

Charge
Fig. 12 - Switching Time Test Circuit Fig. 16 - Basic Gate Charge Waveform

Current regulator
Same type as D.U.T.
VDS
90 %
50 kΩ

12 V 0.2 µF
0.3 µF

+
10 % VDS
D.U.T. -
VGS
td(on) tr td(off) tf VGS

3 mA

Fig. 13 - Switching Time Waveforms

IG ID
Current sampling resistors

Fig. 17 - Gate Charge Test Circuit

L
VDS
Vary tp to obtain
required IAS

RG D.U.T +
V DD
-
IAS
10 V
tp 0.01 Ω

Fig. 14 - Unclamped Inductive Test Circuit

VDS
tp
VDD

VDS

IAS

Fig. 15 - Unclamped Inductive Waveforms

S12-0812-Rev. B, 16-Apr-12 5 Document Number: 91502

For technical questions, contact: hvm@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 IRFP460B, SiHG460B
[Link]
Vishay Siliconix

Peak Diode Recovery dV/dt Test Circuit

+ Circuit layout considerations

D.U.T.
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
-

- +
-

Rg • dV/dt controlled by Rg +
• Driver same type as D.U.T. VDD
-
• ISD controlled by duty factor “D”
• D.U.T. - device under test

Driver gate drive

Period P.W.
D=
P.W. Period

VGS = 10 Va

D.U.T. lSD waveform

Reverse
recovery Body diode forward
current current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
VDD

Re-applied
voltage
Body diode forward drop
Inductor current

Ripple ≤ 5 % ISD

Note
a. VGS = 5 V for logic level devices

Fig. 18 - For N-Channel

Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see [Link]/ppg?91502.

S12-0812-Rev. B, 16-Apr-12 6 Document Number: 91502

For technical questions, contact: hvm@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
 Package Information
[Link]
Vishay Siliconix
TO-247AC (High Voltage)
A A
4
E 7 ØP (Datum B)
B
E/2 S A2 Ø k M DBM
3 R/2 ØP1
A
D2
Q

4 4
2xR
D D1
(2)

1 2 3 D 4
Thermal pad
5 L1

C L 4
E1
See view B A
0.01 M D B M
2 x b2 C View A - A
2x e
3xb
b4 A1
0.10 M C A M
(b1, b3, b5)
Planting Base metal
Lead Assignments
1. Gate D DE E
2. Drain
3. Source (c) c1
C C
4. Drain
(b, b2, b4)
(4)
Section C - C, D - D, E - E
View B
MILLIMETERS INCHES MILLIMETERS INCHES
DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.
A 4.58 5.31 0.180 0.209 D2 0.51 1.30 0.020 0.051
A1 2.21 2.59 0.087 0.102 E 15.29 15.87 0.602 0.625
A2 1.17 2.49 0.046 0.098 E1 13.72 - 0.540 -
b 0.99 1.40 0.039 0.055 e 5.46 BSC 0.215 BSC
b1 0.99 1.35 0.039 0.053 Øk 0.254 0.010
b2 1.53 2.39 0.060 0.094 L 14.20 16.25 0.559 0.640
b3 1.65 2.37 0.065 0.093 L1 3.71 4.29 0.146 0.169
b4 2.42 3.43 0.095 0.135 N 7.62 BSC 0.300 BSC
b5 2.59 3.38 0.102 0.133 ØP 3.51 3.66 0.138 0.144
c 0.38 0.86 0.015 0.034 Ø P1 - 7.39 - 0.291
c1 0.38 0.76 0.015 0.030 Q 5.31 5.69 0.209 0.224
D 19.71 20.82 0.776 0.820 R 4.52 5.49 0.178 0.216
D1 13.08 - 0.515 - S 5.51 BSC 0.217 BSC
ECN: X13-0103-Rev. D, 01-Jul-13
DWG: 5971
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Contour of slot optional.
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at
the outermost extremes of the plastic body.
4. Thermal pad contour optional with dimensions D1 and E1.
5. Lead finish uncontrolled in L1.
6. Ø P to have a maximum draft angle of 1.5 to the top of the part with a maximum hole diameter of 3.91 mm (0.154").
7. Outline conforms to JEDEC outline TO-247 with exception of dimension c.
8. Xian and Mingxin actually photo.

Revision: 01-Jul-13 1 Document Number: 91360

For technical questions, contact: hvm@[Link]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT [Link]/doc?91000
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Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.

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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.

Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
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Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular
product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
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including but not limited to the warranty expressed therein.

Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
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Material Category Policy

Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.

Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.

Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free
requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference
to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21
conform to JEDEC JS709A standards.

Revision: 02-Oct-12 1 Document Number: 91000

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