 IRF730

N - CHANNEL 400V - 0.75 Ω - 5.5A - TO-220

PowerMESH MOSFET
TYPE V DSS R DS(on) ID
IRF730 400 V < 1Ω 5.5 A
■ TYPICAL RDS(on) = 0.75 Ω
■ EXTREMELY HIGH dv/dt CAPABILITY
■ 100% AVALANCHE TESTED
■ VERY LOW INTRINSIC CAPACITANCES
■ GATE CHARGE MINIMIZED

DESCRIPTION
This power MOSFET is designed using the 3
company’s consolidated strip layout-based MESH 2
1
OVERLAY process. This technology matches TO-220
and improves the performances compared with
standard parts from various sources.

APPLICATIONS
■ HIGH CURRENT SWITCHING
■ UNINTERRUPTIBLE POWER SUPPLY (UPS) INTERNAL SCHEMATIC DIAGRAM
■ DC/DC COVERTERS FOR TELECOM,
INDUSTRIAL, AND LIGHTING EQUIPMENT.

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Uni t
V DS Drain-source Voltage (V GS = 0) 400 V
V DGR Drain- gate Voltage (R GS = 20 kΩ) 400 V
V GS Gate-source Voltage ± 20 V
o
ID Drain Current (continuous) at Tc = 25 C 5.5 A
o
ID Drain Current (continuous) at Tc = 100 C 3.5 A
IDM (•) Drain Current (pulsed) 22 A
o
P t ot Total Dissipation at Tc = 25 C 100 W
o
Derating F actor 0.8 W/ C
dv/dt( 1 ) Peak Diode Recovery voltage slope 4.0 V/ ns
o
T stg Storage T emperature -65 to 150 C
o
Tj Max. O perating Junction Temperature 150 C
(•) Pulse width limited by safe operating area (1) ISD ≤5.5 A, di/dt ≤ 90 Α/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
First Digit of the Datecode Being Z or K Identifies Silicon Characterized in this Datasheet

August 1998 1/8

IRF730

THERMAL DATA
o
R t hj-ca se Thermal Resistance Junction-case Max 1.25 C/W
Rthj -amb Thermal Resistance Junction-ambient Max 62.5 oC/W
o
R thc- si nk Thermal Resistance Case-sink Typ 0.5 C/W
o
Tl Maximum Lead Temperature For Soldering Purpose 300 C

AVALANCHE CHARACTERISTICS
Symb ol Parameter Max Valu e Unit
I AR Avalanche Current, Repetitive or Not-Repetitive 5.5 A
(pulse width limited by Tj max)
E AS Single Pulse Avalanche Energy 300 mJ
(starting Tj = 25 o C, I D = IAR , VDD = 50 V)

ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)

OFF
Symb ol Parameter Test Cond ition s Min. Typ . Max. Un it
V (BR)DSS Drain-source I D = 250 µA V GS = 0 400 V
Breakdown Voltage
I DSS Zero G ate Voltage V DS = Max Rating 1 µA
o
Drain Current (VGS = 0) V DS = Max Rating T c = 125 C 50 µA
I GSS Gate-body Leakage V GS = ± 20 V ± 100 nA
Current (V DS = 0)

ON (∗)
Symb ol Parameter Test Cond ition s Min. Typ . Max. Un it
V GS(th) Gate Threshold V DS = VGS ID = 250 µA 2 3 4 V
Voltage
R DS( on) Static Drain-source On V GS = 10V ID = 3.3 A 0.75 1 Ω
Resistance
ID(o n) On State Drain Current V DS > I D(on) x R DS(on) max 5.5 A
V GS = 10 V

DYNAMIC
Symb ol Parameter Test Cond ition s Min. Typ . Max. Un it
g fs (∗) Forward V DS > I D(on) x R DS(on) max I D = 3.5 A 2.9 S
Transconductance
C iss Input Capacitance V DS = 25 V f = 1 MHz VGS = 0 700 pF
C oss Output Capacitance 140 pF
C rss Reverse T ransfer 13 pF
Capacitance

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 IRF730

ELECTRICAL CHARACTERISTICS (continued)

SWITCHING ON
Symb ol Parameter Test Cond ition s Min. Typ . Max. Un it
t d(on) Turn-on Time V DD = 200 V I D = 3.5 A 11.5 ns
tr Rise Time R G = 4.7 Ω VGS = 10 V 7.5 ns
(see test circuit, figure 1)
Qg Total Gate Charge V DD = 320 V I D = 5.5 A VGS = 10 V 21 30 nC
Q gs Gate-Source Charge 7.3 nC
Q gd Gate-Drain Charge 8.5 nC

SWITCHING OFF
Symb ol Parameter Test Cond ition s Min. Typ . Max. Un it
t r(Vof f) Off-voltage Rise Time V DD = 320 V I D = 7 A 9.5 ns
tf Fall Time R G = 4.7 Ω V GS = 10 V 9 ns
tc Cross-over Time (see test circuit, figure 3) 16.5 ns

SOURCE DRAIN DIODE

Symb ol Parameter Test Cond ition s Min. Typ . Max. Un it
I SD Source-drain Current 5.5 A
I SDM (•) Source-drain Current 22 A
(pulsed)
V SD (∗) Forward On Voltage I SD = 5.5 A V GS = 0 1.6 V
t rr Reverse Recovery I SD =7 A di/dt = 100 A/µs 300 ns
o
Time V DD = 100 V T j = 150 C
Q rr Reverse Recovery (see test circuit, figure 3) 2 µC
Charge
I RRM Reverse Recovery 13.7 A
Current
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area

Safe Operating Area Thermal Impedance

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IRF730

Output Characteristics Transfer Characteristics

Transconductance Static Drain-source On Resistance

Gate Charge vs Gate-source Voltage Capacitance Variations

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 IRF730

Normalized Gate Threshold Voltage vs Normalized On Resistance vs Temperature

Temperature

Source-drain Diode Forward Characteristics

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IRF730

Fig. 1: Unclamped Inductive Load Test Circuit Fig. 1: Unclamped Inductive Waveform

Fig. 3: Switching Times Test Circuits For Fig. 4: Gate Charge test Circuit
Resistive Load

Fig. 5: Test Circuit For Inductive Load Switching

And Diode Recovery Times

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 IRF730

TO-220 MECHANICAL DATA

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
C 1.23 1.32 0.048 0.051
D 2.40 2.72 0.094 0.107
D1 1.27 0.050
E 0.49 0.70 0.019 0.027
F 0.61 0.88 0.024 0.034
F1 1.14 1.70 0.044 0.067
F2 1.14 1.70 0.044 0.067
G 4.95 5.15 0.194 0.203
G1 2.4 2.7 0.094 0.106
H2 10.0 10.40 0.393 0.409
L2 16.4 0.645
L4 13.0 14.0 0.511 0.551
L5 2.65 2.95 0.104 0.116
L6 15.25 15.75 0.600 0.620
L7 6.2 6.6 0.244 0.260
L9 3.5 3.93 0.137 0.154
DIA. 3.75 3.85 0.147 0.151
E
A

D
C

D1

L2
F1

G1

H2
G

Dia.
F
F2

L5
L9
L7

L6 L4
P011C

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 IRF730

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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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 1998 STMicroelectronics – Printed in Italy – All Rights Reserved

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