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JEDEC Standards for Memory ICs

JEDEC is a standards organization that develops standards to promote uniformity and interoperability in the semiconductor industry. One such standard is JESD21-C, which defines memory module configurations and is maintained by JEDEC committee JC41. The standard requires frequent updates due to advances in memory technology and is published in a loose-leaf format. Ranking refers to the number of independent sets of DRAMs that can be accessed simultaneously on a memory module. While a module may have chips on both sides, this does not necessarily indicate it has multiple ranks - the number of ranks is best determined by examining the module's label.

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128 views2 pages

JEDEC Standards for Memory ICs

JEDEC is a standards organization that develops standards to promote uniformity and interoperability in the semiconductor industry. One such standard is JESD21-C, which defines memory module configurations and is maintained by JEDEC committee JC41. The standard requires frequent updates due to advances in memory technology and is published in a loose-leaf format. Ranking refers to the number of independent sets of DRAMs that can be accessed simultaneously on a memory module. While a module may have chips on both sides, this does not necessarily indicate it has multiple ranks - the number of ranks is best determined by examining the module's label.

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jnhrhea
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JEDEC characterizes its standardization efforts as follows:

JEDEC standards and publications are designed to serve the public interest through eliminating
misunderstandings between manufacturers and purchasers, facilitating interchangeability and
improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay
the proper product for use by those other than JEDEC members, whether the standard is to be used
either domestically or internationally.

JEDEC Standard 100B.01 is entitled Terms, Definitions, and Letter Symbols for Microcomputers,
Microprocessors, and Memory Integrated Circuits. The purpose of the standard is to promote the
uniform use of symbols, abbreviations, terms, and definitions throughout the semiconductor industry.

The standard JESD21-C: Configurations for Solid State Memories is maintained by JEDEC committee
JC41. This committee consists of members from manufacturers of microprocessors, memory ICs,
memory modules, and other components, as well as component integrators, such as video card and
personal computer makers. Additions to Standard 21 are so frequent that it is published in loose-leaf
format and comes in a three-ring binder.

Ranking
The number of ranks on any DIMM is the number of independent sets of DRAMs that can be accessed
for the full data bit-width of the DIMM i.e. 64 bits. The ranks cannot be accessed simultaneously as they
share the same data path. The physical layout of the DRAM chips on the DIMM itself does not
necessarily relate to the number of ranks.

DIMMs are often referred to as "single-sided" or "double-sided" in reference to the location of the
memory devices or "chips" being on only one or both sides of the DIMM printed circuit board (PCB).
These terms may cause confusion as they do not necessarily relate to how the DIMMs are logically
organized or accessed.

For example, on a single-rank DIMM that has 64 data bits of I/O pins, there is only one set of DRAMs
that are turned on to drive a read or receive a write on all 64 bits. In most electronic systems, memory
controllers are designed to access the full data bus width of the memory module at the same time.

On a 64-bit (non-ECC) DIMM made with two ranks, there would be two sets of DRAM that could be
accessed at different times. Only one of the ranks can be accessed at a time, since the DRAM data bits
are tied together for two loads on the DIMM (Wired OR). Ranks are accessed through chip selects (CS).
Thus for a two rank module, the two DRAMs with data bits tied together may be accessed by a CS per
DRAM (e.g. CS0 goes to one DRAM chip and CS1 goes to the other). DIMMs are currently being
commonly manufactured with up to four ranks per module.

Consumer DIMM vendors have recently begun to distinguish between single and dual ranked DIMMs.
JEDEC decided that the terms "dual-sided," "double-sided," or "dual-banked" were not correct when
applied to registered DIMMs.
Single and Dual Rank DIMMs

Determining if a DIMM is a single-rank DIMM or a dual-rank DIMM is difficult upon visual inspection. A
single-rank DIMM may have memory chips on both sides of a DIMM. The best way to decide if the
DIMM is a single-rank DIMM or a dual-rank DIMM is to look at its attached label. The following image
contains the labeling convention used to determine the exact specifications of the DIMM.

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