Subject Code Subject Name Credits

CSC403 Computer Organization and Architecture* 05

Course Objectives:
1. To conceptualize the basics of organizational and architectural issues of a
digital computer.
2. To analyze performance issues in processor and memory design of a digital
computer.
3. To understand various data transfer techniques in digital computer.
4. To analyze processor performance improvement using instruction level
parallelism

Course Outcomes:
1. Ability to understand basic structure of computer.
2. Ability to perform computer arithmetic operations.
3. Ability to understand control unit operations.
4. Ability to design memory organization that uses banks for different word size
operations.
5. Ability to understand the concept of cache mapping techniques.
6. Ability to understand the concept of I/O organization.
7. Ability to conceptualize instruction level parallelism.

Pre-requistes: Fundamentals of Computer, Digital Logic Circuits, Programming Languages (C, C++, Java)

Module Detailed Contents Hours

1 Overview of Computer Architecture & Organization: 04

 Introduction of Computer Organization and Architecture.
 Basic organization of computer and block level description of
the functional units.
 Evolution of Computers, Von Neumann model.
 Performance measure of Computer Architecture.
 Introduction to buses and connecting I/O devices to CPU and
Memory, bus structure.

2 Data Representation and Arithmetic Algorithms: 10

 Number representation: Binary Data representation, two’s
complement representation and Floating-point
representation. IEEE 754 floating point number
representation.
 Integer Data computation: Addition, Subtraction.
Multiplication: Signed multiplication, Booth’s algorithm.
University of Mumbai Computer Engineering ( Second Year – Sem II & IV) Revised Course(R2012) 31
  Division of integers: Restoring and non-restoring division
 Floating point arithmetic: Addition, subtraction

3 Processor Organization and Architecture: 12

 CPU Architecture, Register Organization , Instruction
formats, basic instruction cycle. Instruction interpretation and
sequencing.
 Control Unit: Soft wired (Micro-programmed) and
hardwired control unit design methods. Microinstruction
sequencing and execution. Micro operations, concepts of
nano programming.
 Introduction to RISC and CISC architectures and design
issues.
 Case study on 8085 microprocessor: Features, architecture,
pin configuration and addressing modes.

4 Memory Organization: 12
 Introduction to Memory and Memory parameters.
Classifications of primary and secondary memories. Types of
RAM and ROM, Allocation policies, Memory hierarchy and
characteristics.
 Cache memory: Concept, architecture (L1, L2, L3), mapping
techniques. Cache Coherency, Interleaved and Associative
memory.
 Virtual Memory: Concept, Segmentation and Paging , Page
replacement policies.

5 I/O Organization and Peripherals: 6

 Input/output systems, I/O modules and 8089 IO processor.
 Types of data transfer techniques: Programmed I/O,
Interrupt driven I/O and DMA.
 Peripheral Devices: Introduction to peripheral devices,
scanner, plotter, joysticks, touch pad.

6 Introduction to parallel processing systems: 4

 Introduction to parallel processing concepts
 Flynn’s classifications
 pipeline processing
 instruction pipelining,
 pipeline stages
 pipeline hazards.

University of Mumbai Computer Engineering ( Second Year – Sem II & IV) Revised Course(R2012) 32
Text Books:

1. Carl Hamacher, Zvonko Vranesic and Safwat Zaky, “Computer Organization”, Fifth Edition, Tata
McGraw-Hill.
2. John P. Hayes, “Computer Architecture and Organization”, Third Edition.
3. William Stallings, “Computer Organization and Architecture: Designing for Performance”, Eighth
Edition, Pearson.
4. B. Govindarajulu, “Computer Architecture and Organization: Design Principles and Applications”,
Second Edition, Tata McGraw-Hill.

Reference Books:

1. Dr. M. Usha, T. S. Srikanth, “Computer System Architecture and Organization”,First Edition, Wiley-
India.
2. “Computer Organization” by ISRD Group, Tata McGraw-Hill.
3. Ramesh Gaonkar, “Microprocessor Architecture, Programming and Applications with the 8085, Fifth
Edition,Penram.

Termwork:
Term work should consist of at least 08 experiments.
Journal must include at least 2 assignments.
The final certification and acceptance of term work ensures that satisfactory performance of laboratory work and
minimum passing marks in term work.
Term Work: 25 Marks ( total marks ) = 15 Marks ( Experiment ) + 5 Marks ( Assignment ) + 5 (Attendance
(theory+practical))
oral exam will be based on the above syllabus.
Note:
1. The faculty should conduct eight programming practical / experiments based on the above syllabus including
two case studies on recent developments covering the above contents.
All the programs should be implemented in C/C++/Java under Windows or Linux environment.
Experiments can also be conducted using available open source tools.
2. 8085 microprocessor should be included only as a sample case study to visualize the concepts. No questions
in University Exams / Class Tests should be asked on 8085 microprocessor.

SUGGESTED LIST OF COA PRACTICAL / EXPERIMENTS

1. To study Full Adder (7483).

2. To study ALU (74181).

3. To study MASM (Micro Assembler).

4. A program for hexadecimal addition and multiplication.

University of Mumbai Computer Engineering ( Second Year – Sem II & IV) Revised Course(R2012) 33
5. A program for binary multiplication.

6. A program for Hamming code generation , detection and correction.

7. A program for Booth’s multiplication

8. A program for LRU page replacement algorithm.

9. A program for FIFO page replacement algorithm.

10. A program to simulate the mapping techniques of Cache memory.

10.1 Direct Mapped cache

10.2 Associative Mapped cache
10.3 Set Associative Mapped cache

11. A program to simulate memory allocation policies.

11.1 First-fit algorithm

11.2 Best-fit algorithm

12. A program to implement serial communication (PC - PC communication).

13. A program to implement parallel communication. (PC - Printer communication).

14. A program for printer simulation.

15. A program for keyboard simulation.

Theory Examination:
1. Question paper will comprise of total 6 questions, each of 20 Marks.
2. Only 4 questions need to be solved.
3. Question 1 will be compulsory and based on maximum part of the syllabus.
4. Remaining questions will be mixed in nature (for example suppose Q.2 has part (a) from module 3 then part (b) will
be from any module other than module 3)

In question paper, weightage of each module will be proportional to number of respective lecture hours as
mentioned in the syllabus.

University of Mumbai Computer Engineering ( Second Year – Sem II & IV) Revised Course(R2012) 34