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Addressing Modes in Computer Architecture

This document contains 10 multiple choice questions about addressing modes in computer organization. It discusses different addressing modes like immediate, direct, indexed with offset, relative and their applications. For example, it explains that relative addressing mode is most suitable to change the normal sequence of execution of instructions. The questions cover topics like effective address calculation, auto-increment, different representation of numbers and arithmetic operations.

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50% found this document useful (2 votes)
3K views43 pages

Addressing Modes in Computer Architecture

This document contains 10 multiple choice questions about addressing modes in computer organization. It discusses different addressing modes like immediate, direct, indexed with offset, relative and their applications. For example, it explains that relative addressing mode is most suitable to change the normal sequence of execution of instructions. The questions cover topics like effective address calculation, auto-increment, different representation of numbers and arithmetic operations.

Uploaded by

kibrom atsbha
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Addressing Modes - Computer


Organization Questions and
Answers
by Manish
4 minutes

This set of Computer Organization and Architecture Multiple


Choice Questions & Answers (MCQs) focuses on
“Addressing Modes”.

1. The instruction, Add #45,R1 does _______


a) Adds the value of 45 to the address of R1 and stores 45
in that address
b) Adds 45 to the value of R1 and stores it in R1
c) Finds the memory location 45 and adds that content to
that of R1
d) None of the mentioned
View Answer

Answer: b
Explanation: The instruction is using immediate addressing
mode hence the value is stored in the location 45 is added.

2. In case of, Zero-address instruction method the operands


are stored in _____
a) Registers

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b) Accumulators
c) Push down stack
d) Cache
View Answer

Answer: c
Explanation: In this case the operands are implicitly loaded
onto the ALU.

3. Add #45, when this instruction is executed the following


happen/s _______
a) The processor raises an error and requests for one more
operand
b) The value stored in memory location 45 is retrieved and
one more operand is requested
c) The value 45 gets added to the value on the stack and is
pushed onto the stack
d) None of the mentioned
View Answer

Answer: b
Explanation: None.

4. The addressing mode which makes use of in-direction


pointers is ______
a) Indirect addressing mode
b) Index addressing mode
c) Relative addressing mode
d) Offset addressing mode
View Answer

Answer: a
Explanation: In this addressing mode, the value of the

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register serves as another memory location and hence we


use pointers to get the data.

5. In the following indexed addressing mode instruction,


MOV 5(R1),LOC the effective address is ______
a) EA = 5+R1
b) EA = R1
c) EA = [R1] d) EA = 5+[R1] View Answer

Answer: d
Explanation: This instruction is in Base with offset
addressing mode.

6. The addressing mode/s, which uses the PC instead of a


general purpose register is ______
a) Indexed with offset
b) Relative
c) direct
d) both Indexed with offset and direct
View Answer

Answer: b
Explanation: In this the contents of the PC are directly
incremented.

7. When we use auto increment or auto decrements, which


of the following is/are true?
1) In both, the address is used to retrieve the operand and
then the address gets altered
2) In auto increment the operand is retrieved first and then
the address altered
3) Both of them can be used on general purpose registers
as well as memory locations

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a) 1, 2, 3
b) 2
c) 1, 3
d) 2, 3
View Answer

Answer: d
Explanation: In case of, auto increment the increment is
done afterwards and in auto decrement the decrement is
done first.

8. The addressing mode, where you directly specify the


operand value is _______
a) Immediate
b) Direct
c) Definite
d) Relative
View Answer

Answer: a
Explanation: None.

9. The effective address of the following instruction is, MUL


5(R1,R2).
a) 5+R1+R2
b) 5+(R1*R2)
c) 5+[R1]+[R2].
d) 5*([R1]+[R2])
View Answer

Answer: c
Explanation: The addressing mode used is base with offset
and index.

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10. _____ addressing mode is most suitable to change the


normal sequence of execution of instructions.
a) Relative
b) Indirect
c) Index with Offset
d) Immediate
View Answer

Answer: a
Explanation: The relative addressing mode is used for this
since it directly updates the PC.

Sanfoundry Global Education & Learning Series –


Computer Organization and Architecture.

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sanfoundry.com

Computer Organization Aptitude


Test - Sanfoundry
by Manish
4-5 minutes

This set of Computer Organization Questions and Answers


for Aptitude test focuses on “Numbers and Arithmetic
Operations”.

1. Which method/s of representation of numbers occupies


large amount of memory than others ?
a) Sign-magnitude
b) 1’s compliment
c) 2’s compliment
d) 1’s & 2’s compliment
View Answer

Answer: a
Explanation: It takes more memory as one bit used up to
store the sign.

2. Which representation is most efficient to perform


arithmetic operations on the numbers ?
a) Sign-magnitude
b) 1’s compliment
c) 2’S compliment

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d) None of the mentioned


View Answer

Answer: c
Explanation: The two’s compliment form is more suitable to
perform arithmetic operations as there is no need to involve
the sign of the number into consideration.

3. Which method of representation has two representations


for ‘0’ ?
a) Sign-magnitude
b) 1’s compliment
c) 2’s compliment
d) None of the mentioned
View Answer

Answer: a
Explanation: One is positive and one for negative.

4. When we perform subtraction on -7 and 1 the answer in


2’s compliment form is _________
a) 1010
b) 1110
c) 0110
d) 1000
View Answer

Answer: d
Explanation: First the 2’s compliment is found and that is
added to the number and the overflow is ignored.

5. When we perform subtraction on -7 and -5 the answer in


2’s compliment form is ________

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a) 11110
b) 1110
c) 1010
d) 0010
View Answer

Answer: b
Explanation: First the 2’s compliment is found and that is
added to the number and the overflow is ignored.

6. When we subtract -3 from 2 , the answer in 2’s


compliment form is _________
a) 0001
b) 1101
c) 0101
d) 1001
View Answer

Answer: c
Explanation: First the 2’s compliment is found and that is
added to the number and the overflow is ignored.

7. The processor keeps track of the results of its operations


using a flags called ________
a) Conditional code flags
b) Test output flags
c) Type flags
d) None of the mentioned
View Answer

Answer: a
Explanation: These flags are used to indicate if there is a
overflow or carry or zero result occurrence.

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8. The register used to store the flags is called as


_________
a) Flag register
b) Status register
c) Test register
d) Log register
View Answer

Answer: b
Explanation: The status register stores the condition codes
of the system.

9. The Flag ‘V’ is set to 1 indicates that,


a) The operation is valid
b) The operation is validated
c) The operation as resulted in an overflow
d) None of the mentioned
View Answer

Answer: c
Explanation: This is used to check the overflow occurrence
in the operation.

10. In some pipelined systems, a different instruction is


used to add to numbers which can affect the flags upon
execution. That instruction is _______
a) AddSetCC
b) AddCC
c) Add++
d) SumSetCC
View Answer

Answer: a

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Explanation: By using this instruction the condition flags


wont be affected at all.

11. The most efficient method followed by computers to


multiply two unsigned numbers is _______
a) Booth algorithm
b) Bit pair recording of multipliers
c) Restoring algorithm
d) Non restoring algorithm
View Answer

Answer: b
Explanation: None.

12. For the addition of large integers most of the systems


make use of ______
a) Fast adders
b) Full adders
c) Carry look-ahead adders
d) None of the mentioned
View Answer

Answer: c
Explanation: In this method the carries for each step are
generated first.

13. In a normal n-bit adder, to find out if an overflow as


occured we make use of ________
a) And gate
b) Nand gate
c) Nor gate
d) Xor gate
View Answer

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Answer: d
Explanation: None.

14. In the implementation of a Multiplier circuit in the system


we make use of _______
a) Counter
b) Flip flop
c) Shift register
d) Push down stack
View Answer

Answer: c
Explanation: The shift registers are used to store the
multiplied answer.

15. When 1101 is used to divide 100010010 the remainder


is ______
a) 101
b) 11
c) 0
d) 1
View Answer

Answer: d
Explanation: None.

Sanfoundry Global Education & Learning Series –


Computer Organization and Architecture.

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sanfoundry.com

Memory Locations & Addresses -


Computer Organization Questions
and Answers
by Manish
3 minutes

This set of Computer Organization and Architecture Multiple


Choice Questions & Answers (MCQs) focuses on “Memory
Locations and Addresses”.

1. The smallest entity of memory is called as _______


a) Cell
b) Block
c) Instance
d) Unit
View Answer

Answer: a
Explanation: Each data is made up of a number units.

2. The collection of the above mentioned entities where


data is stored is called as ______
a) Block
B) Set
c) Word
d) Byte

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View Answer

Answer: c
Explanation: Each readable part of data is called as blocks.

3. An 24 bit address generates an address space of ______


locations.
a) 1024
b) 4096
c) 2 48
d) 16,777,216
View Answer

Answer: d
Explanation: The number of addressable locations in the
system is called as address space.

4. If a system is 64 bit machine , then the length of each


word will be _______
a) 4 bytes
b) 8 bytes
c) 16 bytes
d) 12 bytes
View Answer

Answer: b
Explanation: A 64 bit system means, that at a time 64 bit
instruction can be executed.

5. The type of memory assignment used in Intel processors


is _____
a) Little Endian
b) Big Endian

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c) Medium Endian
d) None of the mentioned
View Answer

Answer: a
Explanation: The method of address allocation to data to be
stored is called as memory assignment.

6. When using the Big Endian assignment to store a


number, the sign bit of the number is stored in _____
a) The higher order byte of the word
b) The lower order byte of the word
c) Can’t say
d) None of the mentioned
View Answer

Answer: a
Explanation: None.

7. To get the physical address from the logical address


generated by CPU we use ____
a) MAR
b) MMU
c) Overlays
d) TLB
View Answer

Answer: b
Explanation: Memory Management Unit, is used to add the
offset to the logical address generated by the CPU to get
the physical address.

8. _____ method is used to map logical addresses of

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variable length onto physical memory.


a) Paging
b) Overlays
c) Segmentation
d) Paging with segmentation
View Answer

Answer: c
Explanation: Segmentation is a process in which memory is
divided into groups of variable length called segments.

9. During transfer of data between the processor and


memory we use ______
a) Cache
b) TLB
C) Buffers
d) Registers
View Answer

Answer: d
Explanation: None.

10. Physical memory is divided into sets of finite size called


as ______
a) Frames
b) Pages
c) Blocks
d) Vectors
View Answer

Answer: a
Explanation: None.

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Sanfoundry Global Education & Learning Series –


Computer Organization and Architecture.

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sanfoundry.com

Memory Operations &


Management Questions and
Answers
by Manish
3-4 minutes

This set of Computer Organization and Architecture Multiple


Choice Questions & Answers (MCQs) focuses on “Memory
Operations and Management”.

1. Add #%01011101,R1 , when this instruction is executed


then _________
a) The binary addition between the operands takes place
b) The Numerical value represented by the binary value is
added to the value of R1
c) The addition doesn’t take place , whereas this is similar
to a MOV instruction
d) None of the mentioned
View Answer

Answer: a
Explanation: This performs operations in binary mode
directly.

2. If we want to perform memory or arithmetic operations on


data in Hexa-decimal mode then we use ___ symbol before

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the operand.
a) ~
b) !
c) $
d) *
View Answer

Answer: c
Explanation: None.

3. When generating physical addresses from logical


address the offset is stored in _____
a) Translation look-aside buffer
b) Relocation register
c) Page table
d) Shift register
View Answer

Answer: b
Explanation: In the MMU the relocation register stores the
offset address.

4. The technique used to store programs larger than the


memory is ______
a) Overlays
b) Extension registers
c) Buffers
d) Both Extension registers and Buffers
View Answer

Answer: a
Explanation: In this, only a part of the program getting
executed is stored on the memory and later swapped in for

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the other part.

5. The unit which acts as an intermediate agent between


memory and backing store to reduce process time is _____
a) TLB’s
b) Registers
c) Page tables
d) Cache
View Answer

Answer: d
Explanation: The cache’s help in data transfers by storing
most recently used memory pages.

6. The Load instruction does the following operation/s,


a) Loads the contents of a disc onto a memory location
b) Loads the contents of a location onto the accumulators
c) Load the contents of the PCB onto the register
d) None of the mentioned
View Answer

Answer: b
Explanation: The load instruction is basically used to load
the contents of a memory location onto a register.

7. Complete the following analogy :- Registers are to RAM’s


as Cache’s are to _____
a) System stacks
b) Overlays
c) Page Table
d) TLB
View Answer

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Answer: d
Explanation: None.

8. The BOOT sector files of the system are stored in _____


a) Harddisk
b) ROM
c) RAM
d) Fast solid state chips in the motherboard
View Answer

Answer: b
Explanation: The files which are required for the starting up
of a system are stored on the ROM.

9. The transfer of large chunks of data with the involvement


of the processor is done by _______
a) DMA controller
b) Arbitrator
c) User system programs
d) None of the mentioned
View Answer

Answer: a
Explanation: This mode of transfer involves the transfer of a
large block of data from the memory.

10. Which of the following technique/s used to effectively


utilize main memory ?
a) Address binding
b) Dynamic linking
c) Dynamic loading
d) Both Dynamic linking and loading
View Answer

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Answer: c
Explanation: In this method only when the routine is
required is loaded and hence saves memory.

Sanfoundry Global Education & Learning Series –


Computer Organization and Architecture.

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sanfoundry.com

Computer Organization Questions


for Campus Interviews
by Manish
3-4 minutes

This set of Computer Organization Questions and Answers


for Campus interviews focuses on “Instructions and
Instruction Sequencing”.

1. RTN stands for ___________


a) Register Transfer Notation
b) Register Transmission Notation
c) Regular Transmission Notation
d) Regular Transfer Notation
View Answer

Answer:a
Explanation: This is the way of writing the assembly
language code with the help of register notations.

2. The instruction, Add Loc,R1 in RTN is _______


a) AddSetCC Loc+R1
b) R1=Loc+R1
c) Not possible to write in RTN
d) R1<-[Loc]+[R1].
View Answer

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Answer:d
Explanation: None.

3. Can you perform addition on three operands


simultaneously in ALN using Add instruction ?
a) Yes
b) Not possible using Add, we’ve to use AddSetCC
c) Not permitted
d) None of the mentioned
View Answer

Answer:c
Explanation: You cannot perform addition on three
operands simultaneously because the third operand is
where the result is stored.

4. The instruction, Add R1,R2,R3 in RTN is _______


a) R3=R1+R2+R3
b) R3<-[R1]+[R2]+[R3].
c) R3=[R1]+[R2].
d) R3<-[R1]+[R2].
View Answer

Answer:d
Explanation: In RTN the first operand is the destination and
the second operand is the source.

5. In a system, which has 32 registers the register id is


____ long.
a) 16 bit
b) 8 bits
c) 5 bits
d) 6 bits

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View Answer

Answer:c
Explanation: The ID is the name tag given to each of the
registers and used to identify them.

6. The two phases of executing an instruction are


__________
a) Instruction decoding and storage
b) Instruction fetch and instruction execution
c) Instruction execution and storage
d) Instruction fetch and Instruction processing
View Answer

Answer:b
Explanation: First, the instructions are fetched and decoded
and then they’re executed and stored.

7. The Instruction fetch phase ends with _________


a) Placing the data from the address in MAR into MDR
b) Placing the address of the data into MAR
c) Completing the execution of the data and placing its
storage address into MAR
d) Decoding the data in MDR and placing it in IR
View Answer

Answer:d
Explanation: The fetch ends with the instruction getting
decoded and being placed in the IR and the PC getting
incremented.

8. While using the iterative construct (Branching) in


execution ____ instruction is used to check the condition.

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a) TestAndSet
b) Branch
c) TestCondn
d) None of the mentioned
View Answer

Answer:b
Explanation: Branch instruction is used to check the test
condition and to perform the memory jump with help of
offset.

9. When using Branching, the usual sequencing of the PC


is altered. A new instruction is loaded which is called as
______
a) Branch target
b) Loop target
c) Forward target
d) Jump instruction
View Answer

Answer:a
Explanation: None.

10. The condition flag Z is set to 1 to indicate _______


a) The operation has resulted in an error
b) The operation requires an interrupt call
c) The result is zero
d) There is no empty register available
View Answer

Answer:c
Explanation: This condition flag is used to check if the
arithmetic operation yields a zero output.

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Sanfoundry Global Education & Learning Series –


Computer Organization and Architecture.

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sanfoundry.com

Assembly Language - Computer


Organization Questions and
Answers
by Manish
5-6 minutes

This set of Computer Organization and Architecture Multiple


Choice Questions & Answers (MCQs) focuses on
“Assembly Language”.

1. ____ converts the programs written in assembly


language into machine instructions.
a) Machine compiler
b) Interpreter
c) Assembler
d) Converter
View Answer

Answer: c
Explanation: The assembler is a software used to convert
the programs into machine instructions.

2. The instructions like MOV or ADD are called as ______


a) OP-Code
b) Operators
c) Commands

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d) None of the mentioned


View Answer

Answer: a
Explanation: This OP – codes tell the system what
operation to perform on the operands.

3. The alternate way of writing the instruction, ADD #5,R1 is


______
a) ADD [5],[R1];
b) ADDI 5,R1;
c) ADDIME 5,[R1];
d) There is no other way
View Answer

Answer: b
Explanation: The ADDI instruction, means the addition is in
immediate addressing mode.

4. Instructions which wont appear in the object program are


called as _____
a) Redundant instructions
b) Exceptions
c) Comments
d) Assembler Directives
View Answer

Answer: d
Explanation: The directives help the program in getting
compiled and hence wont be there in the object code.

5. The assembler directive EQU, when used in the


instruction : Sum EQU 200 does ________

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a) Finds the first occurrence of Sum and assigns value 200


to it
b) Replaces every occurrence of Sum with 200
c) Re-assigns the address of Sum by adding 200 to its
original address
d) Assigns 200 bytes of memory starting the location of
Sum
View Answer

Answer: b
Explanation: This basically is used to replace the variable
with a constant value.

6. The purpose of the ORIGIN directive is __________


a) To indicate the starting position in memory, where the
program block is to be stored
b) To indicate the starting of the computation code
c) To indicate the purpose of the code
d) To list the locations of all the registers used
View Answer

Answer: a
Explanation: This does the function similar to the main
statement.

7. The directive used to perform initialization before the


execution of the code is ______
a) Reserve
b) Store
c) Dataword
d) EQU
View Answer

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Answer: c
Explanation: None.

8. _____ directive is used to specify and assign the memory


required for the block of code.
a) Allocate
b) Assign
c) Set
d) Reserve
View Answer

Answer: d
Explanation: This instruction is used to allocate a block of
memory and to store the object code of the program there.

9. _____ directive specifies the end of execution of a


program.
a) End
b) Return
c) Stop
d) Terminate
View Answer

Answer: b
Explanation: This instruction directive is used to terminate
the program execution.

10. The last statement of the source program should be


_______
a) Stop
b) Return
c) OP
d) End

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View Answer

Answer: d
Explanation: This enables the processor to load some other
process.

11. When dealing with the branching code the assembler


___________
a) Replaces the target with its address
b) Does not replace until the test condition is satisfied
c) Finds the Branch offset and replaces the Branch target
with it
d) Replaces the target with the value specified by the
DATAWORD directive
View Answer

Answer: c
Explanation: When the assembler comes across the branch
code, it immediately finds the branch offset and replaces it
with it.

12. The assembler stores all the names and their


corresponding values in ______
a) Special purpose Register
b) Symbol Table
c) Value map Set
d) None of the mentioned
View Answer

Answer: b
Explanation: The table where the assembler stores the
variable names along with their corresponding memory
locations and values.

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13. The assembler stores the object code in ______


a) Main memory
b) Cache
c) RAM
d) Magnetic disk
View Answer

Answer: d
Explanation: After compiling the object code, the assembler
stores it in the magnetic disk and waits for further
execution.

14. The utility program used to bring the object code into
memory for execution is ______
a) Loader
b) Fetcher
c) Extractor
d) Linker
View Answer

Answer: a
Explanation: The program which is used to load the
program into memory.

15. To overcome the problems of the assembler in dealing


with branching code we use _____
a) Interpreter
b) Debugger
c) Op-Assembler
d) Two-pass assembler
View Answer

Answer: d

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Explanation: This creates entries into the symbol table first


and then creates the object code.

Sanfoundry Global Education & Learning Series –


Computer Organization and Architecture.

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sanfoundry.com

Subroutines & Nesting - Computer


Organization Questions and
Answers
by Manish
3-4 minutes

This set of Computer Organization and Architecture Multiple


Choice Questions & Answers (MCQs) focuses on
“Subroutines and Nesting”.

1. The return address of the Sub-routine is pointed to by


_______
a) IR
b) PC
c) MAR
d) Special memory registers
View Answer

Answer: b
Explanation: The return address from the sub routine is
pointed to by the PC.

2. The location to return to, from the subroutine is stored in


_______
a) TLB
b) PC

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c) MAR
d) Link registers
View Answer

Answer: d
Explanation: The registers store the return address of the
routine and is pointed to by the PC.

3. Subroutine nesting means,


a) Having multiple subroutines in a program
b) Using a linking nest statement to put many sub routines
under the same name
c) Having one routine call the other
d) None of the mentioned
View Answer

Answer: c
Explanation: None.

4. The order in which the return addresses are generated


and used is _________
a) LIFO
b) FIFO
c) Random
d) Highest priority
View Answer

Answer: a
Explanation: That is the routine called first is returned first.

5. In case of nested subroutines the return addresses are


stored in __________
a) System heap

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b) Special memory buffers


c) Processor stack
d) Registers
View Answer

Answer: c
Explanation: In this case, there will be more number of
return addresses it is stored on the processor stack.

6. The appropriate return addresses is obtained by the help


of ____ in case of nested routines.
a) MAR
b) MDR
c) Buffers
d) Stack-pointers
View Answer

Answer: d
Explanation: The pointers are used to point to the location
on the stack where the address is stored.

7. When, parameters are being passed on to the


subroutines they are stored in ________
a) Registers
b) Memory locations
c) Processor stacks
d) All of the mentioned
View Answer

Answer: d
Explanation: In case of, parameter passing the data can be
stored on any of the storage space.

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8. The most efficient way of handling parameter passing is


by using ______
a) General purpose registers
b) Stacks
c) Memory locations
d) None of the mentioned
View Answer

Answer: a
Explanation: By using general purpose registers for the
parameter passing we make the process more efficient.

9. The most Flexible way of logging the return addresses of


the sub routines is by using _______
a) Registers
b) Stacks
c) Memory locations
d) None of the mentioned
View Answer

Answer: b
Explanation: The stacks are used as Logs for return
addresses of the sub routines.

10. The wrong statement/s regarding interrupts and


subroutines among the following is/are ______
i) The sub-routine and interrupts have a return statement
ii) Both of them alter the content of the PC
iii) Both are software oriented
iv) Both can be initiated by the user
a) i,ii and iv
b) ii and iii

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c) iv
d) iii and iv
View Answer

Answer: d
Explanation: None.

Sanfoundry Global Education & Learning Series –


Computer Organization and Architecture.

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sanfoundry.com

Computer Organization Questions


for Entrance Exams
by Manish
3-4 minutes

This set of Computer Organization Questions and Answers


for Entrance exams focuses on “Parameter Passing and
Stack Frame”.

1. The private work space dedicated to a subroutine is


called as ________
a) System heap
b) Reserve
c) Stack frame
d) Allocation
View Answer

Answer: c
Explanation: This work space is where the intermediate
values of the sub routines is stored.

2. If, the sub routine exceeds the private space allocated to


it then the values are pushed onto _________
a) Stack
b) System heap
c) Reserve Space

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d) Stack frame
View Answer

Answer: a
Explanation: If the allocated work space is exceeded then
the data is pushed onto the system stack.

3. ______ pointer is used to point to parameters passed or


local parameters of the sub routine.
a) Stack pointer
b) Frame pointer
c) Parameter register
d) Log register
View Answer

Answer: b
Explanation: This pointer is used to track the current
position of the stack being used.

4. The reserved memory or private space of the sub


routine, gets deallocated when _______
a) The stop instruction is executed by the routine
b) The pointer reaches the end of the space
c) When the routine’s return statement is executed
d) None of the mentioned
View Answer

Answer: c
Explanation: The work space allocated to a sub routine gets
de allocated when the routine is completed.

5. The private space gets allocated to each sub routine


when _________

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a) The first statement of the routine is executed


b) When the context switch takes place
c) When the routine gets called
d) When the Allocate instruction is executed
View Answer

Answer: c
Explanation: When the call statement is executed,
simultaneously the space also gets allocated.

6. _____ the most suitable data structure used to store the


return addresses in case of nested sub routines.
a) Heap
b) Stack
c) Queue
d) List
View Answer

Answer: b
Explanation: None.

7. In case of nested sub routines the stack top is always


_________
a) The saved contents of the called sub routine
b) The saved contents of the calling sub routine
c) The return addresses of the called sub routine
d) None of the mentioned
View Answer

Answer: a
Explanation: None.

8. The stack frame for each sub routine is present in

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______
a) Main memory
b) System Heap
c) Processor Stack
d) None of the mentioned
View Answer

Answer: c
Explanation: The memory for the work space is allocated
from the processor stack.

9. The data structure suitable for scheduling processes is


_______
a) List
b) Heap
c) Queue
d) Stack
View Answer

Answer: c
Explanation: The Queue data structure is generally used for
scheduling as it is two directional.

10. The sub-routine service procedure, is similar to that of


the interrupt service routine in ________
a) Method of context switch
b) Returning
c) Process execution
d) Method of context switch & Process execution
View Answer

Answer: d
Explanation: The Sub routine service procedure is same as

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the interrupt service routine in all aspects, except the fact


that interrupt might not be related to the process being
executed.

Sanfoundry Global Education & Learning Series –


Computer Organization and Architecture.

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