HA-5020/883

100MHz Current Feedback

January 1996 Video Amplifier with Disable

Features Description
• This Circuit is Processed in Accordance to MIL-STD- The HA-5020/883 is a wide bandwidth, high slew rate
883 and is Fully Conformant Under the Provisions of amplifier optimized for video applications and gains between
Paragraph 1.2.1. 1 and 10. Manufactured on Intersil’s Reduced Feature
Complementary Bipolar DI process, this amplifier uses cur-
• Wide Unity Gain Bandwidth . . . . . . . . . . 105MHz (Min)
rent mode feedback to maintain higher bandwidth at a given
• Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 800V/µs gain than conventional voltage feedback amplifiers. Since it
is a closed loop device, the HA-5020/883 offers better gain
• Output Current . . . . . . . . . . . . . . . . . . . . . . ±30mA (Min)
accuracy and lower distortion than open loop buffers.
• Drives 3.5V into 75Ω The HA-5020/883 features low differential gain and phase and
• Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . 0.025% will drive two double terminated 75Ω coax cables to video
levels with low distortion. Adding a gain flatness performance
• Differential Phase. . . . . . . . . . . . . . . . . . . . . . .0.025 Deg of 0.1dB makes this amplifier ideal for demanding video
• Low Input Noise Voltage . . . . . . . . . . . . . . . . 4.5nV/√Hz applications. The bandwidth and slew rate of the HA-5020/
883 are relatively independent of closed loop gain. The
• Low Supply Current. . . . . . . . . . . . . . . . . . . 10mA (Max) 105MHz unity gain bandwidth only decreases to 77MHz at a
• Wide Supply Range . . . . . . . . . . . . . . . . . . . ±5V to ±15V gain of 10. The HA-5020/883 used in place of a conventional
op amp will yield a significant improvement in the speed
• Output Enable/Disable power product. To further reduce power, the HA-5020/883 has
• High Performance Replacement for EL2020/883 a disable function which significantly reduces supply current,
while forcing the output to a true high impedance state. This
allows the outputs of multiple amplifiers to be wire-OR’d into
Applications multiplexer configurations. The device also includes output
• Unity Gain Video/Wideband Buffer short circuit protection and output offset voltage adjustment.

• Video Gain Block The HA-5020/883 offers significant enhancements over

competing amplifiers, such as the EL2020. Improvements
• Video Distribution Amp/Coax Cable Driver include unity gain bandwidth, slew rate, video performance,
• Flash A/D Driver lower supply current, and superior DC specifications.

• Waveform Generator Output Driver Ordering Information

• Current to Voltage Converter; D/A Output Buffer PART TEMPERATURE
NUMBER RANGE PACKAGE
• Radar Systems
HA7-5020/883 -55oC to +125oC 8 Lead CerDIP
• Imaging Systems
HA4-5020/883 -55oC to +125oC 20 Lead Ceramic LCC

Pinouts
HA-5020/883 HA-5020/883
(CERDIP) (CLCC)
TOP VIEW TOP VIEW
DISABLE

BAL 1 8 DISABLE
BAL
NC

NC

NC

-IN 2 - 7 V+ 3 2 1 20 19
+
+IN 3 6 OUT NC 4 18 NC

V- 4 5 BAL NC 5 17 NC
-IN 6 - 16 V+
+
NC 7 15 NC
+IN 8 14 OUT
9 10 11 12 13
V-
NC
NC
BAL
NC

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. Spec Number 511080-883
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
3-94 File Number 3541.2
 Specifications HA-5020/883

Absolute Maximum Ratings Thermal Information (Typical)

Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . . 36V Thermal Package Characteristics θJA θJC
Differential Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V CerDIP Package . . . . . . . . . . . . . . . . . . . . . . 115oC/W 30oC/W
Voltage at Either Input Terminal . . . . . . . . . . . . . . . . . . . . . . V+ to V- Ceramic LCC Package . . . . . . . . . . . . . . . . . 75oC/W 23oC/W
Peak Output Current. . . . . . . . . . . . . . . . Full Short Circuit Protected Package Power Dissipation Limit at +75oC for TJ ≤ +175oC
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.87W
Storage Temperature Range . . . . . . . . . . . . . . . . . -65oC to +150oC Ceramic LCC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.33W
ESD Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . < 2000V Package Power Dissipation Derating Factor Above +75oC
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.7mW/oC
Ceramic LCC Package . . . . . . . . . . . . . . . . . . . . . . . . 13.3mW/oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

Operating Conditions
Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC VINCM ≤ 1/2(V+ - V-) RF = 1kΩ
Operating Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . ±5V to ±15V RL ≥ 400Ω VDISABLE = V+ or 0V

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

Device Tested at: Supply Voltage = ±15V, RSOURCE = 0Ω, AVCL = +1, RF = 1kΩ, RLOAD = 400Ω, VOUT = 0V, VDISABLE = V+,
Unless Otherwise Specified.

LIMITS
GROUP A
PARAMETERS SYMBOL CONDITIONS SUBGROUP TEMPERATURE MIN MAX UNITS
Input Offset Voltage VIO VCM = 0V 1 +25oC -8 8 mV
2, 3 +125oC, -55oC -10 10 mV
Common Mode +CMRR ∆VCM = +10V, V+ = 5V, 1 +25oC 60 - dB
Rejection Ratio V- = -25V
2, 3 +125oC, -55oC 50 - dB
-CMRR ∆VCM = -10V, V+ = 25V, 1 +25oC 60 - dB
V- = -5V
2, 3 +125oC, -55oC 50 - dB
Power Supply Rejection +PSRR ∆VSUP = 13.5V, 1 +25oC 64 - dB
Ratio V+ = 4.5V, V- = -15V;
2, 3 +125oC, -55oC 60 - dB
V+ = 18V, V- = -15V
-PSRR ∆VSUP = 13.5V, 1 +25oC 64 - dB
V+ = 15V, V- = -4.5V;
2, 3 +125oC, -55oC 60 - dB
V+ = 15V, V- = -18V
Non-Inverting (+IN) IBP VCM = 0V 1 +25oC -8 8 µA
Current
2, 3 +125oC, -55oC -20 20 µA
+IN Common Mode IBPCMP ∆VCM = +10V, V+ = 5V, 1 +25oC - 0.1 µA/V
Rejection V- = -25V
2, 3 +125oC, -55oC - 0.5 µA/V
IBPCMN ∆VCM = -10V, V+ = 25V, 1 +25oC - 0.1 µA/V
V- = -5V
2, 3 +125oC, -55oC - 0.5 µA/V
Non-Inverting (+IN) Input +RIN Calculated 1/IBPCMP 1 +25oC 10 - MΩ
Impedance
2, 3 +125oC, -55oC 2 - MΩ
+IN Power Supply IBPPSP ∆VSUP = 13.5V, 1 +25oC - 0.06 µA/V
Rejection V+ = 4.5V, V- = -15V;
2, 3 +125oC, -55oC - 0.2 µA/V
V+ = 18V, V- = -15V
IBPPSN ∆VSUP = 13.5V, 1 +25oC - 0.06 µA/V
V+ = 15V, V- = -4.5V;
2, 3 +125oC, -55oC - 0.2 µA/V
V+ = 15V, V- = -18V
Inverting Input (-IN) IBN VCM = 0V 1 +25oC -20 20 µA
Current
2, 3 +125oC, -55oC -50 50 µA

Spec Number 511080-883

3-95
 Specifications HA-5020/883

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)

Device Tested at: Supply Voltage = ±15V, RSOURCE = 0Ω, AVCL = +1, RF = 1kΩ, RLOAD = 400Ω, VOUT = 0V, VDISABLE = V+,
Unless Otherwise Specified.

LIMITS
GROUP A
PARAMETERS SYMBOL CONDITIONS SUBGROUP TEMPERATURE MIN MAX UNITS
-IN Common Mode IBNCMP ∆VCM = +10V, V+ = 5V, 1 +25oC - 0.4 µA/V
Rejection V- = -25V
2, 3 +125oC, -55oC - 0.5 µA/V
IBNCMN ∆VCM = -10V, V+ = 25V, 1 +25oC - 0.4 µA/V
V- = -5V
2, 3 +125oC, -55oC - 0.5 µA/V
-IN Power Supply IBNPSP ∆VSUP = 13.5V, 1 +25 Co
- 0.2 µA/V
Rejection V+ = 4.5V, V- = -15V;
2, 3 +125oC, -55oC - 0.5 µA/V
V+ = 18V, V- = -15V
IBNPSN ∆VSUP = 13.5V, 1 +25oC - 0.2 µA/V
V+ = 15V, V- = -4.5V;
2, 3 o
+125 C, -55 Co
- 0.5 µA/V
V+ = 15V, V- = -18V
Common Mode Range +CMR V+ = 5V, V- = -25V 1 +25oC 10 - V
2, 3 +125oC, -55oC 10 - V
-CMR V+ = 25V, V- = -5V 1 +25oC - -10 V
2, 3 +125oC, -55oC - -10 V
Transimpedance +AZOL1 RL = 400Ω, VOUT = 0 to 1 +25oC 1 - MΩ
10V
2, 3 +125oC, -55oC 1 - MΩ
-AZOL1 RL = 400Ω, VOUT = 0 to 1 +25oC 1 - MΩ
-10V
2, 3 +125oC, -55oC 1 - MΩ
Output Voltage Swing +VOUT VIN = 12.8V 1, 2 +25oC, +125oC 12 - V
3 -55oC 11 - V
-VOUT VIN = -12.8V 1, 2 +25oC, +125oC - -12 V
3 -55oC - -11 V
+VOUT5 V+ = 5V, V- = -5V, 1 +25oC 2 - V
VIN = 3V
2, 3 +125oC, -55oC 2 - V
-VOUT5 V+ = 5V, V- = -5V, 1 +25oC - -2 V
VIN = -3V
2, 3 +125oC, -55oC - -2 V
Output Current +IOUT Note 1 1, 2 +25oC, +125oC 30 - mA
3 -55oC 27.5 - mA
-IOUT Note 1 1, 2 +25oC, +125oC - -30 mA
3 -55oC - -27.5 mA
Short Circuit Output +ISC RL = Open, VIN = 10V 1 +25oC 50 - mA
Current
2, 3 +125oC, -55oC 50 - mA
-ISC RL = Open, VIN = -10V 1 +25oC - -50 mA
2, 3 +125oC, -55oC - -50 mA
Disabled Output Current +ILEAK VIN = 0V, VOUT = +10V, 1 +25oC -1 1 µA
RL = Open, VDIS = 0V
3 -55oC -1 1 µA
VIN = 2V 2 +125oC -1 1 µA
-ILEAK VIN = 0V, VOUT = -10V, 1 +25oC -1 1 µA
RL = Open, VDIS = 0V
3 -55oC -1 1 µA
VIN = -2V 2 +125oC -1 1 µA

Spec Number 511080-883

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 Specifications HA-5020/883

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)

Device Tested at: Supply Voltage = ±15V, RSOURCE = 0Ω, AVCL = +1, RF = 1kΩ, RLOAD = 400Ω, VOUT = 0V, VDISABLE = V+,
Unless Otherwise Specified.

LIMITS
GROUP A
PARAMETERS SYMBOL CONDITIONS SUBGROUP TEMPERATURE MIN MAX UNITS
Disable Pin Input Current ILOGIC VDIS = 0V 1, 2 +25oC, +125oC -1 0 mA
3 -55oC -1.5 0 mA
Minimum DISABLE Pin IDIS Note 2 1 +25oC - 350 µA
Current to Disable
2, 3 +125oC, -55oC - 350 µA
Maximum DISABLE Pin IEN Note 3 1 +25 Co
20 - µA
Current to Enable
2, 3 +125oC, -55oC 20 - µA
Quiescent Power Supply ICC RL = 400Ω 1 +25oC - 10 mA
Current o o
2, 3 +125 C, -55 C - 10 mA
IEE RL = 400Ω 1 +25oC -10 - mA
2, 3 +125oC, -55oC -10 - mA
Disabled Power Supply ICCDIS RL = 400Ω, VDIS = 0V 1 +25oC - 5.6 mA
Current
2, 3 +125oC, -55oC - 7.5 mA
IEEDIS RL = 400Ω, VDIS = 0V 1 +25oC -5.6 - mA
2, 3 +125oC, -55oC -7.5 - mA
Offset Voltage +VADJ Note 4 1 +25oC 30 - mV
Adjustment
2, 3 +125oC, -55oC 25 - mV
-VADJ Note 4 1 +25oC - -30 mV
2, 3 +125oC, -55oC - -25 mV
NOTES:
1. Guaranteed from VOUT test by IOUT = VOUT/400Ω.
2. This is the minimum current which must be sourced from the DISABLE pin, to disable the output. The output is considered disabled when
VOUT ≤ 10mV. Conditions are: VIN = 10V, RL = 100Ω. The test is performed by sourcing 350µA from the DISABLE pin, and testing that
the output decreases below the test limit (10mV).
3. This is the maximum current that can be sourced from the DISABLE pin with the device remaining enabled. The device is considered
disabled when the supply current decreases by at least 0.5mA. Conditions are: RL = 400Ω. Test is performed by sourcing 20µA from the
DISABLE pin, and testing that the supply current decreases by no more than the test limit (0.5mA).
4. The offset adjustment range is referred to the output. The inverting input current (-IBIAS) can be adjusted with an external pot between pins
1 and 5, wiper connected to V+. Since -IBIAS flows through RF , an adjustment of offset voltage results. The amount of offset adjustment is
proportional to the value of RF . Test conditions are: RL = Open, 10kΩ from pin 5 to V+, 1kΩ from pin 1 to V+, for +VADJ; RL = Open, 1kΩ
from pin 5 to V+, 10kΩ from pin 1 to V+, for -VADJ.

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS

Device Tested at: Supply Voltage = ±15V, RSOURCE = 50Ω, RLOAD = 400Ω, CLOAD ≤ 10pF, AVCL = +1V/V, Unless Otherwise Specified.

LIMITS
GROUP A
PARAMETERS SYMBOL CONDITIONS SUBGROUP TEMPERATURE MIN MAX UNITS
Slew Rate +SR VIN = -10V to +10V 4 +25oC 600 - V/µs
5, 6 +125oC, -55oC 400 - V/µs
-SR VIN = +10V to -10V 4 +25oC 600 - V/µs
5, 6 +125oC, -55oC 400 - V/µs

Spec Number 511080-883

3-97
 Specifications HA-5020/883

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS

Device Characterized at: Supply Voltage = ±15V, RSOURCE = 50Ω, RLOAD = 400Ω, RF = 1kΩ, VDISABLE = V+, CLOAD ≤ 10pF, AVCL = +1V/V,
Unless Otherwise Specified.

LIMITS

PARAMETERS SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS

-3dB Bandwidth BW1 VO = 100mVRMS, AV = +1 1 +25oC 105 - MHz

BW10 VO = 100mVRMS, AV = +10, 1 +25oC 77 - MHz

RF = 360Ω, RL = Open

Gain Flatness GF5 VO = 100mVRMS, f = 5MHz 1 +25oC -0.075 +0.075 dB

GF10 VO = 100mVRMS, f = 10MHz 1 +25oC -0.2 +0.2 dB

Rise Time tR VO = 0V to 1V, RL = 100Ω 1, 2 +25oC - 3.7 ns

Fall Time tF VO = 1V to 0V, RL = 100Ω 1, 3 +25oC - 4.0 ns

Overshoot +OVS VO = 0V to 1V, RL = 100Ω 1 +25oC - 18.0 %

-OVS VO = 1V to 0V, RL = 100Ω 1 +25oC - 16.6 %

Slew Rate +SR10 VO = -10V to 10V, AV = +10, 1, 4 +25oC 1070 - V/µs

RF = 360Ω, RL = Open

-SR10 VO = 10V to -10V, AV = +10, 1, 5 +25oC 860 - V/µs

RF = 360Ω, RL = Open

Disable Time +tDIS VO = 2V to 0V, 50% of VDIS to 1, 6 +25oC - 3.13 µs

90% VO

-tDIS VO = -2V to 0V, 50% of VDIS to 1, 6 +25oC - 2.44 µs

90% VO

Enable Time +tEN VO = 0V to 2V, 50% to 90% 1, 7 +25oC - 1.45 µs

-tEN VO = 0V to -2V, 50% to 90% 1, 7 +25oC - 1.49 µs

NOTES:
1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These param-
eters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization
based upon data from multiple production runs which reflect lot to lot and within lot variation.
2. Measured from 10% to 90% of the output waveform.
3. Measured from 90% to 10% of the output waveform.
4. Measured from 25% to 75% of the output waveform.
5. Measured from 75% to 25% of the output waveform.
6. DISABLE = +15V to 0V. Measured from the 50% of DISABLE to VOUT = ±200mV.
7. DISABLE = 0V to +15V. Measured from the 50% of DISABLE to VOUT = ±1.8V.

TABLE 4. ELECTRICAL TEST REQUIREMENTS

MIL-STD-883 TEST REQUIREMENTS SUBGROUPS (SEE TABLES 1 AND 2)

Interim Electrical Parameters (Pre Burn-In) 1

Final Electrical Test Parameters 1 (Note 1), 2, 3, 4, 5, 6

Group A Test Requirements 1, 2, 3, 4, 5, 6

Groups C and D Endpoints 1

NOTE:
1. PDA applies to Subgroup 1 only.

Spec Number 511080-883

3-98
 HA-5020/883

Die Characteristics
DIE DIMENSIONS:
65 x 60 x 19 mils ± 1 mils
1640µm x 1520µm x 483µm ± 25.4µm
METALLIZATION:
Type: Al, 1% Cu
Thickness: 16kÅ ± 2kÅ
WORST CASE CURRENT DENSITY:
5.77 x 104 A/cm2 at 30mA
SUBSTRATE POTENTIAL (Powered Up): V-
GLASSIVATION:
Type: Nitride over Silox
Silox Thickness: 12kÅ ± 2kÅ
Nitride Thickness: 3.5kÅ ± 1kÅ
TRANSISTOR COUNT: 62
PROCESS: Bipolar Dielectric Isolation

Metallization Mask Layout

HA-5020/883

BAL DISABLE V+

-IN 2 1 8 7

6 OUT

+IN 3 4 5

V- BAL

Spec Number 511080-883

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 HA-5020/883

Test Circuit (Applies to Table 1)

K9 1K
BAL. ADJ.
10K

K10 1K

10K

V+
ICC 10 0.1

VY
500 -IBIAS =
1K 100K
(0.01%) -
0.1 VY
+
x100
VX 7
VIO = 500 1
100 2 5
- 1K
- 6
VX 0.1 500 DUT VOUT
+ K7 3
x100 +
8 400 100
200pF 150pF 4
K12
200K (0.1%) K1
VZ K3 K4
+IBIAS =
200K
VZ - 10 0.1
+ VDISABLE
HA-5177

VIN IEE NOTE: All Resistors = ±1% (Ω)

All Capacitors = ±10% (µF)
Unless Otherwise Noted
V-

Test Waveforms
SIMPLIFIED TEST CIRCUIT FOR LARGE AND SMALL SIGNAL PULSE RESPONSE (Applies to Tables 2 and 3)
AV = +1 TEST CIRCUIT AV = +10 TEST CIRCUIT
V+ V+

VDISABLE VDISABLE
VIN + VIN +
VOUT VOUT
- RS -
RS RF
50Ω RL CL RL 50Ω 360Ω

1kΩ RG
V- V- 40Ω

NOTE: VS = ±15V, AV = +1, CL ≤ 10pF NOTE: VS = ±15V, AV = +10, CL ≤ 10pF

RF = 1kΩ, RS = 50Ω RF = 360Ω, RG = 40Ω
RL = 400Ω For Large Signal RS = 50Ω, RL = Open
RL = 100Ω For Small Signal

LARGE SIGNAL WAVEFORM SMALL SIGNAL WAVEFORM

VOUT VOUT
+10V +10V +1V +1V
90% 90%
75% 75%
+SR, +SR10 -SR, -SR10 tr, +OVS tf, -OVS
25% 25%
10% 10%
-10V -10V 0V 0V

NOTE: AV = +1: +SR, -SR

AV = +10: +SR10, -SR10

Spec Number 511080-883

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 HA-5020/883

Test Waveforms (Continued)

SIMPLIFIED TEST CIRCUIT FOR ENABLE/DISABLE TIMES

V+
VDISABLE
VIN + VOUT
-
RF CL RL

1kΩ
V-

NOTE: VS = ±15V, AV = +1, CL ≤ 10pF

RF = 1kΩ, RL = 400Ω

POSITIVE ENABLE/DISABLE SWITCHING WAVEFORMS NEGATIVE ENABLE/DISABLE SWITCHING WAVEFORMS

VDISABLE VDISABLE
+15V +15V +15V +15V

50% 50% 50% 50%

0V 0V 0V 0V

VOUT VOUT
+2V +2V 0V 0V
90% 90%

10% 10%
0V 0V -2V -2V
+tDIS +tEN -tDIS -tEN

Spec Number 511080-883

3-101
 HA-5020/883

Burn-In Circuits
HA7-5020/883 CERAMIC DIP

R3

1 8
R1
2 - 7 V+
R2
+ C1 D1
3 6

V- 4 5
D2 C2

Spec Number 511080-883

3-102
 HA-5020/883

Schematic Diagram
BAL BAL

V+

5Ibn

VDISABLE

OUT
+IN -IN +1

IREF

5Ibp
V-

Spec Number 511080-883

3-103
 HA-5020/883

Packaging
c1 LEAD FINISH
F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A)
-A- -D- 8 LEAD DUAL-IN-LINE FRIT-SEAL CERAMIC PACKAGE
BASE (c)
INCHES MILLIMETERS
METAL
E SYMBOL MIN MAX MIN MAX NOTES
b1 A - 0.200 - 5.08 -
M M
-B- b 0.014 0.026 0.36 0.66 2
(b)
b1 0.014 0.023 0.36 0.58 3
SECTION A-A
bbb S C A-B S D S b2 0.045 0.065 1.14 1.65 -
D b3 0.023 0.045 0.58 1.14 4
BASE
PLANE Q c 0.008 0.018 0.20 0.46 2
-C- A
SEATING c1 0.008 0.015 0.20 0.38 3
PLANE L α D - 0.405 - 10.29 5
S1 eA E 0.220 0.310 5.59 7.87 5
A A
b2 e 0.100 BSC 2.54 BSC -
b e eA/2 c eA 0.300 BSC 7.62 BSC -
ccc M C A-B S D S aaa M C A - B S D S eA/2 0.150 BSC 3.81 BSC -
L 0.125 0.200 3.18 5.08 -
Q 0.015 0.060 0.38 1.52 6
NOTES:
S1 0.005 - 0.13 - 7
1. Index area: A notch or a pin one identification mark shall be locat-
ed adjacent to pin one and shall be located within the shaded S2 0.005 - 0.13 - -
area shown. The manufacturer’s identification shall not be used α 90o 105o 90o 105o -
as a pin one identification mark. aaa - 0.015 - 0.38 -
2. The maximum limits of lead dimensions b and c or M shall be bbb - 0.030 - 0.76 -
measured at the centroid of the finished lead surfaces, when ccc - 0.010 - 0.25 -
solder dip or tin plate lead finish is applied.
M - 0.0015 - 0.038 2
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
N 8 8 8
M applies to lead plating and finish thickness.
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b1.
5. This dimension allows for off-center lid, meniscus, and glass
overrun.
6. Dimension Q shall be measured from the seating plane to the
base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling Dimension: Inch.
11. Lead Finish: Type A.
12. Materials: Compliant to MIL-M-38510.

Spec Number 511080-883

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 HA-5020/883

Packaging (Continued)

D
J20.A MIL-STD-1835 CQCC1-N20 (C-2)
20 PAD METAL SEAL LEADLESS CERAMIC CHIP CARRIER
D3
INCHES MILLIMETERS
jx 45o
SYMBOL MIN MAX MIN MAX NOTES
A 0.060 0.100 1.52 2.54 6, 7
A1 0.050 0.088 1.27 2.23 7
B - - - - 4
B1 0.022 0.028 0.56 0.71 2, 4
E3 E
B B2 0.072 REF 1.83 REF -
B3 0.006 0.022 0.15 0.56 -
D 0.342 0.358 8.69 9.09 -
D1 0.200 BSC 5.08 BSC -
D2 0.100 BSC 2.54 BSC -
h x 45o D3 - 0.358 - 9.09 2
E 0.342 0.358 8.69 9.09 -
E1 0.200 BSC 5.08 BSC -
A A1 E2 0.100 BSC 2.54 BSC -
E3 - 0.358 - 9.09 2
PLANE 2 e 0.050 BSC 1.27 BSC -
e1 0.015 - 0.38 - 2
PLANE 1
h 0.040 REF 1.02 REF 5
j 0.020 REF 0.51 REF 5
L 0.045 0.055 1.14 1.40 -
L3
L e L1 0.045 0.055 1.14 1.40 -
L2 0.075 0.095 1.90 2.41 -
L3 0.003 0.015 0.08 0.38 -
ND 5 5 3
NE 5 5 3
N 20 20 3
B1 B3
E1 NOTES:
1. Metallized castellations shall be connected to plane 1 terminals
E2 L2 and extend toward plane 2 across at least two layers of ceramic
B2 or completely across all of the ceramic layers to make electrical
connection with the optional plane 2 terminals.
2. Unless otherwise specified, a minimum clearance of 0.015 inch
L1
(0.381mm) shall be maintained between all metallized features
D2
(e.g., lid, castellations, terminals, thermal pads, etc.)
e1
3. Symbol “N” is the maximum number of terminals. Symbols “ND”
D1
and “NE” are the number of terminals along the sides of length
“D” and “E”, respectively.
4. The required plane 1 terminals and optional plane 2 terminals
shall be electrically connected.
5. The corner shape (square, notch, radius, etc.) may vary at the
manufacturer’s option, from that shown on the drawing.
6. Chip carriers shall be constructed of a minimum of two ceramic
layers.
7. Maximum limits allows for 0.007 inch solder thickness on pads.
8. Lead Finish: Type A.
9. Materials: Compliant to MIL-M-38510.

Spec Number 511080-883

3-105
 HA-5020
DESIGN INFORMATION 100MHz Current Feedback
December 1999
Video Amplifier with Disable

The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application
and design information only. No guarantee is implied.

Typical Performance Curves VSUPPLY = ±15V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = +25oC, Unless Otherwise Specified

INPUT NOISE vs FREQUENCY INPUT OFFSET VOLTAGE vs TEMPERATURE

Average of 18 Units from 3 Lots Absolute Value Average of 30 Units from 3 Lots
100 100 2.5
AV = +10

INPUT NOISE CURRENT (pA√Hz)

INPUT NOISE VOLTAGE (nV√Hz)

2.0

OFFSET VOLTAGE (mV)

-INPUT NOISE CURRENT
VSUPPLY = ±15V
1.5
10 10
VSUPPLY = ±4.5V
INPUT NOISE VOLTAGE 1.0

0.5 VSUPPLY = ±10V

+INPUT NOISE CURRENT

1 1 0.0
10 100 1K 10K 100K -60 -40 -20 0 20 40 60 80 100 120 140
FREQUENCY (Hz) TEMPERATURE (oC)

+INPUT BIAS CURRENT vs TEMPERATURE -INPUT BIAS CURRENT vs TEMPERATURE

Average of 30 Units from 3 Lots Absolute Value Average of 30 Units from 3 Lots
0 2.0

-0.5 1.8
BIAS CURRENT (µA)

BIAS CURRENT (µA)

-1.0 1.6 VSUPPLY = ±15V

VSUPPLY = ±15V
VSUPPLY = ±10V VSUPPLY = ±10V
-1.5 1.4

VSUPPLY = ±4.5V
-2.0 1.2
VSUPPLY = ±4.5V

-2.5 1.0
-60 -40 -20 0 20 40 60 80 100 120 140 -60 -40 -20 0 20 40 60 80 100 120 140
TEMPERATURE (oC) TEMPERATURE (oC)

Spec Number 511080-883

3-106
 HA-5020

DESIGN INFORMATION (Continued)

The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application
and design information only. No guarantee is implied.

Typical Performance Curves VSUPPLY = ±15V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = +25oC, Unless Otherwise Specified

TRANSIMPEDANCE vs TEMPERATURE SUPPLY CURRENT vs SUPPLY VOLTAGE

Average of 30 Units from 3 Lots Average of 30 Units from 3 Lots
6 8

+125oC
5 VSUPPLY = ±15V 7

SUPPLY CURRENT (mA)

+25oC
OPEN LOOP GAIN (MΩ)

VSUPPLY = ±10V -55oC

4
6
VSUPPLY = ±4.5V
3
5

1
-60 -40 -20 0 20 40 60 80 100 120 140 3 5 7 9 11 13 15
TEMPERATURE (oC) SUPPLY VOLTAGE (±V)

DISABLE SUPPLY CURRENT vs SUPPLY VOLTAGE

Average of 30 Units from 3 Lots SUPPLY CURRENT vs DISABLE INPUT VOLTAGE
7 9
DISABLE = 0V
8 VSUPPLY = ±4.5V VSUPPLY = ±10V VSUPPLY = ±15V
6 -55oC
7
SUPPLY CURRENT (mA)

SUPPLY CURRENT (mA)

5
+25oC 6
4 5
+125oC
3 4

3
2
2
1
1

0 0
3 5 7 9 11 13 15 1 3 5 7 9 11 13 15
SUPPLY VOLTAGE (±V) DISABLE INPUT VOLTAGE (V)

DISABLED OUTPUT LEAKAGE vs TEMPERATURE

DISABLE MODE FEEDTHROUGH vs FREQUENCY Average of 30 Units from 3 Lots
0 1.0

-10 DISABLE = 0V
OUTPUT LEAKAGE CURRENT (µA)

VIN = 5Vp-p
-20 RF = 750Ω 0.5 VOUT = +10V
FEEDTHROUGH (dB)

-30

-40 0
VOUT = -10V
-50

-60 -0.5

-70

-80 -1.0
0 2 4 6 8 10 12 14 16 18 20 -60 -40 -20 0 20 40 60 80 100 120 140
FREQUENCY (MHz) TEMPERATURE (oC)

Spec Number 511080-883

3-107
 HA-5020

DESIGN INFORMATION (Continued)

The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application
and design information only. No guarantee is implied.

Typical Performance Curves VSUPPLY = ±15V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = +25oC, Unless Otherwise Specified

ENABLE/DISABLE TIME vs OUTPUT VOLTAGE

Average of 9 Units from 3 Lots NON-INVERTING GAIN vs FREQUENCY
2.0 20 +3
1.8 18 +2 VOUT = 0.2Vpp
1.6 16 +1 CL = 10pF

NORMALIZED GAIN (dB)

DISABLE TIME (µs)
ENABLE TIME (µs)

1.4 14 0 AV = +1
1.2 12 -1
1.0 10 -2
ENABLE TIME
0.8 8 -3 AV = +2

0.6 6 -4
0.4 DISABLE TIME 4 -5 AV = +6
0.2 2 -6 AV = +10

0.0 0 -7
-10 -8 -6 -4 -2 0 2 4 6 8 10 0 24 48 72 96 120
OUTPUT VOLTAGE (V) FREQUENCY (MHz)

INVERTING FREQUENCY RESPONSE PHASE vs FREQUENCY

+2
+1 VOUT = 0.2Vpp +180
NON-INVERTING PHASE (DEGREES)

INVERTING PHASE (DEGREES)

0 CL = 10pF AV = -1 +135
NORMALIZED GAIN (dB)

RF = 750Ω AV = -2
-1 AV = -1 +45 +90
AV = -6
-2 0 +45
AV = -10
-3 AV = -2 -45 0
-4 -90 -45
-5 -135 AV = +1 -90
AV = -6 AV = +2
-6 AV = -10 -180 -135
AV = +6
-7 -225 -180
AV = +10
-8 -270
0 24 48 72 96 120 0 24 48 72 96 120
FREQUENCY (MHz) FREQUENCY (MHz)

BANDWIDTH AND GAIN PEAKING vs LOAD RESISTANCE BANDWIDTH AND GAIN PEAKING vs FEEDBACK RESISTANCE
110 5 105 20
CL = 10pF CL = 10pF
-3dB BANDWIDTH
VOUT = 0.2Vp-p VOUT = 0.2Vp-p
100 4
-3dB BANDWIDTH (MHz)
-3dB BANDWIDTH (MHz)

100 15
GAIN PEAKING (dB)
GAIN PEAKING (dB)

-3dB BANDWIDTH
90 3
GAIN PEAKING
95 10

80 2

90 5
70 1
GAIN PEAKING

60 0 85 0
0 200 400 600 800 1000 700 900 1.1K 1.3K 1.5K
LOAD RESISTANCE (Ω) FEEDBACK RESISTOR (Ω)

Spec Number 511080-883

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 HA-5020

DESIGN INFORMATION (Continued)

The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application
and design information only. No guarantee is implied.

Typical Performance Curves VSUPPLY = ±15V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = +25oC, Unless Otherwise Specified

BANDWIDTH AND GAIN PEAKING vs FEEDBACK RESISTANCE BANDWIDTH vs FEEDBACK RESISTANCE

(AV = +2) (AV = +10)
100 20 80
CL = 10pF CL = 10pF
VOUT = 0.2Vp-p
VOUT = 0.2Vp-p 70
-3dB BANDWIDTH (MHz)

95 15

-3dB BANDWIDTH (MHz)

GAIN PEAKING (dB)
60 GAIN PEAKING = 0dB

-3dB BANDWIDTH 50
90 10
40

85 5 30
GAIN PEAKING
20

80 0 10
400 600 800 1.0K 1.2K 200 400 600 800 1000
FEEDBACK RESISTOR (Ω) FEEDBACK RESISTOR (Ω)

REJECTION RATIOS vs TEMPERATURE

Average of 30 Units from 3 Lots REJECTION RATIOS vs FREQUENCY
75 0

-10 AV = +10

70 -20
REJECTION RATIO (dB)

REJECTION RATIO (dB)

-30
PSRR
-40
65
-50
CMRR
-60
60 CMRR +PSRR
-70
-PSRR
-80
55
-60 -40 -20 0 20 40 60 80 100 120 140 -90
10K 100K 1M 10M
TEMPERATURE (oC) FREQUENCY (Hz)

OUTPUT SWING OVERHEAD vs TEMPERATURE

Average of 30 Units from 3 Lots OUTPUT VOLTAGE SWING vs LOAD RESISTANCE
3.5 30
(±VSUPPLY) - (±VOUT )
VSUPPLY = ±15V VSUPPLY = ±15V
OUTPUT SWING OVERHEAD (±V)

OUTPUT VOLTAGE SWING (Vp-p)

25
3.0
VSUPPLY = ±10V
20
VSUPPLY = ±10V
2.5 15

VSUPPLY = ±4.5V 10
2.0
VSUPPLY = ±4.5V
5

1.5
-60 -40 -20 0 20 40 60 80 100 120 140 0
10 100 1K 10K
TEMPERATURE (oC) LOAD RESISTANCE (Ω)

Spec Number 511080-883

3-109
 HA-5020

DESIGN INFORMATION (Continued)

The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application
and design information only. No guarantee is implied.

Typical Performance Curves VSUPPLY = ±15V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = +25oC, Unless Otherwise Specified

SMALL SIGNAL PULSE RESPONSE

Vertical Scale: VIN = 100mV/Div.; VOUT = 100mV/Div.
SHORT CIRCUIT CURRENT LIMIT vs TEMPERATURE Horizontal Scale: 20ns/Div.
100
SHORT CIRCUIT CURRENT (mA)

90

80
-ISC IN
70

+ISC
60

50
OUT

40
-60 -40 -20 0 20 40 60 80 100 120 140
TEMPERATURE (oC)

LARGE SIGNAL PULSE RESPONSE

Vertical Scale: VIN = 5V/Div.; VOUT = 5V/Div. PROPAGATION DELAY vs TEMPERATURE
Horizontal Scale: 50ns/Div. Average of 18 Units from 3 Lots

7.0
PROPAGATION DELAY (ns)

6.5
IN RLOAD = 100Ω
VOUT = 1Vp-p
6.0

5.5

5.0
OUT -60 -40 -20 0 20 40 60 80 100 120 140
TEMPERATURE (oC)

Spec Number 511080-883

3-110
 HA-5020

DESIGN INFORMATION (Continued)

The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application
and design information only. No guarantee is implied.

Typical Performance Curves VSUPPLY = ±15V, AV = +1, RF = 1kΩ, RL = 400Ω, TA = +25oC, Unless Otherwise Specified

PROPAGATION DELAY vs SUPPLY VOLTAGE

Average of 18 Units from 3 Lots SMALL SIGNAL OVERSHOOT vs LOAD RESISTANCE
11.0 15
VOUT = 100mVp-p, CL = 10pF
AV = +10
10.0 (RF = 383Ω)
VSUPPLY = ±5V
PROPAGATION DELAY (ns)

AV = +2

OVERSHOOT (%)
9.0 10

AV = +1
8.0
AV = +2 VSUPPLY = ±15V
7.0 5
AV = +1
RLOAD = 100Ω AV = +1
6.0 VOUT = 1Vp-p
AV = +2
0
5.0
3 5 7 9 11 13 15 0 200 400 600 800 1000
SUPPLY VOLTAGE (±V) LOAD RESISTANCE (Ω)

DIFFERENTIAL GAIN vs SUPPLY VOLTAGE

DISTORTION vs FREQUENCY Average of 18 Units from 3 Lots
-50 0.07
VO = 2Vp-p FREQUENCY = 3.58MHz
CL = 30pF
0.06
-60 3rd ORDER IMD
DIFFERENTIAL GAIN (%)
DISTORTION (dBc)

HD2 (GEN) 0.05

-70 RLOAD = 75Ω
3rd ORDER IMD
(GENERATOR) 0.04
-80
HD3
HD2 0.03
RLOAD = 150Ω
-90
0.02
RLOAD = 1K
HD3 (GEN)
0.01
1M 10M 3 5 7 9 11 13 15
FREQUENCY (Hz) SUPPLY VOLTAGE (±V)

DIFFERENTIAL PHASE vs SUPPLY VOLTAGE SLEW RATE vs TEMPERATURE

Average of 18 Units from 3 Lots Average of 30 Units from 3 Lots
0.07 1200
FREQUENCY = 3.58MHz
DIFFERENTIAL PHASE (DEGREES)

0.06
VOUT = 20Vp-p
RLOAD = 75Ω 1000
SLEW RATE (V/µs)

0.05

+SLEW RATE
0.04

-SLEW RATE
RLOAD = 150Ω 800
0.03

0.02

RLOAD = 1K
0.01 600
3 5 7 9 11 13 15 -60 -40 -20 0 20 40 60 80 100 120 140
SUPPLY VOLTAGE (±V) TEMPERATURE (oC)

Spec Number 511080-883

3-111
 HA-5020

TYPICAL PERFORMANCE CHARACTERISTICS

Device Characterized at: Supply Voltage = ±15V, RF = 1kΩ, AV = +1V/V, RL = 400Ω, CL ≤ 10pF, VDISABLE = V+, Unless Otherwise Specified

DESIGN
PARAMETERS CONDITIONS TEMPERATURE TYPICAL LIMIT UNITS

Input Offset Voltage VCM = 0V +25oC 2 Table 1 mV

Average Offset Voltage Drift Versus Temperature Full 10 15 µV/oC

Positive Input Bias Current VCM = 0V +25oC 3 Table 1 µA

Negative Input Bias Current VCM = 0V +25oC 12 Table 1 µA

Input Common Mode Range Full ±12 Table 1 V

Offset Voltage Adjustment See Note 4, Table 1 Full ±40 Table 1 mV

Output Voltage Swing VIN = ±12.8 +25oC to +125oC ±12.7 Table 1 V

VIN = ±12.8 -55oC to 0oC ±11.8 Table 1 V

Output Current Implied by VOUT/400Ω +25oC 31.7 Table 1 mA

Output Short Circuit Current VIN = ±10V, VOUT = 0V +25oC 65 Table 1 mA

Quiescent Supply Current RL = Open Full 7.5 Table 1 mA

Supply Current, Disabled RL = Open, VDIS = 0V Full 5.0 Table 1 mA

Slew Rate VIN = 20Vp-p +25oC ±800 Table 2 V/µs

Overshoot VO = 1Vp-p, RL = 100Ω +25oC 7 Table 3 %

Input Noise Voltage f = 1kHz +25oC 4.5 8 nV ⁄ Hz

Positive Input Noise Current f = 1kHz +25oC 2.5 4 pA ⁄ Hz

Negative Input Noise Current f = 1kHz +25oC 25 40 pA ⁄ Hz

Differential Gain RL = 150Ω, NTC-7 Composite +25oC 0.025 0.05 %

Differential Phase RL = 150Ω, NTC-7 Composite +25oC 0.025 0.05 Degrees

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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Spec Number 511080-883

3-112