roprocessor chitecture, Programming, and Applications with the 68045PARTI Chapter 1 Chapter 2 /Chapter 3 Ghapter 4 MICROPROCESSOR-BASED SYSTEMs: HARDWARE AND INTERFACING 1 Microprocessors, Microcomputers, and Assembly Language 3 |. Microprocessors 4 01.2 Microprocessor Instruction Set and Computer Languages 13 © 1.3 From Large Computers to Single Chip Microcontrollers 20 © 1.4 Application: Microprocessor-Controlled Temperature System MCTS) 24 Introduction to 8085 Assembly Language Programming 31 2.1 The 8085 Programming Model 32 2.2 Instruction Classification 34 3 Instruction, Data Format, and Storage 37 9 2.4 How to Write, ute a Simple Program 42 © 2.5 Overview of the 8085 5 2.6 Writing and Hand Assembling a Program 50 Assemble, and Ex instruction Set 4 Microprocessor Architecture and Microcomputer Systems Microp 3.3 Input an Microcomputer System 81 3.6 Microprocessor-Based System Application: MCTS 90 87 cessor Architecture and Iis Operations 58 3 3.2 Memory 63 Output (1/0) Devices 80 & 3.4 Example of a 3.5 Review: Logic Devices for Interfacing 83 8085 Microprocessor Architecture and i Memory Interfacing The 8085 MPU 96 © 4,2 Example of an 8085-Based Microcomputer 109 4.4 Memory Interfacing 116 © 4.4 Interfacing the 8155 Memory Segment 24 94,5 Illustrative Example: Designing Memory for the MCTS Project 126 46 Testing and Troubleshooting Memory Interfacing Circuits 129 2 4.7 How Does an 8085-Based Single-Board Microcomputer Work? ' 132CONTE, 13 Interfacing I/O Devices ; Concepts 140.0 5 Dans 155 @ 5.4 Memory-Mappe¢ Cireuits 163 ) Interfacing Output Displays 150 5.1 Basie Interfacin > §.3 Interfacing Input Devices 4 Mem $5 Testing and Troubleshooting V/O Interfacing nswers 16d 5.6 Some Questions and A\ PROGRAMMING THE 8085 173 Introduction to 8085 Puarructions Bi on 175 61 Data Transfer (Copy) Operations 176 © 6.2 Arithmetic Ope 85 as Operstion 6.4 Branch Operations 204 0 6.5 Writing 3 Logic Operations 96 : oy = 5 6.6 Debug: a Program uage Programs 210 Questions and Their Answers > 6.7 Some Puzz “ehapter7 Programming Techniques with Additional Instructions 227 Counting, and Indexing 228 7.1 Programming Techniques: Looping se | Data Transfer and 16-Bit Arithmetic Instructions ic Operations Related to Memory 241 9 7.4L Operations: Rotate 7.5 Logic Operations: Compare 254 = 7.6 Dynamic Del 2 261 ‘ “Bxapter 8 Counters and Time Delays 215 8.1 Counters and Time Delays 276 0 8,2 Illustrative fexadecimal Counter 282 0 8,3 Illus n; Zero-to-Nine (Modulo Ten) Counter 84 Illustrative Program: Generating Pulse V Debugging Counter and Time-Delay P ative Pro, Stack and Subroutines 9.1 Stack 296 © 9.2 Subroutin Retum Instructions 315 Chapter 10 Code Conversion, BCD Arithmetic, and 16-Bit Data Operations 10.1 BCD-0-Binary Conver ® 10.3 BCD. “ SCH and @ 106 Bi 295 5G 9.3 Restart, Conditic 9.4 Advanced Subroutine Concepts 316 323 sion 324 {9 10,2 Binary-to-BCD Conversion Seven-Segment-LED Code Conversion 329 © 104 Binary ae ac Binary Code Conversion 332 © 10.5 BCD Addition 334 loge lion 337.0 10,7 Introduction to Advanced In 10.8 Multiplication 342 and Applications 334 structions with Carry 4, arry 344 Chapter 11 Software Deve 10.9 Subtraction lopment § 111 Micopocecin beeen, S¥stems and Assemblers 351 SZ Opa Bised Software Developmen Senne tal Cie uct 359 0 1, EUMITINg Tools 354.0 11.3 Assemblers Assembler 363 HA Writing Pi Fograms Using a Cross.. INTERFACING PERIPHERALS AND APPLICATIONS iad 3m Chapter 12 Interrupts 315 12.1 The 8085 Interrupt 376 © 12.2 8085 Vectored Interrupts 385 123 Restart as Software Instructions 393.0 124 Additineal HO Concepts and Processes 395 Interfacing Data Converters 403 13.1 Digital-to-Analog (D/A) Converters 404 0 13.2 Analog-to-Digital (AID) Converters 414 a Chapter 14 Programmable Interface Devices: 8155 I/O and Timer; 8279 Keyboard/Display Interface 425 14.1 Basic Concepts in Programmable Devices 426 © 14.2 The 8155 Multipurpose Programmable Device 432 © 14.3 The 8279 Programmable Keyboard/Display Interface 450 Chapter 15 General-Purpose Programmable Peripheral Devices 459 345.1 The 8255A Programmable Peripheral Interface 460.0 15.2 Illustration Interfacing Keyboard and Seven-Segment Display 479 © 15.3 Iilustration Bidirectional Data Transfer Between Two Microcomputers 488 2 15.4 The 8254 (8253) Programmable Interval Timer 494U8715.5 The 8259, Programmable Interrupt Controller 505 © 15.6 Direct Memory Access (DMA) and the 8237 DMA Controller 514 Chapter 16 Serial I/O and Data Communication 523 16.1 Basic Concepts in Serial YO 524 0 16.2 Software-Controlled Asynchronous Serial /O 534 0 16.3 The 8085—Serial /O Lines: SOD | and SID 537 © 16.4 Hardware-Controlled Serial /O Using Programmable j Chips 540 Chapter 17 Microprocessor Applications 563 17.1 Interfacing Scanned Multiplexed Displays and Liquid Crystal Displays 464 © 17.2 Interfacing a Matrix Keyboard 573 © 17.3 Memory Design S81 © 17.4 MPU Design 58910 17.5 Designing a System: Single-Board Microcomputer 5920 17.6 Software Design 597 © 17.7 Development and Troubleshooting Tools 603 Chapter 18 Extending 8-Bit Microprocessor Concepts to Higher- 607 : Level Processors and Microcontrollers 18.1 8-Bit Microprocessors Contemporary to the 8085 608 © 18.2 Review fe of Microprocessor Concepts 611 0 18.3 16-Bit Microprocessors 612 ke © 18.4 High-End-High-Performance Processors 626 0 18.5 Single-Chip Microcontrollers 633Microprocessor-Based Systems: Hardware and Interfacing ER essors, Microcomputers, and Assembly Language 8085 Assembly Language Programming cessor Architecture and Memory Interfacing (0 Devices put (V/O) devices.Microprocessors, Microcomputers, and Assembly Language emicrepreccane system, can be Processes, or it can f puter called « microc duces the basic sir if based product and and Java)MICROPROCESSOR-BASED SYSTEMS: HARDWARE AND INTERPRE Explain the advant =D Draw a block oh am of micropocesbsed Espn the advantages of ihe 1B Explain the terms SS/. MSI. and LS/. Te ater be sonal computer (PC). eee eee teoce er 2 Draw a block di il functions of each, component. ‘merie characters. soft- © Define the term operating system List components and peripherals of atypical pep 1am of a microprocessor -con- 1 : 1 MICROPROCESSORS a A microprocessor is a multipurpose, programmable, clock-driven, register-based electronic Ucsce that reads binary instractions from a storage device called memory accepts binary datg as input and processes data according to those instructions, and provides results as out nalogy between microprocessor operations At a very elementary level, we can draw an functions of a human brain that process information accordin to instructions (une standing) stored in its memory) The brain gets input from eyes and ears and sends vices” such as the face with its capacity to register ex [processed information to output Pression. the hands or fect. However, there is no comparison between the complexity of ale 'S memory, mmable machine can be represented with four components: micro- Man brain and its memory and the relative simplicity of a microprocessor and A typical py sceSSor, memory, input and outputas shown in Figure 1.1.These four components work logether or interact with each other to perform a ven task The physical components of this system are called hardw forth s, they comprise a system, . A set of instructions written soho east (0 perform a task is called a program, and a group of programs is Salled software) The machine (system) represented in Figure 1.1 can be prog rammed to idance stem may be simple or sophisticated, depending on its applications, apd itis rious names depending upon the purpose for which it is designed. /the mi Cade eiplications are classified primarily in two categories: reprog tems and embedded system ORCC Is Used for on and off, compute mathematical functions, or keep track rable sys: Feprogrammable systems, such as microcomputers, the mi ms include computing and data processing. ‘These syst FIGURE 1.)Nr iy MICROPROCESSORS, MICROCOMPUTER AND ASSEMBLY Lan SURGE general-purpose micro a8 disks and CD:ROMs), typical ilustration{in + Snot available for rep of an embedded system Tized as: (1) microcontrollers th chip, and 2) general-purpose micron Lifnbeded systems can aso Bee a Mil crete cong their operations; they are known wide range of products such n "a ucts (Examples a Washing machines, disse trols, traffic light controllers, and a automatic testing instruments) BINARY DicITs The microprocessor operates in binary digs, 0 and breviation for the term binary digit. These divin ae wm aS bits. Bit is an ab soles inthe iachne: Generally, 0 repeat an apse other, The digits O and 1 are tage level, an (Bach microprocessor recop microprocessors SSeS a group of bits are classified according to their word ley For exam ith an 8-bit word is known as an 8-bit miorpreceeee ey Word is known as a 32-bit microprocescor A MICROPROCESSOR AS A PROG; The fact that the microprocessor is pro Biven tasks within its capability) A erating various kinds of tones bx -RAMMABLE DEVICE ased on the number of keys it has. A k depending upon the musical score printed on a sheet, Similarly, toden's Gesigned to understand and execute many binary instruction, Chine: It can be used tc simple tasks such as tur on or off.|A. programmer c Sttuctions and ask the microprocessor to perform variou The person who designs a and the scope of the piano ermine a set of piano determines the frequency (1 nusie, Similarly, the engineers designing a microprocesso asks the microprocessor should perform and design eireuits, and provide the user with alist ofthe instructions th For example, an instruction for adding two numbers may look like Aigits, such as 1000 0000, These instructions are simply a pattern of Os and Is. The user 1 provesse (Programmer) selects instructions from the list and determines the sequence of e cation for a given task. These instructions are entered or stored in storage, called memors, which €4n be read by the microprocessor. MEMORY e fora fixed number of binary gumbers on Memory is like the pages of a notebook with space fora fi nbs fain Tine paisa Se pages are generally made of semiconductor material,{ Typically, J64ch line isan 8-bit register that can store eight binary bits, and several of these egisters areROPROCESSOR-BASED SYSTEMS: HARDWARE AND INTERFACING ne are always grouped together tn pow. Neue ‘on a semiconductor et eee co tN ace oa sconce gate i even apereninatton in tears ® he’ wee rarer’ in memory through an input device (described be nanan “aie given task and find an answer. The answer {described below) or stored in memory arranged in 3 ers of two, For example, a group of I writes the necessary in rd Tow), and asks the microprocessor to perf is generally displayed at an output devie Satrisieeuapches- tere devicerre ealod. input devices)similar to eyes and ears ina MOR hero thecs insniodont: Tue result ean be displayed bya device suchas e data according to those instruc by a printer. These devices are seremscpent LEDs (igh Emitng Dods) or printed by @ =a called output devices. MICROPROCESSOR AS A CPU (MPU) asa primary component omputer (We can also view the microprocessor as a p : ; ; ditionally, the computer is represented in block diagram as shown in Figure 1 244) ‘The block diagram shows that the computer has four component input, op and the central processing unit (CPU), which consists of the ari anit (ALU) and the control unit\fThe CPU contains various registers to store d ALU to perform atithmetic and logical operations, instruction decoders, counters, ol lines. (The CPU reads instructions from the memory and performs the tasks specified.It communi ates with inpuvoutput devices either to accept or to send data. Th Known as peripherals) The CPU is the primary and central pl devices such as memory, input, and output. However, the timing Process is controlled by the group of circuits called the control unit. a ra, ite 1960s, the CPU was. designed with discrete components on various boards. With the advent of in ie possible to build th CPU on a single chip: this came to be known as a micte processor, and block diagram shown in Figure 1.2( Figure 1.2(b)¥A computer with Puter. The terms microprocessor nicating with ie communication tegrated circuit technole he traditional (a) can be replaced by the block @ microprocessor as its CPU is kn and microprocessor unit (MPU) ar eram shown in as a microcom often used synony FER UAMPU implies a complete processing unit with the necessary control signals Because ofthe limited number of available Pins on a microprocessor package, some of the signals (such as control and multiplexed signals) need t rele devices to make the microprocessor AAs semiconductor fabrication techn Were able to place not only MPU) Ble chip; this is known as a troller is essentially an ent Srocomtroller chip also inc and timers)these devices se Loa “In computer (0 be generated by using dis- 4 complete functional unit or MPL nology became more advanced. but also memory and VO interf 4 microcontroller or micro tire computer on ludes additional are discussed in | manufacturers facil ircuits on a sin- controller unit (MCU)YA microcon- le chip. Figure 1.2(c) shows that the mi- devices such as an A/D converter, serial UO, a sing later chapters), MOvOBY VK is ea 0 1024: ny scien terminology, 1 is equal to 1000Microcontroller Micro- MPL eessor Ff Output Memory a cpu L Peripheral Devices poe] + A/D Converter Memory + Timer * Serial VO (b) > FIGURE 1.2 {@) Waditional Block Diagram of a Co Microprocessor as CPU; and (c) BI 1.1.1 Advances in Semiconductor Technology nology has undergone unprecedented changes. After the "Since 1950, semiconductor tec | invention of the transistor, integrated circuits (ICs) appeared on the scene at the end of the ‘ 1950s; an entire circuit consisting of several transistors, diodes, and resistors could be de- " Signed on a single chip. In the early 1960s, logic gates known as the 7400 series were “commonly available as ICs, and the technology of integrating the circuits of @ logic gate became known as small-scale integration (SSI). As semiconductor tech gy advanced, more than 100 gates were fabricated on one chip; this was called ale integration (MSI). A typical example of MST is a decade counter (7490). ‘a few years, it was possible to fabricate more than 1000 gates on & single chip; this (LSI). Now we are in the era of very-large- to be known as large-scale integration integration (VLSI) and super-large-scale integration (SLSD). The lines of demarea een these different scales of integration are rather ill defined and arbitrary. AS —————MICROPROCESSOR-BASED SYSTEMS: HARDWARE AND INTERFACING, improved, more and more logic circuits were built on one chip, and they could Septem do different functions through hard-wired connections, For example, counter chip ean be programmed {0 count in Hex or decimal by providing logic 0 or j through appropriate pin connections. The next step was the idea of providing Os and 1, through a register, a programmable device described in the next section, signing semiconductor memory; it introduced a 64-bit bipolar RAM chip that year. In the same year, Intel received a contract from a Japanese company, Busicom, to design a pro- grammable calculator. The original design called for 12 different chips with hard-wired programming, Instead, Ted Hoff suggested a general-purpose chip that could perform var fous logic functions, which could be activated by providing patterns of Os and 1s through registers with appropriate timing. The group of registers used to store patterns of Os and Is was called memory. Thus a programmable calculator was designed successfully with a general-purpose logic device that can be programmed by storing the necessary patterns of 0s and Is in memory. Later Intel realized that this small device had computing power that could be used for many applications. Intel coined the term “microprocessor” and in 1971 released the first 4-bit microprocessor as the 4004. It was designed with LSI technology it had 2,300 transistors, 640 bytes of memory-addressing capacity, and a 108 kHz clock Thus, the microprocessor revolution began with this tiny chip. : This invention has been placed on a par with that of the printing press or the inter nal combustion engine. Gordon Moore, cofounder of Intel Corporation, predicted that the humber of transistors per integrated circuit would double every 18 months; this came to be known as “Moore’s Law.” Just twenty-five years since the invention of the 4004, we hhave processors that are designed with 15 million transistors, that can address one ter abyte (1 x 10'*) of memory, and that can operate at 400 MHz to 1.5-GHz frequency (see Table 1.1), The Intel 4004 was quickly replaced by the 8-bit microprocessor (the Intel 8008), Which was in tum superseded by the Intel 8080. In the mid-1970s, the Intel 8080 was Widely used in control applications, and small computers ned using the 8080 @ the CPU; these computers became known as microcomputers, Within a few years after the emergence of the 8080, the Motorola 6800, the Zilog Z80, and the Intel 8085 micro- rstessors were developed as improvements over the 8080, The 6800 was designed with a Siflerent architecture and the instruction set from the 8080. On the other hand the 8085 and ihe 740 were designed us upward software compatible with the 8080: that is, they in- flied all the instructions of the 8080 plus additional instructions. As the microprocessors Degan to acquire more and more coi puting functions, they were viewed more as CPUs Mather than as programmable logic de it microprocessors, Each micri . The 8-bit micropro ications, and more pow (oumber crunching), da also were desi vices. Most microcomputers are now built with 32- ‘Oprocessor has begun to carve a niche for its own ap- essors are being used as programmable logic devices in con- erful microprocessors are being used for mathematical com- la processing, and computer graphics applications,Number of Initial Clock shor Tsp ie 6,000 2MHz Hw 6,500 5S MHz a 29,000 MHz ie 29,000 5 MHz te 134.000 ae te poh ae 22it 31M Gomme 22168 55M 150 MHz 32/64-bit 16-bit data bus (ur focus here is on using 8-bit microprocessors Itoptocessor-based systems) The overwhelming majorit Be Et processors or microcontrollers. The range of a Sified—from the auto industry to home appliances. R Wide sales of 8-bit chips range from as programmable devices in mi- ty of microprocessor applications plications is very wide and diver- ‘event statistics suggest that the world- 90 percent to 95 percent of the total number of mi- EeePieessor chips sold. However, the most compelling reason to use an 8-bit processor is SMiestional. To understand the basic concepts underlying the microprocessor device, itis et to lear from a simple 8-bit processor than from a 64-bit processor. And these fun- Bemiesial concepts are easily transferable from 8-bit processors to larger processors, 21-2 Organization of a Microprocessor-Based System 13 shows a simplified but formal structure of a microprocessor-based system or Product. Since a microcomputer is one among many microprocessor-based systems, Mall have the same structure as shown in Figure 1.3. It includes three components: processor, VO (inpu/ouput), and memory (weadvrite memory and Seay Bene Components are organized around a common communication pal 14 bis) The entire group of components is also referred to as a system 8 fi Bz eysier, sod the componenis themselves ae refered io as sub-ystems\ At it is necessary to differentiate between the terms inlorpric a0 of the common misuse of these terms in popular hess ‘component of the microcomputer. pn the other hand, Addressableis a complete computer similar to any other computer, except that CPU of the microcomputer are performed by the microprocessor. \Similarly, the ‘peripheral is used for input/output devices.) The various component’ of a micro- based product or a microcomputer are shown in Figure 1.3 and their func- ‘are described in this fS manufactured by using either a large-scale integration (LSI) or very-large-scale (VLSI) technique)¥Phe microprocessor is capable of performing various com- ag functions and making decisions to change the sequence of program execution. In ompiiters, a CPU implemented on one or more circuit boards performs these com- functions. The microprocessor is in many ways similar to the CPU, but includes logic circuitry, including the contro! unit, on one chip. The microprocessor can be into three segments for the sake of clarity, as shown in Figure 1.3: ogic unit (ALU), register array, and control unit. gic Unit (This is the area of the microprocessor where various computing performed on data. The ALU unit performs such arithmetic operations as subtraction, and such logic operations as AND, OR, and exclusive OR.) ¥ | This area of the microprocessor consists of various registers identified as B,C, D, E, H, and L. These registers are primarily used to store data ng the execution of a program and are accessible to the user through in- ‘Control unit provides the necessary timing and control signals to all ‘microcomputer. It controls the flow of data between the micro- | and peripherals) :Now the question is: What isthe rey binary patter of OV and 1s), the ALU, Bee erample of @ fll adder circuit, ru wie ogc gates. and a clock. The clock in ‘of an instruction initiates a ‘euits in the ALU the word “Sit” is like an instruction in a Microprocessor, and acting oe: I this Snalogy, Tests appropriate bit patterns from the set for ats iain feed in tne MrOPrORFaMS through the contre] ve it Pattems one at atime, —~ — igh the control unit, and Perfortis the task Examples of widely used 8-bit microproces, ude th 5, Zilog 20, ait Motorola 68008. Earlier microcomputers were de: igned around the 8-bit Tip SFIBM personal computers are desi the Intel 32- or 64-bit microprocesson: Sinzle-board microcomputers such as the SDK-85 (Intel), The Primer (EMAC Inc ), and the Micro-Professor (Multitech) are fie peony used in college laboratories; the SDK-85 Sad The Primer (described in Appendix B) are based on the 8085 microprocessor, and the spec MEMORY oe Sores such binary information as instructions and d To execute programs, the micto- ind performs the computing opera for display or two sections and provides that infor Betton ‘0 the microprocessor whenever necessary instructions and data from memory a tion. Results are either transferred to the output section Y for later use. The memory block shown in Figure 1.3 has Read-Only memory (ROM) and Read/Write memory (R/WM), popularly known as Access memory (RAM), The ROM is used to store programs that do not need alterations. The monitor pro. Benge itsle-board microcomputer is generally stored in the ROM. This program inter red through a keyboard and provides equivalent binary digits to IPI the information ente D the microprocessor Programs stored in the ROM can only be read; they cannot be altered. The Read/Write memory (R/WM) is also 9 known as user memory. It is used to store e program monitors ie PiPBFams and data. In single-board microcomputers, the monitor program moni Hex keys and stores those instructions and data in the R/W memory. The information 1M this memory can be easily read and altered.HARDWARE AND INTERFACING [MICROPROCESSOR BASED SYSTEMS: Fae era micryrocesor ased se O Gapuutp comma ncates with the cutsie world: VO includes two types of devices: input and output: these i o known as peripherals Mower a device such ost Keybodrd. stches. and an analog-to-dgtal (A/D) ? information (data and instructions) from the outside world to Taboratories includes ei- croc ed in feroprocesso) Typically, a microcomputer use 1 fal Keyboard or an ASCII Keyboard as an input device. The hexadecimal (Hex) keyboard has 16 data keys (0 t0 9 and A to F) and some additional function keys ata and executing programs. The ASCII (the term to perform such operations as storing je explained in Section 1.2) keyboard is similar to a typewriter Keyboard, and it is used to enter programs in an English-like language. Although the ASCII keyboard is found in most microcomputers (PCs). single-board microcomputers generally have Hex key. boards, and microprocessor-based products such as a microwave oven have decimal key- boards. The output devices transfer data from the microprocessor to the outside world. They include devices such as light emitting diodes (LEDs), a cathode-ray tube (CRT) or video screen, a printer, X-Y plotter, a magnetic tape, and digital-to-analog (D/A) converter. Typically. single-board microcomputers and microprocessor-based products (such as a dishwasher or a microwave oven) include LEDs, seven-segment LEDs, and alphanumeric LED displays as output devices. Microcomputers (PCs) are generally equipped with out- ut devices such as a video screen (also called a monitor) and a printer SYSTEM BUS (tre system bus is a communication path between the microprocessor and peripherals: it is nothing but a group of wires to carry bits)In fact, there are several buses in the system that will be discussed in the next chapter/ All peripherals (and memory) share the same bus; however, the microprocessor communicates with only one peripheral at a time. The timing is provided by the control unit of the microprocessor 1.1.3 How Does the Microprocessor Work? bp 4 program and data are already entered.in the R/W memory. (How to @xeeute 4 program will be explained later:) The program includes binary in- ae fo add given data and to display the answer at the seven-segment LEDs When the microprocessor is gi co esi processor is given a command to execute the program, it reads and @ For ding tio” at 2 time and finally sends the result to the seven-segment LEDs for display, a This process of pr of program execution can best be OF assembling ei execution can best be described by comparing it to the a = aie a io kit. The instructions for assembling the radio are printed Sequence ane oe Paper. One reads the first instruction, then picks up the nec- ee endo id performs the task. (The sequence of the process is read, interpret, e e ‘ “Ee sored seauentiy re, etoprocessor works the same way: The instuctio : mory. fhe microprocessor fetches the first instruction“MIGROPROCESSORS, MICROCOMPUTERS, aN) ASSEMBLY LANGUAGE from its memory sheet, deci decode, and execute is conti stop. During the 1.14 Summary of Important Becki M2 MEIN of « micopreeson sa m fized as follows: eae Concepts can be summa- 1. The microprocessor 5 reads instructions from memory. & communicates with all peripherals (memory and 1/03) © controls the timing of information flow © performs the computing tasks specified in 2. The memory ) using the system bus, & program, B stores binary information, called instructions provides the instructions and ¢ G stores results and data for the 3. The input device and data data to the microprocessor on request. microprocessor. 17 enters data and instructions under the contol of a program such a a monitor pro. gram 4. The output device The Rats 9312 from the microprocessor as specified in a program The bus arries bits between the microprocessor and memory and I/Os, MICROPROCESSOR INSTRUCTION SET ‘i 2 AND COMPUTER LANGUAGES — i e owever, each microproces: Microprocessors recognize and operate in binary numbers, Ho e ° Dining @ number of bits for a given machine. The word (or word length) is dena ami miimber of bits the microprocessor recognizes and processes at a ian ts Aeron se Fanges from four bits for small, microprocessor-based systems to 64 li pes A computers. Another term commonly used to express word inte yte, aR 8 4 group of eight bits. For example, ¥ ie equal to two bytes. The term nibble, which stands for a ‘group: tr four bits, is found al HB popular computer magazines and books. A byte has two nibbles:“oan write programs, called assembly lan- "words, Because an assembly language is specific to a given h assembly language are not transferable from one machine to “this limitation, such general-purpose languages as BASIC and - been devised; program written in these languages can be machine-in- Janguages are called high-level languages. This section deals with vari- ‘of languages: machine, assembly, and high-level. The ma- ly languages are discussed in the context of the 8085 microprocessoP) ‘Language ‘bits in a word for a given machine is fixed, and words are formed through ‘of these bits. For example, a machine with a word length of eight 256 (2°) combinations of eight bits—thus a language of 256 words. tall of these words need to be used in the machine)(The microprocessor de- ‘selects combinations of bit patterns and gives a/Specific meanjng to each ‘by wsing electronic logic circuits; this is called an instruction) (Instructions ‘of one word or several words. The set of instructions designed into the ma- ‘tp its machine language)—a binary language, composed of 0s and Is—that computer. In this béok, we are concerned with the language of a widely a the 8085, manufactured by Intel Corporation. The primary fo- ‘08 the microprocessor because the microprocessor determines the machine [the operations of a microprocessor-based system. a or with 8-bit word length: its instruction set (or language) is ‘Yarious combinations of these eight bits) fhe 8085 is an improved ver- peessor BORDA.) ; S | binary Pattern entered through an iny cessor to perform that specific function) put device in memory to ‘that increments the number one.) ‘that adds the number in the register called B to the Or. and keeps the sum in the accumulator, 246 uch bit patterns, amounting to 74 different in- ‘These 74 different instructions are called its instruction set is called the in the register called theBBCROPMOCESSORS, MICROCOMPUTERS AND Asseneary Lancua: CE Binary instruction 0011 1100 (mentioned Previously) is eq Keys into their equivalent binary pattern < ‘cognize and write instrug adecima} 1.23 8085 Assembly Language pe soed mnemonic is based on the Greek word mea i called a mn Sei nemo for a price insrucion conse ne th Bio Bote performed by that instruction eg 20 0011 1100 Geis ces a tere h BOBS microprocessor is represented by the mnemonic INR A, he t Be Me-opcration of incrementing the accumulator eoert by Siti the binary code 100 0000 (80;¢ or 80H) is represented as BEDE ADD stands for addition. and B represents the con tents in register B. This ests the addition of the contents in register B and the contents symbol s in the accumulator Peeseee these symbols do not specily the complete operations, they suggest is enificant part. The complete description of each instruction must be supplied by the Beipetirer (The complete sei of 8085 mnemonics is called the 8085 assembly tan- a= = 2 program written in these mnemonics is called an assembly | e pro- iprant (Again, the assembly lang: mnemonics, is specific to each microprocesso For example, the Motorola 680) mi ‘roprocessor has an entirely different set of binary of the 6800 is far @edes and mnemonics than the 80% Therefore, the assembly langus SSM fom that of the £085,) An assembly language program written for one micro- EOF 15 0% transferable to a computer with another microprocessor unless the wo fovessors are compatible in their machine codes. 2 Machine language and assembly lanpuaje are microprocessor-specific and arebot How-level languages;(The machine language is in binary. and the assem Js only the bi MEMES is in English like words) however, the microprocessor inert on c a BS How, then, are the assembly language mnemonics written, and translated into ma can be written by hand on paper (or in a ‘Chine language or binary code? The mnemonic 1 a number followed by Jubscript 16, or as a number f Bumbers are shown cither with th 15] a MICROPROCESSOR-BASED BYSTEMS: HARDWARE AND INTERFACING a led hand assembly, as ex- hexadecimal code. call ane tothe n electronically on a corn- rmemonies ean be wet the ASCII code (explained in the next section) alled an assembler. otek) a ase Branco Seton 12S he me Pea nga pgra called an torn the AST co. Petree nary code basing the Progra 1.2.4 ASCII Code Meee stb ost Se ae aa fecimal numbers. translation codes are necessary. The commonly nd decal mbes Formation Inerchang{t sa 7-bit code with es Scitamecn Sundar Coe rT Fea recac ce mean fom Oto TPH signed other a ter. adecimal number. a symbol, or a machine command (see Appendix E). For example hexadecimal 30H 10 39H represent 0 to 9 decimal digits, 41H to SAH represent capital fetters A through Z) 20H to 2FH represent various symbols, and initial codes OOH to 1FH represent such machine commands as carriage return and line feed. In microcomputer ‘ystems, keyboards (called ASCII keyboards). video screens, and printers are typical ex. amples of devices that use ASCII codes. When the key ‘“9” is pressed on an ASCII key- board. the computer receives 39H in binary, called an ASCII character, and the system program translates ASCII characters into appropriate binary numbers However, recent computers use many more characters than the or ations: this is called Extended ASCII It is an 8-bit code that provides 256 (2°) combi nations: the additional 128 combinations are assigned to variou to-communicate with the computer in alphabetic letters inal 128 combi- hies characters. 1.28 Writing and Executing an Assembly Language Program As we explained earlier program is a set of logically related instructions written in a specific sequence to Boateclish a task.)To manually write and execute an assembly lan Suage program on a single-board computer, with a Hex keyboard for input and LEDs for ‘Output, the following steps are necessary 1¢ Write the instructions in mnemonics obtained from the instruction set supplied by the manufacturer, m 2 Find the hexadecimal machine code for each instruction by searching through the set of instructions. “ts 3, Enter (load) the program in the user memory in keyboard as the input device. 4, Execute the program by pressin 1 sie y Pressing the Execute key, The @ sequential order by using the Hex answer will be displayed by the ‘This procedure is called eith When the user verted into its binary 45 cight bits in each er Manual or hand assembly, Program is entered by the ke pterpreted and con- Saison bythe monitor Program, and the machine code is stored aon in @ Sequence, When the Execute command is h instruction, decodes it, and executes it in a se “ys, euch entry isThe manual assembly ‘procedur Program is tedious and subject to errors. The otf me oh dont Mth gh ASCH keyboard an on are EF Proce ivoles theo ee Ge assembler is a program that translates into the corresponding binary machine e eroprocessor has its own assembler because ifs to the microprocessor being used, and each assembler must be \ and each assembler has rules that must be fol don th eres. Penal Comput ee ae gaat Se sed on 16- or 32-bit microproces. 8085 microprocessor. However a used to translate the 8085 mnemoni mblers and cross-assemblers are discussed in 1.2.6 High-Level Languages i languages that are intended to be machine-independent are called high-level (These include such languages as BASIC, PASCAL, C, C++, and Jav Ne Certain sets of rules and (lestructions written in these languages Br ally be Gow the a of differen processors? The answer is: Through another program called either a compiler or an interpreter) These programs accept English-like statements as their input, ealled the source code. The compiler or interpreter then translates the source code into the machine language compatible with the microprocessor being used in the system) (This translation in the machine language is called the object code (Figure 1.4); Each micro- Processor needs its own compiler or an interpreter for each high-level language.(The pri mary difference between a compiler and an interpreter lies in the process of generating machine code) The compiler reads the entire program first and translates it into the object ede that is ekecuted by the microprocessor. On the other hand, the interpreter reads one instruction at a time, produces its object code (a sequence of machine actions), and exe Gules the instruction before reading the next instructiony M-Basic is a common example of an imerpreter for BASIC language. Compilers are generally used in such languages as FORTRAN. PASCAL. C, and C++ i ‘Compilers and interpreters require large memory space because an joni in English requires several machine codes to translate it into binary) On the other bad ee is one-to-one correspondence between the assembly language mnemonics and the me oer of te muse the memories nd st oo ssailable on colleze campuses. These computers are bas Sors with different mnemonics than the Known ay cross-assemblers can be ate machine codes. (Asse , the programs ies into appropri- Chapter 11.) a, all of draw on symbols and conventions from English’ are known as statements rather than mnemonics) A B written in BASIC for a microcomputer with the 8085 microprocessor ca un on another microcomputer with a different microprocessor, question is: How are words in English converted into the binary langua, micro which ner FIGURE 1.4 Block Diagram: ‘Translation of High: Compiler Interpreter Source CodeThus, assembly language programs are compact and require tes: ‘memory ey are more efficient than the high-level language programs. The primary ad. I languages is in troubleshooting (debugging) programs. It is much ‘easier to find errors in a program written in a high-level language than to find them in a written in an assembly language. Jn certain applications such as traffic control and appliance control, where Programs ‘are small anc! compact, assembly language is suitable, Similarly, in such real-time appl ‘catfons as converting a high-frequency waveform into digital data, program efficiency ig Sritical. In real-time applications, events and time should closely match each other with. ‘out Significant delay; therefore, assembly language is highly desirable in these applica. fons. On the other hand, for applications in which programs are large and memory is not a limitation. high-level languages may be desirable. Typical examples of applications pro- rams are word processors, video games, tax-return preparation. billing. accounting, and money management, These programs are generally written by professionals such as pro- Srammers in high-level languages. The advantage of time saved in debugging a large pro- gram may outweigh the disadvantages of memory requirements and inefficiency. Now we need to examine the relationship and the interaction between the hardware (microproces- Sof, memory. and 1/O) and software (languages and application programs). F 12.7 Operating Systems {re interaction between the hardware and the software is managed by talled an operating system of a computer:)it oversees all the operations of the computer) he computer transfers information constantly between memory and various peripherals Such 2s printer. Keyboard, and video monitor. It also stores programs on disk. The operat- img system is responsible primarily for storing information on the disk and for the com- Sunication between the computer and its peripherals, The functional relationship be- S¥een the operating system and the hardware of the computer is shown in Figure 1.5(a). Figure 1.5(b) shows the relationship and the hierarchy among the hardware, the op- Stating system, high-level languages, and application programs, The operating system is Glosest to the hardware and application programs are farthest from the hardware) When the Fess fumed on, the operating system is in charge of the system and stays in the background and provides channels of communications to application programs. Each com- Dpites has its own operating system. In the 1970s, CP/M (Control Monitor Program) was & Widely used operating system; it was designed for 8-bit processors such as the Z80 and” + In the 1980s, when 8-bit processors were replaced by 16-bit processors in Computers (PCs), MS-DOS (Microsoft Disk Operating System) replaced CP/M. MS-DOS (also known as DOS or PC-DOS) was designed to handle 16-bit processor sys~ sand it became almost an industry standard for the personal computer. MS-DOS is @ ‘Operating system; the commands are written using a keyboard, In the 1990s, it by al user interface (GUI) operating systems such as Windows 3.1 led the user to write commands by clicking on icons rather than using 32- and 64-bit computers, operating systems such as UNIX, Linux, 28/2000, ME (Millennium), and NT are commonly used. a set of programsMicroprocessor MPU PPE ony — at age Memory aa || = RAW Memory Dak ‘Output tRoM a Dewees @ _ Asem er anguaee® Assembly and High Leveh Lane Application Programs ) 1 Variox yre Components Functional Relationship ip between Computer Hardy al Relations are andSince 1950, advances in semiconductor technology have had an recedented j Sempre Inthe 1960, computers were accesible only to big corporate se pencies, Nov, “computer” has become a commen wens uni ies, & the Cray computers to the less-than-$1000 personal computer. All ie compute ie sailadle on the market include the same basic components show in Baus °om to Nevertheless. it is obvious that these computers are not all the sare 4 Daterem type of computers are designe to serve diferent purposes ‘ia yi ssttable for scientific calculations, while others are used simply ‘onturning appianeg al sed off Thus, it is necessary to have an overview of the entire spectra of computers cat phcations as a context for understanding the topics and applications discussed in thse % Ua he 1970s, computers were broadly classed in thee categories: mainframe. mt s aed microcomputers) Since then, technology has changed Considerably, and the dising a Hons between these Categories have been blurred (Initially, the microcomputer was reg Pe Fane eet with a microprocessor as its CPU. Now practically al compute a a, “aious types of microprocessors performing different functions Within the farge con SPU: For the sake of convenience, computers are classified here 8 large computers a medium-size computers, and microcomputers, PE 13.1 Large Computers These are large, general-purpose, multi-user, m sech data processing tasks diing of records uultitasking computer as complex scientific and engineerin for large corporations or government deine _ calcul lations) and han- Th agencies. These computers ean be 2 Shed nn roailly into mainframes and supercomputers, and mainframes are further ols: a Ft sccording to their sizes. The prices range from $100,000 to millions of dollars Typical examples of these comput © (Cray-2, Y-MP), the Fijitsu GS (Mainframes are high-speed from the ors include the IBM System/390 series, Cray comple 8800, and the Hitachi MPS800, Computers, and their word length generally ranges 2 to 64 bits. They are capable of addressing megabytes of memory and handling ail types of peripherals and a large number of users, Supercomputers such as the Cray-2 SSS EMP are 64-bit high-performance and high-speed computers. They are the fastest a Computers, capable of executing billions of instructions per second) and are used pri Marily in research dealing with problems in areas Such as global clinfate and high-energy Physics. "Si Medium-Size Computers a these computers were designed to meet the instructional needs of small leges, manufacturing problems of small factories, and the data processing tasks Drusinesses, such as payroll and accounting, (These were called minicomput=B-k.M sae x Se rn moe cps an inant Fangs sel to be anywhere fom §25000I9 S100000 pea nn Te Sich computers asthe Dial Bgulpment PP T1/65 mate Dea es Howeves curen low-end mainframes and highend miceso rnc Ne ike a the nxt sion) onrap considerably in price performance sok er ee Sonal miniompatrs. Therefore the term minicomputer seedy es torical context, 1.3.3 Microcomputers ‘The 4-bit and 8-bit microprocessors became ations were primarily in the areas of machine control ‘of the microprocessors and memory began to decline, the applic: Ba ate Such 88 video games, word processing, and small-business spplicarece available in the mid-1970s, and initial appli- and instrumentation. As the price ations mushroomed in al: Esty microcomputers were designed around 8-bit microprocessors, Since thee te Pen c bit microprocessors, such as the Inte! 8086/88, 80386/486, Pentium. Pro: Penn, Féatium 4, Motorola 68000, and the Power PC series have been introduced, and nay TaSrocomputers are being designed around these microprocessors, Present-day micro Sompaters can be classified in four groups: personal (or business) computers (PC), work hip microcomputers (microcontrollers). stations, si PERSONAL COMPUTERS (PC) igle-user systems and are used for a variety of purposes, si 'd keeping, personal and instruction: se microcomputers are sin 25 payroll. business accounts, word processi finance, accessing Internet resources (e-mail, Web search, newsgroup) ‘They are also known as personal computers (PC) or desktop computers Fanges from $500 to $5000 for a single-user system. Examples include such microcomput- eras the IBM Personal Computer (Aptiva series), the Hewlett-Packa the Apple Macintosh series. Figure 1.6 shows an example Atthe low end of the microcomputer spectrum, a typi of system memory, video sereen legal and medical ree Pavilion series, and cal configuration includes a bit(Or64-bit) microprocessor, 32 10 256 MB (megabyte: (monitor), 4312" high-density floppy disk, a hard disk with storage capacity of more than 10 Sigabytes, a CD-ROM, and a Zip disk sThe floppy disk isa magnetic medium similar toa Casselte tape except that it is round in shape, like a record. Information recorded on these disks can be accessed randomly using disk drives. Conversely, information stored on a cas «information at the end of the tape, the user must Sette tape is accessed serially. In order tor Fun the entire tape through the machine. The is similar to the floppy disk except that the magnetic material is coated on a rigid aluminum base thatis enclosed in a sealed con- tainer and permanently installed in a microcomputer. The hard disk and the floppy disks ae ‘Used to store programs semipermanently, i.c., the binary information does not disappear power is turned off. However, the microprocessor does not have direct access to this ation (programs) into system memory to modify or ex- aige capacity; therefore, large and fre- j it must copy this inforr programs. The hard disk has a large sto compilers, interpreters, programs suchee with Disk Storage: IBM PC DM ves Esso PiGreims ate stored Of this disk. The floppy disk is generally used for user programs and tp make backup copies, The microcomputers are further classified accor: Piliy, They are called laptop and notebook. The lay table microcom- Biles that has aflatsoreen.a hard disk, and a3!” floppy dick. and usually weighs around thy pounds, These computers.can be battery operated ot use AC Power and are camtied ease tly fromm place to place, These are calied laptop (instead of desktop) because the size is sinall enough to place them in one’s lap (if necessary), Rotebook computer is aportable microcomputer of a notebook size (819" x 11" » 2") soi Weighs around five pounds, A mic eSomputer smaller than the notebook computers, called 2 subnotebook, is also available, WORKSTATIONS ng to their size, weight, and pons P computer is a port Fonsins of the personal computers. ‘They are used in engle auls such as computer-aided design (CAD), computer-aided ded manufacturing (CAM), They generally inelude © (hard disk) memory in gigabytes, and a high-resolution Workstations are designed aro Processors (described id RISC (reduced instruction set computing) ISC processors tend to be faster and more ef- than the processors. used in Personal computers. Some of the workstations have Performance than that of the lowem large computers,essor, They can also be part of some larger systems, include an 8- or 16-bit microprocessor, from 256}, a Hex Keyboard, and seven-segment LEDs dispgy, 428K mthe microprocessor, memory. and Os in these small systeq called system monitor program, which is gear in less than 2K bytes of ROM. When a single-board meno all the monitor program is in charge of the system: it monitory qo nPMer i intenprets those keys, stores programs in memory, sends system ay MIS execution of the user programs, The function of fees the fn a small system is similar to that of the operating system ing large att®t Prices of these sinsle-board computers range from S100 to $809, ye iE ce being around $300. Tage Examples of these computers include such systems as the Intel $D the EMAC Primer (Figure 1.7). These are generally used to write bly language programs and to perform interfacing experiments K 85, SDK 86, and execute as, HIP MICROCOMPUTERS (MICROCONTROLLERS) microcomputers are designed on a single chip, which typicall t 256 bytes of R/W memory, from IK to 8K bytes of ROM es to connect I/Os. These are complete microcomputers on microcontrollers. They are used primarily for such functioy traffic lights. Typical examples of these microcomputer og Z8, Intel MCS 51 series, ly includes a micro. and several signa) a chip; they are also known nS as controlling applianges include such chips as the Motorola 68HC11, and the Microchip Technology Plc rand memory, we need various input and output devices. Rensor (described later) as an input device to sense room devices—a fan, a heater, and an LCD panel for dis yptem; this figure is an extension of Figure 1.3. Each ae -d briefly, 2feasccnal ae) {_ =PRoM || Memory FIGURE 1.8 Micror rolled Temperature §) MICROPROCESSOR igure 1.8 shows an 8085 processor with system bus} we will exp. Ous buses in the following chapter. The proc essor will read the binary instructions from Ferre execute those instructions continuously. It will read the temperature. pla Haste LCD display panel, and turn on/off the fan and the heater based mpe ture) MEMORY (The system includes two types of memory. ROM (read-only memory) will be Hore the program, called the monitor program, that is responsible for prosidin €ssary instructions to the processor to monitor the system. This will be a pe ram stored in ROM and will not be temporary storage of data: the need f INPUT Cisthissysiem, we need a device that can translate temps ‘an equivalent electrical signal;/a device that trans! the nec anent pro altered. The R/W (read-write) memory is needed for for this memory will be explained in a later chapter. ature (measurement of heat) into ates one form of energy into anotherexample, 4 microphone is a transducer al anda thermocouple isa transducer tye SCHSOFS are available as intege conductor electronic devieg generates a voltage signal that is proportional vs fan analog signal and our processor is capable of handling this signal must be converted into digital its, The yt Berfoms that function, The A/D converter. shown in gu 18 ieoncluctor chip that converts an input analog signal imo the Yi nals. In mieroprocessor-based systems, devices that Provide ya! “re connected to the processor using devices such 4 jour system. this A/D converter is an input port, and it will be Ber called an address. The microprocessor ready this digital sign fan, heater and liquid crystal display (LCD), (Be comnected to the processor using latches called output por ee This iS an output device, idemtified as Portl, that is turned on by the Broa {the temperature reaches a set higher limit : This is also an ‘output device, identified as Port2, that is turned on by the proces. En the temperature reaches a set lower limit a SeMAIDisplay (LCD) This display is made of crystal material placed between ities inthe form of a dot matrix or segments. It can displa 'y letters, decimal digits, Geatarters. The LCD in Figure 1.8 will be used to display temperatures. 4 monitor program or system so $4 into subtasks and written as independent m en the system is reset, the micropr first memory location of ROM and: nce tO execute the Prograni)MICROCOMPUTERS, AND ASSEMBLY LANGUAGE 8 CPURthe central processing unit. The BroUp Of circuits that processes data andl pro Sdes contol signals and timing. Ie incine eee chiles the arithmetieogie unit reais ‘Struction decoder, and the ‘control unit, ct a o au pry Tre pe, Aout that performs arithmetic and topic operations. The ALU S Control unit—the group of circuits that im the computer and controls data flow S Memory—a medium that stores binary information (instructions and data), & Input—a device that transfers information from the Outside world to the computer, © Output—a device that transfers information from the computer t0 the outside world. e Provides timing and signals to all operations Scale of Integration (small-scale integration) —the process of designing a few circuits on a si The term refers to the technology used to fabricate diserete 2 MSI (medium-scale integration) —the process of designing le chip. le integration)—the process of designing mioie than a thousand gates Fane fib, Similarly. the terms VLSI-(very-large-scale integration) and SES/ Superlarge-scale integration) are used to indicate the scale of intearation logie gates on a chip tore than a hundred le chip, Microcomputers v © Microprocessor (MPU)—a semiconductor device (integrited circuit manufactured BY using the LSI technique. It includes the ALU, register arrays. and contol eifeuits fe chip. The term MPU is also synonymous with the microprocessor (see Section 2.2 for additional details). © Microprocessor-based product—a machine or product that uses a microprocessor so Fun oF execute its operations. It is represented by three components: microproces- Sor, memory, and I/O (input/output), © Microcontroller—a device that includes microprocessor, memory, and VO signal Hines on a single chip, fabricated using VLSI technology SD Microcomputer—a computer that is designed using ineludes microprocessor, memory, and I/O (input/output). 1B Bas—a group of lines used to transfer bits between the microprocessor and other ¢omponents of the computer system D RAM (Random-Access memory)—see R/Wm. DB ROM (Read-Only memory)- memory that stores binary information permanently. Ba The information can be read from this memory but cannot be altered. BIWM (Read/Write memory)—a memory that stores binary information durin ‘PPeration of the computer. This memory is used as a writing pad to write user Aa, ° and data. The information stored in this memory can be read and altered easily. Languages ~ binary digit, 0 or 1. on asi microprocessor as its CPU. It the group of eightbits the computer recognizes and processes ata time, command in binary that is recognized anc executed by the comy task: Some instructions are designed with one word, ang some ree words. 4 combination of letters to suggest the operation of an instruction, G Program—a set of instructions written in a specific sequence for the Compute to ge. > comptish a given task. ‘ © Machine language—the binary medium of communication with a computer through _ aidesigned set of instructions specific to each computer. © Assembly language—a medium of communication with a Computer in which pro. {rams are written in mnemonics. An assembly language is specific to 4 given com. es Janguage—a medium of communication that is ™achine-dependent or Seas toa given computer. The machine and the assembly languages ets computer Hecaegre! Pow evel languages. Programs writen in these languages se not Azansferable to different types of machines © High-level language—a medium of communication that is independent of a given Pacict Programs are writen in English-like words, and they can tc executed on a machine using a translator (a compiler or an interpreter) iP Souree code—a program written either in mnemonics of an assembly language or in D eaailike statements of a high-level language (before inn assembled or compiled), 2 Compiter—a program that translates English-like words of a high-level language into the machine language of a computer, A « ads a given program, called a Souree code, in is entirety and then translates the program into the machine lane Which is called an object code. 2 In Be ain hat translates the English-ike statements of a high-level | “Tangnage into the machine language of a computer. An interpreter translates one Se geemetet atime fom a source code to an object code. n assembly language program from of a computer. n Interchange. This is a 7-bit a- combination is assigned to either a mmand, t 256 combinations. The ASCH code is ex- {0 eight bits to include additional graphic symbols. *et Of programs that manages interaction between hardware He primarily for storing information on disks and for Sor, memory, and peripherals, 2 am that interprets the input from a keyboard and con- ie AMICROCOMPUTERS, AND ASSEMBLY LANGUAGE: ————____M0oxc aeap TBS Chapter bas given a brief introduction to computer organisation and compu ESSE wih phasis on the 8085 mcroprcewor and eacat see Re cea ae an Otero of the entire spectrum of computers, incinding thelt Salient features and applications. The primary focus of this book is on the ests ofthe S085 microprocessor and its industrial applications. Heavy emphasis alco pat on assembly language programming in the context of these applications ty the : Bulcrocomputer field, little separation is made between hardware and software, espe- sally im applications where assembly language is necessary. In designing « mane j Prseessor-tesed product, hardware and software tasks are carried out concurrently be. Sause 2 decision in one area affects the planning of the other area. Some functiony cag fe performed either through hardware or software, and a designer needs to convider Both approaches. This book focuses on the tradeofis between the two approaches as a design philosophy chitectural er 2 introduces 8085 assembly language programming and provides an ‘overview of the 8085 instruction set. Chapter 3 expands on the architectural concepts of Microcomputers, discussed in this chapter, using an illustration of a generalized micro- Processor. The chapter discusses cach component of the block diagram shown in Fi 13. Chapter 4 focuses on the archite: ne ure ture details of the 8085 microprocessor and mem- ry interfacing, and Chapter 5 on 1/O interfacing QUESTIONS AND PROBLEMS eee 1. List the components of a computer Explain What is cPu? Explain the difference between a microprocessor and microcomputer Explain these terms: SS/, MSI, and LSI. Define bit, byte, word, and instruction How many bytes make a word of 32 bits? Specify the number of registers in a 2K memory chip. Calculate the number of registers in a 64K memory board a Explain the difference between the machine language and the assembly language of the 8085 microprocessor. What is an assembler? What are low- and high-level languages? iin the difference between a compiler and an interpreter What are the advantages of an assembly language in comparison with high-level functions of each component of a computer. jicroprocessor? What is the difference between a microprocessor and a Be Beh onns ppIntroductian . nnaD Introduction to 8085 Assembly Language Programming B.k.M As defined in Chapter 1(/an assembly language pro. gram is a sc wctiOAS written in the mnemon: EeS0F a given microprocessor. These instructions are the comm he m SsoF to he executed to accomplish a task. To write 8085 microprocessor, we he prograniming model and microprocessor. This chap- he 8085 micro- (The 101 ifleren groups: data transfer Batch, and machine control}}cach of these groups is Wissirated with examples. The chapter also dis BERS the instruction format and variou A simple problem of adding to Hex numbers fo ilustrate writing, assembling, and execut 1. The flowcharting technique and sym Aiscussed in the context of the problem truction set is classified into five arithmetic, logic The chapter concludes with a list of selected 8085 instructions. OBJECTIVES © Explain the various functions of the registers in the 8085 programming model © Define the term flag and explain how the flags are affected Explain the terms operation code (opcode) and the operand, and illustrate these terms by writing instructions Classify the instructions in terms of their word size and specify the number of memory registers required to store the instructions in memory, List the five categories of the 8085 instruction sel Define and explain the term addressing mode. 31 ;MICROPROCESSOR BASED SYSTEMS: HARDWaRE ie to solve € program: © Translate the Aowehart into m lve a simple program: e Jogical steps 10 s problem. vert the mnemonics into Heyrey Mowehart from the logical steps of @ programming proftem, Ode f a 8 ‘programming problem, 7 [A model isa conceptual representation of a real object. Tt can take any forms, & Geserition, a dravving, or a built structurdYMost of us have seen gi ‘hite model of building. Similarly the microprocessOkcan be represemedse terms often ware (physical electronic components) and a programming model (information nee Write programs)) In Chapter 1, we described a simplified hardware mode Of a mi Brooessor as a pir of the microprocessor-hased system (Figure 1.3), ft showed three Ponents: ALU, register array, and control. Figure 2.1 shows/a hardware model and ape, gramming model specific to the 8085 micropro. i Tear Register Arrays Accumulator A (8) ] | Fi Memory Pointe Resisters ebr Data Bus Timing and Contro Unit Contror - Signals Data Bus fa) Bidirectionaldata Conditions « Table 2.1 and their Commonly used fiay fest data condition SenNET TO coe name wrroonce Moonee i 8085 Hardware Model hardware model in Figure 2.1(a) sh 2.1(@) shows two major segn Stes the arithmeticNogic unit (ALU) and we pater sat Sirection decoder, and Mags. The secon se Both segments are connected Tee deithemetic and logical operations are p fm the accumulator, and flip-Nops, {eee Figure 2 1a). here a ts. One segment Sbit register called ment shows 8 With various inter i mulator, in- id 16-bit rewisters, called an internal bus U, Results are stored are Set or reset to reflect the ae) : unidirectional ares bidirectional data bus, and Biikawtenit Sere one a et Is these thee buses were shoe tes {the 8085 processor ues the T6-it ater eee a — te S-bit data bus to transfer data, and the control bus roe met Pe eso the hardware molar includes ene formed in the AL Hed flags, © three buses: a 16. & control bus) In Chay a for timing sig- 212 8085 Programming Model fixe pr Consists of some segments of the ALU 1 physical and the registers, This Structure of the 8085 but includes the information that ize programs, (The model include: ister, as shown in Figure 2 inter and the pro; 8 Six registers, one 1(b)(In addition, it has two 16-bit gram counter. ‘They are described briefly as follows, Purpose registers to store 8-bit data; these are identified as B, jes shown in Figure 2.1(b) They can be combined as register pa erations. The programmer can use these reg- isters by using data copy instructions. sister that is part of the arithmetic/logic unit (ALU). This reg data and to perform arithmetic and logical operations. The result ulator, The accumulator is also identified as register A. incl p-flops, which are set or reset after an, operation according to » the accumulator and other registers, They are called Zero S), Parity (P), and Auxiliary Carry (AC) flags} they are listed in in the flag register are shown in Figure 2.1(c). The most Carry (CY). Sig ase Zeso, Carry, and Sign, The microprocessor uses these flags to king process of the mi ‘Processor, The conditions (set or reset) of the Hags are tested through software instruc~ Bons. For example, the instruction JC ump On ¥y) is implemented to change the se ‘of & program when the CY flag is set, The thorough understanding of flags is in writing assembly language programs. Alpe OP) Lpyeae aveeiT TWYLNaS unavound LINtherwine it iy reset, ‘operation results in carry, the CY Hay is set thy ag is set if bit D, of the result = 1: otherwise it is reser, «the flag is set: for an odd UMBC OF jg Carry: In an arithmetic operation, when ac sit Dy. the AC flag is set. This flag is used = there is no Jump instruction associated with this R (PC) AND STACK POINTER (SP)* two 16-bit registers used to hold memory addresses, TI eause the memory addresses are 16 bits. Sor uses the PC register to sequence the execution of the inst 1 Function of the program counter is to point to the memory ic he size of these regi ning model will be used in subsequent chapters to examine how these after the execution of an ii instruction. CLASSIFICATION Pattern designed inside a microprocessor to perform a specific Of instructions, called the instruction set, determines wl can pr) 8085 microprocessor includes the 80BDA, plus two additional instructio Plain at this times it for the is nchuded tere ony ta provide conn ‘his concept wile explained oe ee eee nath85 instructions can be classi er (copy) operations, arithms ified Sh ae ae sa 1g five functional categories: data and machine-control operations, * logical operations, branching. opera- ‘The var- S of each ‘Types IG Between registers G Specific data byte to a reg ister or 2 memory location GB Between a memory location and a register G Between an 1/0 device and © the accumulator Examples Copy the contents of register B into register D. Load register B with the data byte 32H. From the memory location 2000H to register B From an input keyboard to the accumulator. ARITHMETIC OPERATIONS ‘These instructions perform arithmetic operations suc! and decrement. addition, subtraction, increment, G Addition—/Any 8-bit number, or the contents of a register, or the contents of a mem © Gry location can be added to the contents of the accumulator and the sum is stored in the accumulator. No two other 8-bit registers can be added directly (e.g... the contents ‘0f register B cannot be added directly to the contents of register C). The instruction DAD is an exception; it adds 16-bit data directly in register pairs. Subtraction—Any 8-bit number, or the contents of a register, or the contents of a mem- "ofy location can be subtracted from the contents of the accumulator and the results in the accumulator. The subtraction is performed in 2's complement, and the re- if negative, are expressed in 2's complement. No two other registers can be sub- directly. sment—Phe 8-bit contents of a register or a memory location can be ‘or decremented by 1. Similarly, the 16-bit contents of a register pair (such ‘can be incremented or decremented by 1. These increment and decrement op- differ from addition and subtraction in an important way; Le. they can be per~ J in any one of the registers or in a memory a— 208 alll | various logical operations with the contents of the ace R—Any 8-bit number, or the contents of a » an be logically ANDed, ORed, or Exclusive-ORed aa r ator. The results are stored in the accumulator, number, or the contents of a register, or a memory . < , greater than, of less than, with the contents of the aceay b plemented; all Og =a he contents of the accumulator can be com Honally “Conditional jumps are an important aspect of the decision-m: g. These instructions test for a certain condition (e.g ® program sequence when the condition is met. In ion called unconditional jump. and Restart—These instructions change the s subroutine or returning from a subrouti also can test condition flags. aking process in . Zero or Carty flag) addition, the instruction, uence of a program ee The conditional Call and meri, bak 5 nS control machine functions such of the 8085 Operations Operations related to data manipulation can be summarized in four’ as Halt, Interrupt, or do nothing.mi instruction has two parts: one is the ‘Geile, and the second is the data to be sean be specified in various ways, It» memdry location, or an 8-bit (or 16-bit) processor to perform a given task fi process 4 given task on specified data task to be performed, called the operation code (op- 2 neha any Called the operand) The operand for day do & bit (or 16-bit dat, an internal register tructions, the operand is implicit. address. In some inst 2.31 Instruction Word Size (ihe 8085 instruction set is classified into the following three ing three groups according to wor Size or byte size = ee a, ra In the 8085, “byte” and “word” are synonymous because it is an 8-bit microproces- SS SePOSs istnuctions are commonly referred to in terms of bytes rather than oot 1. H-byte instructions 2 Ddyte instructions 3 Sbyte instructions ONE-BYTE INSTRUCTIONS A f-byte instruction includes the opcode and the oper ind in the same byte. For example Task Opcode —_Operana* Copy the contents of Mov GA the accumulator in register C. Add the canténts of ADD B 1000 0000 register B to the ‘contents of the ac- ‘cumulator. Invert (complement) CMA 0010 11 aan each bit in the ac- cumulator. Binary Code Hex Code o100 1111 4FH 80H ie Sairictions re V-byte instructions performing thee ferent asks. I the first instruction, both operand registers are specified. In the second inset te @perand B is specified and the accumulator is assumed, Sinan in the thie insiruton the accumulator is assumed to be the implicit operand, These instructions are store format in memory; each requires one memory location. the destination register C iy shown firs, followed by the source resteCode | 0011 thio 3E 00110010] 49 0000 0110, 06 1111 0010 F2 sttons would require two memory locations each to store the binary codes 52H and F2H are selected arbitrarily as examples, Sy instruction, the first byte specifies the opcode, and the following two bytes He bit address. Note that the second byte is the low-order address cat the third ‘Righ-order address. For example: Binary Hex Operand Code Code* 2050H OOTT 1010) 3A First Byte [OT0T 0000} 50 ‘Second Byte 00100000 20 Third Byte 1100 0011] C3 First Byte 1000 0101 85 Second Byte {0010 0000 20 Third Byte Teduite three memory locations each to store the binary coded) are iN many ways similar to our everyday conversation, For ex- u we may make the following requests and orders:The first request specifi ; Bigeite dita bye in ese requesy lt © the insiruction for loadin contents, even though one is in conemn, MEAtions the bow! rather da ite Br Get on can nnet® aisers owt are gee the bows ei seta ~ the exact item; The second Prhese vara sttated in later chapters.) * EX¢MPles ofthe last two types These various ways of specifying dats micprocessor instructions require one or iy Beep cations sed in specifying the operands hey ee little Se comennarnamecwer(The meni enantio 9 ih op ed al? by te menace a§Vhen anc gaan ee itis stored in binary code, the only code the imicroprocessor is capable of reading and un, Leemine Rite conventions used in specifying the instructing valuable in terms of Ecaine uniformity in different programs and in writing anctlo The important point easanamber is that the microprocessor neither reads nor underseanas mnemonics or hexa decimal numbers, are called the addressing modes) ‘Although ye stOrds to specify the operands, the nove 2.3.2 Opcode Format (Go imderstand operation codes, we need ‘0 examine how an instruction is designed into the Fron ade a This information will be useful in reading ause's manta, in which open Be anes ae specified in binary format and 8-bits ar divided in various groups. Howenee Mis jnformation is not necessary to understand assembly language programming (In the design of the 8085 microprocessor chip, all operations, registers, dnd status Mags are identified with a specific code. For example, all internal registers are identified as follows: Code fers. Code _Register Pairs 000 B 00 BC 001 c o1 DE . 010 D 10 HL Ol £ is AF OR SP 100 H as: 101 rs ia ce Fs iL A i 110 Reserved for Memory-Related operation-ASED SYSTEMS: HARDWARE any ‘Some of the operation codes are identified as follows: Function Operation Code Rotate c 00000111 = 0711 each bit of the ac- =974 “ ‘cumulator to the left by (8-bit opcode) Babe oars 10000 2. Add the contents of a reg- ister to the accumula- tor, (S-bit opcode—3 bits are reserved for a register) ‘This instruction is completed by adding the code of the register. For example, Add 10000 Register B 000 A Implicit Binary Instruction: 10000 000 = 80H Add Reg.B Ap assembly language, this is expressed as Opcode Operand —_Hex Code ADD B 80H 3. MOVE (Copy) the content of o1 DDD SSS register Rs (source) to reg 2-bit Opcode Reg. Ra Reg. Rs ister Rd (destination) for MOVE This instruction is completed by adding the codes of two registers. For example, Move (copy) the content: 9 1 To register C 901 (pp) From register A + 11 1(Sss) Binary Instruction 91001 111 4RH Opcode Operand In assembly language, this ig expressed as Opeode §—Operand Hey ( ‘ode GA AF Stination and the Second register is the source— ( Eineral pattern trom left to right, Typically, (Copy) instruction is shown us follows:BOBS is an S-bit microprocessor, and it processe Thary numbers. However, the real worid operates if Reiner etc.) only bi- ates examin coding. What isthe leter“A"? Iisa symbol opr ETE Media Serre mesa that eyes can recognize. Similarly, we can epee em Be seeenerctont media. In 8-bit processor systems, commonly used colar eet fats are ASCU. BCD, signed integers, and unsigned integers. They are sal a ies lows. ol FB ASCH Code—This is a 7-bit alphanumeric code th English alphabets, and nonprintable characters suc ASCIl is an 8-bit code. The additional numbers (bey graphical characters. This code was discussed in Chay 2 BCD Code—The term BCD stands for binary-coded decimal; it is used for decimal mumbers. The decimal numbering system has ten digits, 0 to 9, Therefore, we need aly four bits to represent ten digits from 0000 to 1001. The remaining numbers, 1010 {Aj to 1111 (P), are considered invalid. An 8-bit register in the 8085 can accommodate wo BCD numbers. Signed Integer—A signed integer is either a positive number or a negative number, In an 8-bit processor, the most significant digit, D,, is used for the sign; 0 represents the Positive sign and | represents the negative sign, The remaining seven bits, Dj—Dp, rep- fesent the magnitude of an integer. Therefore, the largest positive integer that can be processed by the 8085 at one time is 0111 1111 (7FH); the remaining Hex numbers, 80H to FFH, are considered negative numbers. However, all negative numbers in this microprocessor are represented in 2’s complement format (see Appendix A.2 for addi- tional explanation) G Unsigned Integers—An integer without a sign can be represented by all the 8 bits in 4 microprocessor register. Therefore, the largest number that can be processed at one time is FFH. However, this does not imply that the 8085 microprocessor is limited to handling only 8-bit numbers. Numbers larger than 8 bits (such as 16-bit or 24-bit numbers) are processed by dividing them in groups of 8 bit: at represents decimal numbers, h as carriage return. Extended ‘ond 7-bit ASCII code) represent ter 1 (Section 1.24), Now let us examine how the microprocessor interprets any number. Let us 8 fier performing some operations the result in the accumulator is 0100 00 a Hi ‘number can have many interpretations: (1) It is an unsigned number equivalent t0 6 is specified as Rd and 12 is specified as Ry 1 indicate destination and source,‘can per adding 2.4.1 PROBI Write B, res PROB Even | steps suffi 8 Data Lines, i 1. Lo 2 A EEE CIR EBED number representing 41 decimal: (3) itis the ASCII capital je. 3. Di a ee RE BBP Of 8 bits where bits Dj and D, turn on and the Temaining bity SS 88 compat devices. The processor processes binary bits: it 'S Up to the user to inter. FLO\ Pete resak tour example. the number 41H can be displayed on screen as an ASCH The + Wort! BCD. diagr steps | 234 instruction and Data Storage: Memory om F. SE Provide this information to the processor? It ig ro- es chip called memory. In some ways, the term memory is oe Hy bits. Memory chips used in most systems are nothing ‘han Sacked one above the other as shown in our me mory model in Figure 2.9, lod aly fr rezisier. and each register can store 8 bit, This chip can be referred to Pte oF 32 14 x has two address lines, A,, and A\, to identify FIGU and three timing or control signals: Read (RD, Fog are designed to be active low, indicated “= elect this chip and identify its register and store nplify the memory ad- ic used in the system, facing in more detail shows only four registers to sim hip is in kilo- or megabytes. The ined by the interfacing I addressing and intert nto tell from the instruct m in small steps i 4 computer to perform a specific ion set of the microprocessor. To terms of the operations the 8085ne AREMENL LANCUAGE Mog fee translate these steps into instructions woiwumbers in the B0RS langungs s° Masa ag ne pop o Seas to load the two hexadecimal 88 32H and 48H in re ani t ‘eeimal numbers 32H ang ct a the numbers, and disp E MBORTC etively. Add 0 ‘nd display the sum at the LED output port PORTT PROBLEM ANALYSIS Ph this is a = broblem. it is necessary to divide the problem into small he ment WFiting programs, The ‘ording of the problem provides ‘ry Steps. They are as follone fdiepialec pits ches forthe meses IE Load the numbers in 2. Add the number. B Despiey the sum at the output port PORT FLOWCHART srajihe seduence can be represented in block Bie p> listed in the problem analysis agra. » Shows such a flowchart representing the above le flowchart, and the steps are self-explanatory. We will discuss flow next chapter. ASSEMBLY LANGUAGE PROGRAM ome anes veTaT: WE Need to translate the blocks shown in the ind then, subsequently, into mnemonics. By examining the ‘ites tyPes of operations: Blocks 1 and 3 are copy op. To write an assembly Recher into 8085 operation. Blocks. we ssify them FIGURE 22 Numbers 7 Display Sum+> is an arithmetic operation: and Block 4 isa mac ao {into assembly and machine languages, Set. The translation of each block into: mnemonics w hine-contrg You shouta th comments ig Block 1: MVIA32H Load register A with 32H © OMVI BASH. Lond register B with 48H ) ADD B Add two bytes and save the sum in, OUT OIH Display accumulator contents at pom yy HALT End ‘FROM ASSEMBLY LANGUAGE TO HEX CODE To convert the mnemonics into Hex code, we need to look up the code in the Bogs ; is called either manual or hand assembly. 85 in. Mnemonics Hex Code MVIA32H 3E 2-byte instruction 32 MVIB.48H 06 2-byte instruction 48 ADD B 80 I-byte instruction OUT 01H D3 2-byte instruction ol HLT 76 L-byte instruction RING IN MEMORY AND CONVERTING FROM ‘CODE TO BINARY CODE store the program in R/W memory of a single-board microcomputer and display the zt {0 know the memory addresses and the output port address. Let us a that R/W memory ranges from 2000H to 20FFH, and the system has an LED out- om with the address O1H. Now, to enter the program: the system by Pushing the RESET key. ers adres using Hex keys where the program should be stored. “ bie Sod by Dishing Hex keys, For example, to enter the fist mee E, and STORE keys, (The STORE. key may be labeled differently in ) When you ; ou push the STORE key, the program will store the ma in memory location 2000H and Upgrade the memory address to 2001H. 3 until the last machine code, 76H iw does the Hex code get converted into binary code? The al- n stored in Read-Only memory (or EPROM) of theFIGURE 2.4 ‘Manual Assembly Process Memory MVIA.32H Address MVI B.48H ADD B iG THE NUMBER IN AN INSTRUCTION larify the relationship among instruction the stumbling blocks in hand“writing assembI ~ We can assign memory adel ce once ela the number of byt instruction. Fe Iresses in. ree na ction has three Hex codes and requires three memory locate ina can have a disastrous effect on ete Program How Does a Microprocessor Differentiate Between Data and Instruction Code? ic rocessor is a sequet ed on, it begins the exec continues in another) at the speed of uncondit or turned off, Sor differentiate between a the instruction, Therefore, it assumes tha nd code, 32H, is a data forget to enter 32H and ente: tead, the 8085 will load 2 As a consequence, we Instruction set has 74 operat all the 80804, MO). It is an overwhelming experience for a lus two additionalFO 8008 ASSEMMLY LANGURGE PROGR ae io BeRetesiom: You Ge soy si, Brea dine. Howes be ane as ato vag the Frequently used instructions listed below? 8” OVErview of the ger pe tue ‘set by exam. ‘The Following notations are used in the dency ; "Dtlon OF the instruction, R_=S8085 8-bit register (A,B.¢, ; M_ = Memory register (location) ogee ; ister destination (A.B, C.D, BH, Ly ‘ ter pair O = Contents of (BC, DE, HL, sp) J. Data Transfer (Copy) Instructions. These instructiong Det Tr ‘ons Perform the following sx op ® Load an S-bit number ina register Load 16-bit ad 16-bit number ina reg Beapy between VO and accumulator + Copy between resister ne y isters and stack memory Mnemonics Examples Open’ di MVIR.** 8-bit MVIB, 4FH Load 8-bit data (byte) in a register 12 MOV Rd. Rs MOV B.A Copy data from source register Rs into MOV C.B destination register Ra 13 LXI Rp.** 16-bit LXI B, 2050F Load 16-bit number in a register pair 14 OUT 8bit OUT 01H Send (write) data byte from the (port address) accumulator to an output device is IN 8-bit IN 07H Accept (read) data byte from an ‘input (port address) device and place it in the accumulator 16 LDA 16-bit LDA 2050H Copy the data byte into A from the memory specified by 16-bit address 17 STA 16-bit STA 2070H Copy the data byte from A into the memory specified by 16-bit address S18 LDAX Rp LDAX B Copy the data byte into A from the memory specified by the address in the register pair STAX Rp STAX D Copy the data byte from A into the memory specified by the address in the register pair explained Heeinuctions are explained nd illustrated in Chapters 6 and 7, ae Lae ‘sorumnaies He Appendix F for easy reference: the appendix als incites thes Ts OS ie iaceonding to the functions, hexadecimal sequence of mae wo gia BoM Kp sepnccent pence repioe. hn the OBS istactions hese ate PBC... Wad Lor reper povInstructions. The frequently used BH Manipulation Instructions, The. * X-OR (Exclusive OR) OPsralioa Logically AND the contents arithmetic opera tions are: Subtract t Increment (Add 1) Deer — Examples Operation ADDR ADD B Add the contents of g cel ; Feiter (0 the contents fq aa a ADI8-bit ADI 37H Add 8-bit data tothe conten ad i ADD M ADD M Add the contents of Memory a : address of memory is ip Hl SUBR SUBC Subtract the contents of a een the contents of 4 a y SUI 8-bit SUI 7FH Subtract 8-bit data from the coment, of A 3 ‘SUB M SUB M Subtract the contents of Memory from A the address of memory isin i ai register INRR INR D Increment the contents of a regis INR M INR M Increment the contents of ‘memory, the address of which is in HL ! DCRE Decrement the contents of a regiter uy ; DCR M Decrement the contents of a memory | the address of which is in HL | INX H Increment the contents of a register - pair DCX B Decrement the contents of a register Pair 4 ‘se instructions include the * Compare + Rotate Bi register with the contents of.IARODUCTION TO 8088 ASSENELY LANGUAGE PROGRAM ic 32 ANIS-bit Ps hv. ' Contents of pian Logically OR th he contents of memory with the cont With the contents ofA: the ada? XRAR XRAB pachMenory isa HL reg *clusive-OR the contents of a riser a With the contens of & we XRI8-bit XRI6AH Exclusive-OR 8-bit data withthe contents of & 39 XRAM XRA M Exclusive-OR the contents of memory With the contents of A: the wi 4 : of memory is in HL register 310 CMPR Cup B Compare the contents of revister with he contents of A for less than, equal 10, or greater than B11 CPI S-bit CPI 4FH Compare 8-bit data with the content Of A for less than, equal to, or than @ Branch Instructions. The following insructions change the program sequence Bee 1S-Pit adress IMP 2050H Change the program segues the specified 16-bit address B2 IZ 16-bit addre 32, 2080H Change the program sequence specified 16-bit address ia is et BS) ANZ 16-bit address JNZ2070H Change the program sequence tot specified 16-bit address if the Zer flag is rset BA IC 16-bit address 41C 2025H Change the program sequence tothe specified 16-bit address if the Cary flag is set BS INC 16-bit address INC 2030H Change the program sequence ote specified 16-bit address if the Carry fing isroset he program sequence tothe 46 CALL 16-bit address. CALL 2075H a location of a subroutine 47 gram after Return tothe ealing program afer RET RET completing the subroutine sequenceStop processing and way Do not perform any operation = dons iS 4 representative sample: it does not inetude © | I-IM data operations, additional jump instructions, od e MING AND HAND ASSEMBLING A PROGRAM ediscussed the 8085 instructions, rec Per feserwction. looked at the relationship between the instruction the processor's computing capa: SSS Overview OF the instruction set. Now let us pull together all these concepts in 4 simple illustrative program idy stored in memory registers (also referred. addresses) 2051H and 2052H. Location 20S1H holds jolds the byte 9FH. Subtract the first byte. 2053H. Write instructions similar to the problem in Section 2.4. However, we need to note some ms in this problem, Bo be subtracted are already stored in memory registers 2051H and by Cet Reed to write instructions to Store these bytes. You should store Wsing keyboard of your trainer, oF if you are using a simulator, You ce 7 memory locations when you store them. a if at memory location 2030H. This memory lia ize that you can write a programHERSBUOHION TO Bees ASEM LaNCUACE py PROGRAMME ek orn tet operations in Teme Ain reforming ic ae tH ALU: etnies A The date totes mut be copied Irons ra : = mew stm PrOCESSOF re sisters (unit © accumulator and AND ASSEMBLING HEX Gop me < By sown ae aerate in wri i ed ST ie RSE. By examining Section 24 we find two . nOy. Tre ano Ls t-eopy a bye tre =. riveen mene te instructions (MOY kere, R "olny esses bat hae nse 7 Been. which wil on cecieet tne Now| sk cover Mi he 8085 Instruction Summer tne: Penne LDA 16-bit. LDA is he opcode With Hex code 3A. (Fo F Orden) ot LDA, see Appendix F—allinstuctine a i discussed in Section 2.4 “Recognizing he Instruction”), this must te instruction and will re & Th eae A it address oF the memory location fom which we vs 10 3A er ag Nat © Copy a byte from memory location 20a The 3-by Bo Se Section 23° 16 bifalame is aneaye ete le awe h-order byte. Our program be MO at therefore, these 3 bytes will be stored in lovatens wh 2 And the instruction, when executed, will copy th ere seemed te into A. 1 we copy the second byte QFE om mem I destroy the frst byte, 49H, Therefore, the p first in some other register such as B. should be to copy the byte from A 1.2in Section 2.5) copying from 1 register Rd. The terms Rs and Rd are nL. The instruction is note the reversed order of A and B 3. Now w FH) from memory location 2052H into A by us LDA 20521 with the 4 The n. Instructions, we fin 3-byte Hex code 3A 52 biract B from A. If we 20, Ak in Section 2.5 under Arithmetic instructions: 2.4, SUB R: 2.5, SUI 8-bit: and 2.6, SUB M. 61Hex code 90. (Look at the inside subtracts B from A and saves in A should be stored in memory I Of the back cover built oF 53 with Hex code 32 53 20. one Drogram must be terminated; otherwise, the processor Continues to 9 Out prog Instructions from the remaining memory registers unit p ets ie in an infinite loop. This step may appear trivial, but it is essential 10..Now we instruction i Single $ HALT with Hex code 76, n instructional trainers, the Restart (RST) instryes observed ~, fo pass the control of running programs back to the monitor Program me 11. Tnitiatty, “7. Now we need to load the two data bytes 49H and 9FH in Memory locat =a a and 2052H. This step is a manual entry of the da . 28 8. So far we have completed two steps: writing oe 2 # Bible 22) and entering the Hex code in the memory registers aad shown in Column 2 in Table 2.2). If you observe this prog COMMON Appendix H), it should appear as shown in Column 2. ising — . a tadio kit together, we now have a page of instructions. Now we need to fa wea Daze; begin to read, understand the instructions, and perform the ‘ask Until the Reg we prot 1. LDA 20 TABLE 2.2 Z Fongetti Mlustrative Program: Assembly i 3. MOV B. ca... —__—__—__ 4. Increme /— Column 1 Column 2 Columa umn 2 5. HLT Ne Instructions Memory Hex ‘Comments i 6. Confusi Addresses Code 2030, 3A Copy the first byte, 49H, from memory location 2051H inte —— 203) St 2032 20 Ths chapte 2033 47 Save the first byte in B } an overview 2034 3A Copy the second byte, 9FH, from memany the system’ location 2052H into A 2085 2 0 The 808 2036 20 fer (cop 2037 90 Subtract 49H from 9FH and save the result ia BP An inst 2038 32 Save the result in memory location 2053H to be op 2039 53 can be i 2034 20 called th 2038 IGIFF End of the program © The ins Dbyte i 2051 49 i O To write oF These data bytes must be manually load terms of ” are not part of writing the program instructtering He code © ed to tel he tocation 203011, We Re ecation through «kesboant or sian Be Bre two cboies let the procera Step, of execute (run) the entire nti See reprogram. The Sing or (See Appendix H), oe Weis stronaly advisable to follow a accumulator shoul SEMIDSH, the contents of memory Io in memory is sim Provessar’ 8 similar to the instruction, BRBexecute those * where our instructions begin Need to fet the proce: ‘ he processor know the start: ‘tion at a time, called Step execution is easily sinele Step execution. As the contents of registers wave SOH (9FH—49H), and ation 2053H should change YoU step through ‘When you execute When you execute STA, from 00 to 56H. ~ COMMON ERRORS pees teem Anew Lansuaze, we make errors such ag ew fang S Such as misspelling and mis Bee Sites errors happen in writing assembly language instructions, Bui ee Pe XA Syntax. A list of common errors is ‘our problem BEDS 2SIH: Not entering the code of the 16-bit ad @ Feteettine to enter the code for the operand, such B MOV B.A: Assuming that this co; Bo Besetrestine the address in decimal, from 2039H to 204011 & HLT: Not a program, © Confusing the entering of I tthe proces- 4s follows, with examples from idress in reversed order. as 2051H, pies from B to A, x code in memory as executing a program. SUMMARY ee ———— UMIMARY BRS Spier described the data manipulation functions ofthe 8085 microprocessor, provided Spee ete OF the instruction set, and illustrated the exe Wie system's clock. The important conce BEM 085 microprocessor operations are classified into five major groups: data trans- Hes (copy), arithimetic, logic, branch, and machine control. fe Aiiinsinuction has two parts: opcode (operation to be performed) and operand (data BO Be operated on). The operand can be data (8- or 16-bit), address, or register, or it Be implicit. The method of specifying an operand (directly, indirectly, etc.) is the addressing mode f lion set Ts classified in three groups according to the word size: 1-, 2 instructions, ‘an assembly language program, divide the given problem into small snip the microprocessor operations, translate these steps into assembly language ution of instructions in relat nto pts in this chapter can be summarized as followscategories of 8085 instructions that Manipulate specify the opcode ang 1h opin 4 ay tion MO 5 " ; | White he machine code for the instruction MOV #1. if ye Sialdant 3100s and the register code for A= 11." PoE = Oh ge 4. Find the machine codes and the number of bytes of the following Identify the opcodes and the operands. (Refer to the instruction set on “cover, Souvinen b. ADI FSH © SUBC ‘5. Find the Hex codes for the following instructions, identify the Foes ang ‘operands, and show the order of entering the codes in memory. a. STA 2050H —_b. JNZ 2070H i following instructions fro 3 6. Find the Hex machine code for the the insttign, 8. listed on the back cover, and identify the number of bytes of each instruction, MVIB.4FH Load the first byte MVIC.78H Load the second byte MOVA,C Get ready for addition ADD B iAdd two bytes OUT 07H Display the result at port 7 HLT sEnd of program IF the starting address of the system memory is 2000H, and you were to emer flex code for the instructions in Question 6. ‘dentify the memory addresses ang their corresponding Hex codes, Assemble the following program, Starting with the memory address 20208 MVEASFH © Load the first byte MVIBS68H Load the second byte SUB B Uubtract the second byte ANI OFH Eliminate D,-D, STA 2070H ‘Store D3-Dp in memory location 2070H HLT sEnd of program oe Assemble the following Program, starting at location 2000H. i ‘ead input switches at port F2H ON switches to logic | iSet Z flag if no switch is ON 3Go back and read input port if all + SWitches are offnumbers. Both the numbers he accumutator, sum in th Numbers: A2H and iat the program in Question 10 into the 808s, Sete 28H is stored in register B and dary byte Soe te Contents Of registers B.C, and the act Following two instructions, ‘Assembly language, S7H is stored in the accumula mulator after the execution of MOV A,B Mov C.A $B Deession 6, explain the potential results of the Program if the code O7H of the ‘Get instruction is omitted BEB Deestion 8. explain possible outcomes if the second byte OFH of the instruction ANT OFH is omitted BS Geren the following three sets of Hex codes, identify the mnemonics: (a) ) & 36 06 06 P2 82 4F 32 78 OE 32 Be 50 7B 20 81 FF 00 32 20 16 BE Meemify and explain the results of Question 15 (a) and (b). ee BEM Question 15 (c), what does the code 00 represent: data, low-order address, of a culate the sum, and identify } e program does, calculate the sum BE In Question 15 (c), explain what the prog the memory location w ¢ the sum is stored,stem consists of four compo- memory, and /O (in ussed in Chapter I. The micro. BAHOHS Operations, and communicates with such Penpherals (devices) as memory and 1/0. The in- “ design of the microprocessor, called Ms architecture, determines how and when vari- HS Operations are performed by the microproces- The system bus provides paths for the flow of Binary information (data and instructions). ‘This chapter expands on the bus concept dis- sGiisSed in Chapter 1 and shows how binary informa- Won flows externally among the components of the ‘The chapter deals with the internal ‘and various operations of the micro- iin the context of the 8085. It also expands data, controls the timing of on topies such as memory and VO. terfacing latches, and reviews in- devices, such as buffers, decoders, and OBJECTIVES O List the four operations commonly performed by the microprocessor or the microprocessing unit (MPU). Define the address bus, the data bus, and the con- trol bus, and explain their functions in reference to the 8085 microprocessor © Explain the functions Reset, Interrupt, Wait, and Hold © Explain memory organization and memory map. and explain how memory addresses are assigned to a memory chip.(Tre microprocessor is a prog, rammable digital device, desig: nd timing elements. The mic Toprocessor has a set of instr’ nicate with Peripherals, This a Microprocessor-initiated Operations 2 Internal ©perations Peripheral (or externally initiated) operationsMPU performs primarily four open Bee? Rest: Reeds data (or instructions from memory Memory Write: Writes data (or imeen 5 BVO Read: Accepes data tn SHO Wome: Sends data wo output devices) rttions fons are part of the Commun memory). To com Perform the Hoesen), the MPU needs to following Pheral or the memory locat information (data and instructions), signals, ms these functions us, the data bus, and Sup OF synchronization (re 8085 MPU perton calle bees thee BES 2: Using three sets of comm: the control bus)(Figure 3.1 TOup, called the system bus, lunication lines ). In Chapter 1 16 generally idemtified as Ay to Ais. The n one direction—from the address bus MPU to peripheral devices. The Perform the first function: identifying a Peripheral or a stem. each peripheral or memory location is identified by a binary address, and th fe address bus is used to camry a léshit are) Ti issn Memory Data Bus Control Busa ‘of a house, A house can be identinieg by var the forty-fifth house in a lane can be ‘dentitied by ty foardigt umber 0045. The two-digit mimbering schon’ an ide from 00 to 98. On the other hand, the fourclist sche can ide fom 0000 to 9999. Similarly the numberof address of th Beem different memory locations (or peripherals To ines is capable of addressing 2' 5.536 (generally known ag expltined in Chapter 1, 1K memory is determined by roundin ee similarly, 65,536 is rounded off to 64,000 as 4 ete “Most 8-bit microprocessors have 16 er _puter systems based on 8-bit microprocess: ‘erocomputer system has 64K memory. In fa than 4K of memory. even if the MPU is c: a Of address lines is arbitrary: itis determin Such considerations as availability of pins and intended. f & mic ‘amples the Intel 8088 processor has 20 and the Pentiunn ;pplications of the : ee ts 188 Broup of eight lines used for data flow (Figure 3,1),+ ___ bidirectional—data flow in Processor has 39 both directions between the MPU and memory eral devices. The MPU uses the rm the second functions ‘ary information (Step Dy ‘The eight data lines lable the MPU to manipulate 8-bit d, 256 numbers). The largest number that can appe: -bit microprocessor Multiple of 1K address lines. This may explain or have 64K memory, Hoyer Act, most single-board ™ictocompy apable of addressing gaye pM ied by the designer oj Address ines: thus they a 2 data line 'at carry synchronization sj Providing timing signals oa . is Somewhat confusing. These ‘dual lines that provide a pulse fc control signals for every ope hese signals are used to identify ate, (Figure 3.2), The ad it, which will be explained late an U sends a pulse called Memory Read memory chip, and the contents of the data bus and brought inside the microproces May formation thay ‘MAY include an instruction, an address, or & FIGUR Memet 1 chitect 1.2 The ir can b 1. St 2. Pe 3. Te 4. Se 5. Si th logic 3.3 ( mod thesutes the following thr Remory locations from 2000H to 2005H as shown 200 2001 2002 2003 6 b 3E F2 80 16 e microprocessor, which ed with the data, describe MVIB, 76H MVI A, F2H ADD B HLT to the data byte broug! of the 8085 microproce: in reference to the five ope instructions. ht into the MPU dep. we will describe in th Internal Data Operations and the 8085 ssor determi These operations are € operations, the microprocessor requites re nd control logic Hex codes of 2000 2001 2002 2003 200 2005; 2006; he next section Registers ines how and what op rarily during execution in the defined RW memory loca ster, ing the internal registers and the accumulator instructions are n arithmetic nd internal buses (paths for information flow b); it is repeated here for reference) shows the programmin:The 8085 Programmable Registers Accumulator A (8) a ® © D % E 4 6 L B.k.M Address Bus Bidirectional Unidirectional hen the user enters the memory address 2000H and pushes the execute key of the Mines the processor places the address 2000H in the progra m counter (PC) 1. The program counter is a 16-bit register that performs the fourth Stquencing the execution of the instructions, When the prt Places the address 2000H on the address bus and inerenrey 2001 for the next operation. It brings the code 06. interprets the code, places the ad. Gress 2001H on the address bus, and then gets byte 7811 , nd increments the address in PC 10 2002H. The proce: me process for the next instruction, MVI A, PH, 2. When the processor executes the fi and A to store F2H in binary (Oper When the processor executes the 78H to F2H, resulting in the sum PAH in A and sets the Cary flag as described next 4-Inour example, the addition operation g the sum is larger than the size Of the accumulator (8 bits). To indicate the carry, the processor sets the flip: op called Carry (CY fag) to 1 and places logic | in the flag register at the designated bit position for the carry S. The fifth operation deais with the concept of the stack The stack pointer is a 16-bit Teeisler used a5 a memory pointer to identity h operation in the list: ocessor begins execution, it nts the address in the PC to St (WO instructions, it uses regist tion 1), instruction ADD B in the Al n 16AH (78H + F2H ter B to store 78H U (Operation 2), it adds 16AH). Tt replaces F2H by enerates a carry because the stack, part of the R/W memory de- fined and used by the Processor for temporary storage of data during the execution. a This is fully described in Chapter 9, 3.1.9 Perip heral or Externally Initiated Operations (External devices (or signals) can init He the following operations, for which individual Pins on the microprocessor hip are assigned: Reset, Interr upt, Ready, Hold. ) ea 8 KG ataOn eke activated by a YAN external inded and the program counter OF cae nat a biegee T es ad ash To eaecte ss eT e He. ementency procedures) Microprocesyy routine (see Chapter 12), - » « pin called READY. Ifthe Hs into a Wait state, Thig ne? swith the microproc When the HOLD pin is activated by Beteshes Sontrol of buses and allows thee pie, the HOLD signal is used in Din :. Chapter 15). the reset pin is Be erations are listed here t0 provide an oy : ada Srview of the capabilities of the 8085, MEMORY component of Boas and data for the micropro. Stssified in two groups: prime (or main) memory and storage memory. ln the last chap- $e We discussed briefly two examples of Prime memory: Read/Write memory (R/WM) See Read-Only memory (ROM). Magnetic tapes or disks ean be cited as examples of stor- Bee Memory. First, we will focus on prime Memory and then, briefly discuss storage (emery when we examine various types of memory, p The RW memory is made of registers, and each register has group of flip-flops BeReld-effect transistors that store bits of information: these flip-flops are called memory SEBS The number of bits stored in a register is called a memory word; memory devices eps) ae available in various word sizes. The user can use this memory to hold pro- Baws and store data. On the other hand, the ROM stores information Permanently in the HERO diodes: the group of diodes can be viewed as a register. In a memory chip, all reg- Biles are arranged in a sequence and identified by binary numbers called memory ad- ERes865. To communicate with memory, the MPU should be able to select the chip, ify the register, and from or write into the register a microcomputer s ystem; it stores binary instruc- cessor. There are various t 'ypes of memory, which ean be ; ee and control lines to read from (as shown in Figure 3.2) or well that my following sections, we will examine the basic concepts relat mory: 3.2Srohoarcie log 2 = v= log 256/log 2 256 Here-x represents the number of address lines needed to obtain 256 binary nutter, Example Calculate the address tines required for an 8K-byte (1024 x 8 = $192 33 chip. Solution Number of address lines = log 8192/l 13 address Fines 3.2.8 Memory Word Size Memory devices (chips) are available in various word sizes nd 8 memory chip is generally specified in terms of th the other hand, the memory size in a Therefore. it is necessary to chip of size 1024 x 4 has 1024 registers and each te store a total of 4096 (1024 x 4 = 4096) bits, a numb t can store. On ms of bytes design a byte-size memory will need two chips: each chip will provide four data lines Example Caleulate the number of memory chips needed to design SK kemory 34 chip size is 1024 x | Solution he-chip 1024 x | has 1024 (1K) registers and each register can v J bit with one data line. We need eight data lines for byte-size memory ips are nee sity for IK-byte memory. For 8K-byte memory, we will need 64 We can arrive at the same answer by dividi z 8K-byte by IK x | as follows. 8192 x8 + 1024 x 1 = 64 e been concerned primarily with fin assigning addresses. In the next sectio, Miunicates with memory using the addr cling nece ary address lines and n, We Will examine how the microprocessor Com: ress lines and control 3.2.6 Memory and Instruction Fetch The Primary function of memory is to store instructions and data and to provide that in- mt the MPU whenever the MPU requests it, The MPU requests the information wi cao? RO cenit Ma lo ae inst PU etc qo fete formed 1. Th ad Th the 3. TY 4.7 datathe akress of a specific memory regi east by sencing the conto! signal as ilk oF Om the ade Med ate kes tis and enables the fie arectoe coe 0100 1111 (AFH) is stored in memory lou ation 2005H, Tlusiate the Beamaye oe and Tist the sequence of events when the instruction yo mer . &s truetion code is fetched hy the 35 ~ Be Fash Be itrection located in memory locaton 2008 the lowing steps ae pe Solution teem! J, The program counter places the 16-bit address 2005H of the memory location on the the Memory Re memory chip, | control signal (MEM, active low) to enable 4FH) stored in the memory location is placed on the data bus and to the instruction decoder of the micropro A The instruction is decoded and executed accordi to the binary pattern of the in- 8085 MPL ‘ches the instruction using the address, the 2 10 Figure 3.2, Memory Read operation, F=— 0100110 Memory ie Aairess Bus ~ MEM FIGURE 3.12 Instruction Fe!76 MICROPROCESSOR NASED STEM ADWARE AND ETHER ] isd Memory Classification As mentioned eat nd storage me jer, memory can be classified into two groups: prime (system or mg nory, The RAM and ROM are examples of prime memory a nory the microprocessor uses in executing and storing programs. This meats Pe dent oF place inthe chip). The sizeof a memory chip is specified in terms of be Ey netic disks and tapes (gg pier) stored in : Storage Be sti 5 pwn _ As the Read/Write ‘Read-Only Semi- ‘Serial a, | a vol | : i I | o * Dynamic + EPROM * Masked ROM = Floppy Dy: lash * CD-ROM. os * Imegrated ‘Memor ip Diss and =| ee = a te ten FIGURE 3.13 tra me{erOROCESON ARCHTECTURE AND MICROCOM TER YSTEMS BRIE Poorest store in these Fee cena intacteven if the systern is ture forpricess programs stored in thes peas teers bow large roe memory is unlimited: whe id BRE S13 shows toe Jee The secondary storage is similar oa Bee fect devices such as ists. Bet devices, ie ae — Beh capacity fv cos, and show access A ggg sa fa oF ibe stored information in the disk is semirandom (see Che Sion). The remaining devices shown in Figure 3.1} 5 Fam the syste one disk oF tape groups in storage mem can be usd and becky Study andthe bubble memory 4 shelf in you The secondary wgnetic tapes, magnet attic up ant Chapter 1 for adie as shown in F seuss some of these memory storage devices again in Gran fal he tape, We wi will focus on various types of prime memory Per Te igure 3.13 show's that the prime (system) memory is divided in BesdWate memory (RWM) and Read-Only memory (ROM): each eee nee tral different types of memory, as discussed below ee ee R/WM (READ/WRITE MEMORY) AS the name suggests, the microprocessor can write into or read from this popularly known as Random Access memory (RAM). Iis used primaily tara that is likely to be altered, such as writing programs or receiving data. This me Nolatile, meaning that when the power is turned off, all the contents are destuved, Ta types of R/W memories—static and dynamic—are available: they are dese lowing paragraphs. Static Memory (SRAM) This memory is made up of flip-flops, and A voltage. Each memory cell requires six transistors: therefore, the me ip has low density but high speed. This memory is more expensive and consumes the dynamic memory described in the next paragraph. In high-sp Intel 486 and Pentium), SRAM known as cache memory is inclu Sip: In addition, high-speed cache memory is also included externa improve the performance of a system Dynamic Memory (DRAM) This memory is made up of MOS transistor gates, and it stores the bit as a charge. The advanta: and low power consumption and is cheaper than static memory. The disadvantage is that the charge (bit information) leaks; therefore, stored information needs to be read and writ fen again every few milliseconds. This is called refreshing the memory, and it requites ex ira circuitry, adding to the cost of the system. It is generally economical to use dynamic memory when the system memory size is at least 8K; for small systems, the static mem- of dynamic memory are that it has high densityMICROPROCESSOR-BASED SYSTEMS: HARDWARE, AND ce Js appropiate. However: in recent year, the processor speed has reached be BERRERA ODOM processors tre in the design stage. In comparison to the sm 200 Spend the DRAN is 00 slow. To increase he speed of DRAM varios ecg ee ing used. These techniques have resulted in high-spes be. memory chips such ay (Extended Data Out), SDRAM (Synchronous DRAM), and RDRAM (i ‘ambus DRAM) IM (READ-ONLY MEMORY) ROM a nonvolatile memory: it retains stored information even if the power i Off. This memory is used for pro; tun rams and data that need not be alte ts the name vit BES the information canbe read only. which means once a bit patent stored 8 Manent or at least semipermanent. The permanent group includes two "yes of memory: imasked ROM and PROM. The semipermanent group also includes two types of meng EPROM and EE-PROM. as shown in Figure 3.13. The concept underlying the ROM can Be explained with the diodes arranged in a matrix format. as shown in Figure Sry The horizontal lines are connected to vertical lines only through the diodes: they a Rot con. nected where they appear to cross in th 1 diagram. Each of the eight horizont Mewed as a register with binary addresses ranging from 000 to 111: inform: by the diodes in the register as 0s or Is. The presence of a diode stores | stores 0. When a register is selected, the volt here diodes are connected, go high. For example, when the memory register 111 is ge. lected, the data byte 0111 1000 (78H) can be read at the data lines D. D, The diode representation is « simplified version of the actual MOSFET memory ell. The manufacturer of the ROM designs the MOSFET matrix according to the infor +sv fal TOWS can be tation is stored and its absence and the output lines, age of that line goes hig ation eis oro soM 34 asked R aizatiO an xP 0M silicon, fuses: TP that selec known & EPROM py chare amme Vie t ceam be ally sui disadv2 tire chi EE-PI EPRO level | contre rence puter ing ir acen can t expe Plas diffe PRC enti atk aro as | dat cor SuR ARCHITECTURE AND ye _ PHCROPROCESSO ICROCOMPUTER, SYSTEMS ret teeter, Beets tecorded.c0 2 recon! Fi information ig ; Pes of ROM on the PROM, and Flash Memory—are described in tne ened ROM, PROM E ROM: as manently recorded in following par | EPROM, EE. Masked ROM In this ROM, a bit pate raph, sretalization process. Memory manut isan expensive and specialized process, but econeme PROM (Programmable Read-Only Memory) silicon wires arranged in a matrix; these wi fuses. This memory can be progr that selectively burns the fuses Known as “burning the PROM.” facturers are gener; This mem : ONY as nichrome es FES canbe funcional warns em a ey the user with a special PROM programe, sand He. {0 the bit Pattern. to be stored. THe pr and the information stored is permanent sae EPROM (Erasable Programmable Read-Only by charging the floating gate of an FET. Informa Brammer, which applies high voltages to chi erased by exposing the chip to ultraviolet |i an be reprogrammed. Because the chip can be reused many times ally suited for product development, experimental projects, and o disadvantages of EPROM are (1) it must be taken out of the circuit to erace # lire chip must be erased, and (3) the erasing process takes 15 to 20 min Memory) This memory stores « bit ation is stored by using an EPROM pro the gate. All the information can be ght through its quartz window, and the chip his memory is lege labe EE-PROM (Electrically Erasable PROM) This memory is functionally similar to EPROM, except that information can be altered by using electrical signals at the register level rather than erasing all the information. This has an advan Control applications. In microprocessor systems, software update is a common occur fence. If EE-PROMs are used in the systems, they can be updated from a central com Puter by using a remote link via telephone lines. Similarly, in a process control where tim ing information needs to be changed, it can be changed by sending electrical signals from @ central place. This memory also includes a Chip Erase mode, whereby the entire chip €an be erased in 10 ms ys. 15 to 20 min. to erase an EPROM, However, this memory is ph). €xpensive compared to EPROM or flash memory (described in the next par The major Flash Memory This is a variation of EE-PROM that is becoming popula difference bewween the flash memory and EE-PROM is in the erasure procedure: The EE PROM can be erased at a register level, but the flash memory must be erased cites in entirety or at the sector (block) level. These memory chips can be erased Bs pes ae At least a million times. The power supply requirement For programming these SNPS A round 12 V, but now chips are available that can be programmed using & poset SUPRA | a8 low as 1.8 V. Therefore, this memory is ideally suited for low-power sys! ae ie written in ~ In-@ microprocessor-based product, programs are ard in a microprocessor ‘that are likely to vary are stored in R/WM. For example, )M, and data ‘oven, programs that run the oven are permanently stored in nae = ing period, starting time, and temperature are entered 1n‘On the other hand. when microcomputers are used for devetopin pomposes. programs are first written in R/W memory, and then eet ane memory such as a cassette tape or floppy disk "ore ong IN MEMORY TECHNOLOGY rechnology has advanced considerably in recent years. In RAW memory. other options are also available in memory ¢ ‘Glade Zero Power RAM, Nonvolatile RAM, and Integrated RAM. The Zens Power RAM is a CMOS Read/Write memory with battery back tai HReAAaMIy he inchudes lithium cells and voltage-sensing circuitry. When the external Power SapPH vokage falls below FV, the power-switching circuitry connects the lithium battery BR. BK memory provides the advantages of R/W and Read-Only memory, e The Nonvolatile RAM is a high-speed static R/W memory array backed up, bit for BES EEPROM array for nonvolatile storage. When the power is about 10 80 off, he Sestenss of RW memory are quickly stored in the EE-PROM by activating the Store ¢ Bal Se the memory chip, and the stored data can be read into the R/W memory segmery Biss We power is again tumed on. This memory chip combines the flexibility of sate BOW memory with the nonvolatility of EE-PROM. Ths Incgrated RAM (iRAM) is a dynamic memory with the refreshed circuitry built Spe chip. For the user. itis similar to the static R/W memory. The user can derive the Seamazes of the dynamic memory without havin; Addition 10 statie devices. Examples iq, i 10 build the external refresh circuitry INPUT AND OUTPUT (I/O) DEVICES Eppetiowtpet devices are the means through which the MPU communic. Bete World” The MPU accepts binary data as input from devices such as keyboards and WED Someries: and sends data to output devices such as LEDs or printers, There are two iste methods by which 1/0 devices can be identified: one uses an 8-bit address and the (Bier tise 2 16-bit address. These methods are described briefly in the following sections. ‘ates with “the out- 331 V/Os with 8-Bit Addresses (Peripheral-Mapped I/O) Beis ype Of VO. the MPU uses cight address lines to identify an input or an output de- BS 96 Known as peripheral-mapped 1/0 (also known as /O-mapped VO). This is an # system for /Os used in conjunction with Input and Output instructions. also known as VO space, separate from memory space, which is a 16-bit number The tight address lines can have 256 (2* combinati ns) addresses; thus, the 256 input devices and 256 output devices with addresses ranging from input and output devices are > differentiated by the control signals; the for input devices and the 1/O Write control signal, 40 as /O device addresses or 1/O_ port numbers, “&s oulput oF switches as input, we need to resolve two issues: how to connect these 1/0 devices to the data bus. In a bus archi- bbe connected directly to the data bus or the address bus; all ne‘ARCHITECTURE AND MICROCOMPUTER sysTEM must be made through tri-state interfacing ieonnected to the buses only when the MPU chog iy hoses to cof memory, we did not have to be concerned with th > ith these pr ; address decoding, Read/Write buffers, and availab fees fsce Section 3.5). (m= steps in communicating with an VO d a levice are similar with memory and can be summarized as follows. pesos tt comm 4. The MPU places an 8-bit address on the exde logic (explained in Chapter 4). 2 The MPU sends a control signal (1/0 Read or VO. , cad or 1/0 Write) and ena } & Dara are transferred using the data bus, ) ae ee $3.2 1/Os with 16-Bit Addresses (Memory-Mapped 1/0) & this ype of I/O, the MPU uses 16 address lines to identify an /O device; an VO is con 35 ifit is a memory register. This is known as memory-mapped VO. The MPU uses ‘Address bus, which is decoded by extemal de- same control signal (Memory Read or Memory W1 as t onto si ad or Memory Write) and instructions’ as those of a ime Microprocessors, such as the Motorola 6800, all 1/Os have 16-bit ad- the MPU follows the same steps as if it is accessing a memory registe! The peripheral- and memory-mapped 1/0 techniques will be discussed in detail in the context of interfacing /O devices (see Chapter 5). Gresses; /Os and memory share the same memory map (64K). In ee vO, EXAMPLE OF A MICROCOMPUTER SYSTEM S Zt (On the basis of the discussion in the previous sections, we can expand the microcomputer System shown in Figure 3.1 to include additional details. Figure 3.15 illustrates such a System. It shows the 8085 MPU, two types of memory (EPROM and R/WM), input and ‘output, and the buses linking all peripherals (memory and /Os) to the MPU The address lines Ajs~Ay are used to address memory, and the low-order address bus AA, is used to identify the input and the output. The data bus D,~Dg is bidirectional nnerated by the MPU are con- als and common to all the devices. The four control sig nected to different peripheral devices, as shown in Figure 3.15. The MPU communicates with only one peripheral at a time by enabling the pe imple, to send data to the output device, the address bus, data on the data TOW (VO Write). The output ipheral-throvgh its control signal. For ex MPU places the device address (output port number) on the bus, and enables the output device using the control signal device latches and displays data if the output device happens to be LEDs. The other pe- fipberals that are not enabled remain in a high impedance state called tri-state (explained ater), similar to being disconnected from the system. Figure 3.15 is a simplified block dic fagram of the system; it does not show such details as data latching nd tri-state devices Section 3.5). i Figure 316 shows an expanded version of the output section and the best sf Figure 3.15. The block diagram includes tri-state bus drivers, @ decoder, and a late eaas several tYPES ing ee wt 10 PT ey monly wed Asi 7 2 (taste lo rate is 0 ¢ A wistate Tine is act dl ordinary Figure 3 ble. Wh to Low-Order Address dress bi erals dc atime proper 3.8.2 The b one 0} ce uuter System Mlustrated in Figure 3.15 Riera ts sae buses, the decoder decodes the ad iserncice ae data output for display. These devices na : vere semiconductor chips that are system. We discuss interfacing concepts,several types of in pusoriented system. The devices used in today my ing medivm-scale integration (MSI) technology. In addition tag sential to proper func by several components. The concept underiying the tri-aane monly used interfacing devices, will be reviewed in the lies AB1 Tri-State Devices (Teestate logic devices have three states: logic 1, "Siate is a trademark of National Semiconductor and is used to r pr Aisa fine is activated, the tri-state device functions the same way as ordinar ct the co systems a ¢ logic device has a third tine called Enable, as shown in Fie the third line is disabled, the logic device goes into the high imped disconnected from the system. Ordinarily, current is required to drive Jogic 1 states. In the high impedance state, practically no current is ¢ Figure 3.17(a) shows a tri-state inverter. When the Enable is high, the ci londinary inverter; when the Enable line is low, the inverter stays in the Figure 3.17(b) also shows a tri-state inverter with active low Enable |i ble. When the Enable line is high, the inverter stays in the high imped: In microcomputer systems, peripherals are connected in p: ress bus and the data bus. However, because of the tri-state int €rals do not load the system buses. The microprocessor commun he tri-state line of the interfacing deviee. Tr atime by enabli proper functioning of the microcomputer $5.2 Buffer The buffer is a logic circuit that amplifies the ¢ one output line (a simple buffer is shown in Fi FIGURE 3.17 Tri-State Inverters with Active High > Enable and Active Low Enable Lines nabl (a) Active High o ic 0, and high t igh impedane pone desi nts of a ‘Active Low FIGURE 3.16 A Buffer and a Tri-State Butfer — ee Enable @lope 1 input provides foie 1 outpu the oppo ; {he boter is use primarily wo increase the diving capability of og et Es rere rea -also known as a driver 3.18b shows a tt-state buffer. When the Enable line is low. the ei... Figure 3.1 Enable line i low, he ete fag sins a. ter: otherwise it stays inthe high impedance state. The blero used to increase the driving capability of the data bus and the address bus monly EXAMPLES OF TRISTATE BUFFERS , The ocial buffer 741244 shown in Figure 3.19 isa typical example of a tri-state oa : Bs als known as tine driver or line receiver, This device is commonly used geo Wer for the address bus in a bus-oriented system. 7 ure 3.19 shows two groups of four buffers with noninverted tri-state outpy Buffers are controlled by two active low Enable lines (IG and 2G). Until these lines enabled. the output of the drivers remains in the high impedance state. Each buffer is ea. Directio Bable of Sinking 24 mA and sourcing ~15 mA of curent. The 741 $240 is another naa cee ple of a tri-state buffer; it has tri-state inverted output. BIDIRECTIONAL BUFFER FIGURE ¢ The data bus of a microcomputer system is bidirectional: therefore, it requires a buffer Bese. that allows data to flow in both directions, Figure 3.20 shows the logic diagram ofthe ine Bidirectional buffer 7418245, also called an octal bus transceiver. This is commonly used as a driver for the data bus 3.5.3 The 74LS245 includes 16 bus drivers, eight for each direction, with tistae output, Fe tec The direction of data flow is controlled by the pin DIR. When DIR is high, data flow from aps the A bus to the B bus; when it is low, data flow from B to A. The schematic also includes Pee fr an Enable signal (G), which is active low. The Enable signal and the DIR signal are ae ANDed to activate the bus lines. The device is designed to sink 24 mA and source =1§ ei mA of current 0. This FIGURE 3.19 74LS244 as Logic Diagrar 1 aan Octal Buffer zo BCD i 1G} oy Lesa fe aS el? 1Ag 1¥4 5s eda SOURCE: Counesy of Texas Insiruments Incorporates As 13 7 a ee is } 2%) WW 3 Fict 2H EnaFunction Table Enable Diecton G Control ie Operation BDaaioa Bas ADuaw 8 Bat a & Isolation ot om WS Neh evel 0 = owe te eS alasee orig T 19 (o) “ey ction Enable etm, —_ ® FIGURE 3.20 buffer logic Function Table ofthe 7415246 Bidirectional Bt f the Be Como Texas truer ncapanee nly we 3.5.3 Decoder nase The decoder is a logic circuit that des re ntifies each combination of the signals present at a decoder has two binary lines, the décoder will S (Figure 3.21). The two lines can assume four combinations of in. Is ut signals—00, 01. 10. 11—with each combination identified by the output lines 0 10 3. Ifthe input is 112, the output line 3 will be at logic 1, and the others will remain at logic ©. This is called decoding. Figure 3.21(a) shows a symbolic representation for a hypo- thetical 2:4 decoder. It is also called a 1-out-of-4 decoder. Various types of decoders are available; for example, 3-to-8, 4-to-16 (to decode binary inputs), and 4-10-10 (to decode BCD input). In general, decoders have active low output lines as well as Enable lines, as its input. For example, if the input to have four output line ‘Oupat impor} tet? 1 | Decouer ] | (ay (by j FIGURE 3.21 240-4 (1-out-of-4) Decoder Logic Symbol (a) Enable Line (b) to-4 Decoder with Active Low Output and(Active Low Ouepet IGURE 3.22 S408 (1-cut-oF-8) Decoder Logic Symbol (b) Decoder with Enable Sows i Figure 3.21(b) and Figure 3.22, The decoders shown in Figures 3.216) ang 32216) will not function unless they are enabled by a low signal A decoder is a commonly used device in interfacing /O peri tn Figure 3.16 the decoder (Port Select Deco ‘tify the output device. De vidual memory registers. EXAMPLES OF DECODERS Figure 3.23 shows the block diagrams of two 3-t0-8 decoders, the 7. 8205. These are pin-compatible, with slight differenc Fe exity: They are also called 1-out-of-8 binary decoders or demu lexers, There are several other semiconductor manufacturers that use input/output symbols simic FIGU Hat to those of the Intel 8205 for their 74L.$138 decoder Logi ieee 7315138 has three input lines and eight active low output lines. It requires pour Bece Enable inputs. Two are active low and one is active high; all three Enable lines é eit be activated so that the device can function as a decoder, For example, if the T4LS138 is enabled (GA B = 0 and G, = 1) and if the input is 101, the output Y, Will £0 low; others will remain high. ipherals and’ memory xler) is used to decode an address bus to iden: coders are also built internal to a memory chip to identity ind 4LS138 and the Intel in their switching response and Hen FIG! 384 Encoder ‘i ect 8 2 logic circuit that provides the appropriate code (binary, BCD, etc.) as out. for each input signal, The Process is the reverse of decoding. Figure 3.24 shows an & f it has eight active low inputs and three output lines. When the input line 0 the output is 000; when the input line 5 goes low, the output is 101. However, istunable to provide an appropriate output code if two ox more input lines are t Encoders called priority encoders can resolve the problem of si-Enable Liss, S138 Fonction Table P= hig fevel. L = low level. X = inclevant FIGURE 3.23 Logic Diagram n Ta 10-8 De siuments Incorporate. (b) Ite corporation, MCS FIGURE 3.24fa Se Sat tala see iwl eee tt aati FIGURE 3.25 540-3 Priority Encoder—141.51 48: Logic Symbol and Funct tion Table I) SOURCE: Function table counesy of Texas Insieumens, ; Figure 3.25 shows the logic symbol of the 74L thas eight inputs and one active low enable signal. It h Soding lines and two are output-enable indicators. The output lines G sed to encode more than eight inputs by cascading these enabled and two or more input signals 5148, an 8-t0-3 priority encoder, It as five output signals—three are ene and EO can be devices, When the encoder ig are activated simultaneously, it ignores the low= Priority inputs and encodes the highest-priority input. Similarly, the output of this decoder #8 active low; when input signal 7 is active, the output is 000 rather than 111 Encoders are commonly used with keyboards. For each Sponding binary code is placed on the data bus key pressed, the come- 35.5 D Flip-Flops: Latch and Clocked An ts simplest form, a latch is a D flip-flop, as shown in Figure 3.26; it is also called a Hansparent latch. A typical example of a latch is the 7475 D flip-flop. In this latch, when the enable signal (G) is high, the output changes according to the input D. Figure 3.26(a) Shows that the output Q of the 7475 latch changes during T)3 and Ts, and data bits are Taiehed at t, and t,, On the other hand, in a positive-edge-triggered flip-flop, the output Bes with the positive edge of the clock. Figure 3.26(b) shows the output of the 7474 edge-triggered flip-flop. At the first positive going clock (t,), the input is low; ‘the output remains low until the next positive edge (t;). At ts, the D input is Sre, the output goes high. There is no effect on the output at any other time. 1S used commonly to interface output devices. When the MPU sends an out- ‘on the data bus for only a few microseconds; therefore, a latch is for display, Anpot — ore FIGUR OutputARCHITECTURE AND MICROCOMPUTER OF LATCHES (REGISTERS) Sn En ee nh I the 74L837 shown ty pueda, This octal Patel \ tooo —L |) CoRR geek i | Date Latch | 1 t eam ' 1] tach o-—aa \ t \ \ ; eae ! \ [ve PONE ST PositverEdge | T ¥ Triggered | | de Trigger Trigger 1 Positive Edge-Triggered Flip-Flop (b 2» » Veo OND uw \ le Oupat By Control Function Table Bape Contol_|- device includes eight D latches with testate buffers, and it G) and Output Control (OC), The Enable isan active high signe, Ninput of the flip-flop. When this signal goes low, dita are latches “Oust Control signal is active low, and it enables the tstate hate Bee devices. This latch can also be viewed as a register in a memner eee facing devices are discussed briefly here asa review to engi erate Fang how they are used in microcomputer systems: they will bet oy they we cor Bae etctticing applications. ——— _ | FIGUE me Timing A Are AS Memory Adare \ - AD,-ADy ArAa _f---{" Dan trom Fe 1o/M. M | RD “g MEMR “Demulplexed address bus # Tie reradining 8085 address lines (A,5-A,,) should be decoded to generate a Chip L FCS) signal unique to that combination of address logic (illustra in Examples 43 and 4.4), aa S x 4 The 8085 provides two signals—IO/M and RD —to indicate that itis a memory read ee 10M and RD can be combined to generate the MEME (Memory Read) x serail Signal that can be used to enable the output buffer by connecting to the mem- ory signal RD. 4 4 Figure 4.12 also shows that memory places the data byte trom the addressed register a Fx avd that is read by the microprocessor before the end of Ts. A et 19 write into a register, the microproc t reads from 4 e ‘oprocessor performs similar steps as it a Btebister Figure 4.13 shows the Memory Write cycle. In the y and data and asserts the 1O/M signal, After allowing suffi A 8 ad us Gata to become stable, i atts the Write (WR) signal. The IO/M and WR signals can be a Combined t0 generate the MEMW control Signal that enables the input buffer of the mem a sores the byte in the selected memory register, interface memory with th5s Hines ofthe address bus o the address lines ofthe mem lines of the address bus to generate the Chip Select sig TERA on (4.3.3), and connect the signal to select the chip. Enals MEMR and MEMW by combining RD and WR signals wah n able appropriate buffers, 433 Address Decoding The process of addr: We should be ab) 4.110), 12 addre ‘Ag) ate connected to the memory chip, and the remaining Pies Bes (As5-A,,) of the 8085 microprocessor must be decaded. Flame Aik Sows tO methods of decoding these lines: on by using a NAND gate and the other by Bee ca Secoder. The output of the NAND goes active and selects the chip only Pe a Beiess Vines A,,-A,, ase at logic J. We can obtain the same result by using O, Ee F108 decoder, which is capable of decoding cight different input addresses. In the Seceer circuit, three input lines can have cight different logic combinations from 000 to PH ach input combination can be identified by the corresponding output line if Enable hould result in identitying a register for a given address, 4 unique pulse for a given address. For example, in FigureMICROPROCESEOR-BASED SYOTENG: uatowage ati ES FIGURE 4.14 *088 sano ress Decoding Using NAND Gate ( 3 A, = / ae Step & Fe arial to 4.35 4 4 ‘We can ob 2 +5V from all Ais OFFFH, a Aw Bos ss Ga Decoder EPROM 74LS138 4096 8 An — We be viewe el City OF. indie Data Bus Lines No Dy ———___ from thi bus. The lects the 82 EPROM internal « address RD sign lines are active. In this circuit, the Enable lines E nd E enabled by grounding, and on the di Ais must be at logic 1 to enable § We will use this address decoding scheme to inter face 24K EPROM and a 2k R/W memory as illustrated in the next two examples Analyze 43.4 Interfacing Circuit pibite 415 shows an interfacing circuit using a 3-10-8 decoder to interface the 7g EPROM memory chip, It is éssumed here that the chip has already been programmed, an Figure 4 we will analyze the Imterfacing circuit in terms of the same three steps outlined previ memory ously Step 1: The 8085 addre: address | 8S lines Ay)—Ay are Connected to pins A, ,—Ay of the memory tek chip to address 4096 registers,121 Step 2 The decoder is used 19 devote Sscoer is connected to Chip address on A.A. is 0000. © output Oy, Step 3: For this EPROM, we need ik low. The ME ch a same as RD in Figure 4.11 ee rate RS eS AeA The ‘output 0, of the able ¢ Serted only when the der and the input 009 Sts the 16 address lines. The logic levere on the address lines r Hom all Os to all Is. Therefore, the memory ea anes Address of this chip ranges from 0 OFFFH, as shown below. ae Bren te Ae AL AAS ALA; As As A Ay Aa Ay Ay ete F90-0..0:'0 00 o'G J © 0 0 =0000H = OFFFH Chip Enable n verify the memory address ran, ms of our analogy of page and tine Paes arapter 3, Section 3.22, The chip's 4096 bytes of se mory can 6 Pages with 256 lines each. The high-order Hex digits range from 00 to na nEtS— O000H to OOFFH and O100H to OLFFH, for exam gle Be ee att tikes is decoded and how the microprocessor reads 4 a assume that the 8085 places the address OFFFH on t 1 address 9000 (OH) g0es tothe decoder, and the output line Oy of the deca The remaining address FFFH goes on the address lines of the chip, and the eu Chip decodes the address and selects the register FFFH. Thus, the the register as shown in Figure 4.16. When the 8085 asserts the Pit buffer is enabled and the contents ofthe register OFFFH are placed the processor to read reuit in Figure 4.17 and find its memory address range Example oS 45 BABE AAT shows the interfacing of the 6116 memory chip with 2048 (2K) registers. The Solution Bg ib feawires 11 address lines (Ayg-Ac) 10 decode 2048 registers, The remaining ete lines Ais-A,, are connected 10 the decoder. However, in this circuit, the sei PNAC by the 101M signal in addition to the address lines A,q and A,,, and the RD and